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Searched refs:UCR4_DREN (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/include/hw/char/
H A Dimx_serial.h77 #define UCR4_DREN BIT(0) /* Receive Data Ready interrupt enable */ macro
/openbmc/u-boot/drivers/serial/
H A Dserial_mxc.c74 #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ macro
/openbmc/qemu/hw/char/
H A Dimx_serial.c90 mask |= s->ucr4 & (UCR4_WKEN | UCR4_TCEN | UCR4_DREN | UCR4_OREN); in imx_update()
/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h577 #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ macro
/openbmc/linux/drivers/tty/serial/
H A Dimx.c120 #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ macro
1488 imx_uart_writel(sport, ucr4 & ~UCR4_DREN, UCR4); in imx_uart_startup()