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Searched refs:UCR1_TXMPTYEN (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/include/hw/char/
H A Dimx_serial.h69 #define UCR1_TXMPTYEN (1<<6) /* Tx Empty Interrupt Enable */ macro
/openbmc/u-boot/drivers/serial/
H A Dserial_mxc.c31 #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ macro
/openbmc/qemu/hw/char/
H A Dimx_serial.c84 mask = (s->ucr1 & UCR1_TXMPTYEN) ? USR2_TXFE : 0; in imx_update()
/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h534 #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ macro
/openbmc/linux/drivers/tty/serial/
H A Dimx.c73 #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ macro