| /openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
| H A D | marvell,armada-cp110-pinctrl.txt | 115 41 PTP_PULSE SPI0_MOSI UART1_RXD
123 49 SPI1_MISO - UART1_RXD
127 53 SPI1_CSn[3] - UART1_RXD
130 56 AU_I2SDO_SPDIFO SPI0_CLK UART1_RXD
143 2 UART1_RXD SATA0_PRESENT_ACTIVEn XG_MDC
201 60 LED_DATA UART1_RXD -
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| H A D | marvell,armada-apn806-pinctrl.txt | 13 7 SDIO_D[4] - UART1_RXD -
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| /openbmc/u-boot/board/ti/dra7xx/ |
| H A D | mux_data.h | 149 {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
359 {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
374 {UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */
683 {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
869 {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
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| /openbmc/u-boot/arch/arm/include/asm/arch-omap5/ |
| H A D | mux_dra7xx.h | 318 #define UART1_RXD 0x3E0 macro
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| /openbmc/linux/arch/arm64/boot/dts/bitmain/ |
| H A D | bm1880-sophon-edge.dts | 109 "[UART1_RXD]", /* GPIO47 */
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| /openbmc/linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am642-phyboard-electra-rdk.dts | 173 AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
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| H A D | k3-am625-phyboard-lyra-rdk.dts | 150 AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
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| H A D | k3-am62a7-sk.dts | 147 AM62AX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C17) I2C1_SCL.UART1_RXD */
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| H A D | k3-j7200-common-proc-board.dts | 156 J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
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| H A D | k3-am62x-sk-common.dtsi | 143 AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */
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| H A D | k3-am642-sk.dts | 270 AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
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| H A D | k3-am65-iot2050-common.dtsi | 247 AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */
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| H A D | k3-am642-evm.dts | 253 AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
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| H A D | k3-am642-tqma64xxl-mbax4xxl.dts | 637 /* (E15) UART1_RXD */
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| /openbmc/u-boot/board/ti/am57xx/ |
| H A D | mux_data.h | 206 {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
491 {UART1_RXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */
711 {UART1_RXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */
898 {UART1_RXD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */
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| /openbmc/linux/arch/arm/mach-davinci/ |
| H A D | da850.c | 52 MUX_CFG(DA850, UART1_RXD, 4, 24, 15, 2, false)
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| H A D | da830.c | 236 MUX_CFG(DA830, UART1_RXD, 11, 8, 0xf, 1, false)
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| /openbmc/linux/arch/arm/boot/dts/hisilicon/ |
| H A D | hi3620-hi4511.dts | 379 0x218 0 /* UART1_RXD (IOCFG142) */
389 0x218 0 /* UART1_RXD (IOCFG142) */
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| /openbmc/linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hikey960-pinctrl.dtsi | 109 0x0a8 MUX_M2 /* UART1_RXD */
482 0x0b4 0x0 /* UART1_RXD */
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| H A D | hi3670-hikey970.dts | 147 "[UART1_RXD]", /* LSEC pin 13: DEBUG_UART6_RXD */
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| H A D | hikey-pinctrl.dtsi | 166 0xd0 MUX_M0 /* UART1_RXD (IOMG052) */
546 0xd4 0x0 /* UART1_RXD (IOCFG053) */
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| H A D | hi3660-hikey960.dts | 313 "[UART1_RXD]"; /* LSEC pin 13: DEBUG_UART6_RXD */
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | mediatek,mt7622-pinctrl.yaml | 290 UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD,
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| H A D | mediatek,mt7986-pinctrl.yaml | 280 UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, UART1_CTS,
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | da850.dtsi | 147 /* UART1_TXD UART1_RXD */
|