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/openbmc/linux/Documentation/virt/kvm/x86/
H A Dtimekeeping.rst14 3) TSC Hardware
37 First we discuss the basic hardware devices available. TSC and the related
324 3. TSC Hardware
327 The TSC or time stamp counter is relatively simple in theory; it counts
332 The TSC is represented internally as a 64-bit MSR which can be read with the
334 limitations made it possible to write the TSC, but generally on old hardware it
339 write the TSC MSR is not an architectural guarantee.
341 The TSC is accessible from CPL-0 and conditionally, for CPL > 0 software by
342 means of the CR4.TSD bit, which when enabled, disables CPL > 0 TSC access.
345 atomically not just the TSC, but an indicator which corresponds to the
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H A Dhypercalls.rst130 * tsc: guest TSC value used to calculate sec/nsec pair
134 host and guest. The guest can use the returned TSC value to
137 Returns KVM_EOPNOTSUPP if the host does not use TSC clocksource,
/openbmc/linux/Documentation/virt/hyperv/
H A Dclocks.rst26 also provides access to the virtualized TSC via the RDTSC and
27 related instructions. These TSC instructions do not trap to
29 Hyper-V performs TSC calibration, and provides the TSC frequency
31 in Linux reads this MSR to get the frequency, so it skips TSC
42 value, the guest reads the TSC and then applies the scale and offset
45 to a host with a different TSC frequency, Hyper-V adjusts the
50 support for TSC frequency scaling to enable live migration of VMs
51 across Hyper-V hosts where the TSC frequency may be different.
53 available, it prefers to use Linux's standard TSC-based clocksource.
62 space code performs the same algorithm of reading the TSC and
/openbmc/linux/tools/power/cpupower/utils/idle_monitor/
H A Dnhm_idle.c27 enum intel_nhm_id { C3 = 0, C6, PC3, PC6, TSC = 0xFFFF }; enumerator
89 case TSC: in nhm_get_count()
131 nhm_get_count(TSC, &tsc_at_measure_start, base_cpu); in nhm_start()
139 nhm_get_count(TSC, &dbg, base_cpu); in nhm_start()
150 nhm_get_count(TSC, &tsc_at_measure_end, base_cpu); in nhm_stop()
158 nhm_get_count(TSC, &dbg, base_cpu); in nhm_stop()
H A Dsnb_idle.c24 enum intel_snb_id { C7 = 0, PC2, PC7, SNB_CSTATE_COUNT, TSC = 0xFFFF }; enumerator
75 case TSC: in snb_get_count()
122 snb_get_count(TSC, &tsc_at_measure_start, base_cpu); in snb_start()
131 snb_get_count(TSC, &tsc_at_measure_end, base_cpu); in snb_stop()
H A Dhsw_ext_idle.c26 TSC = 0xFFFF }; enumerator
77 case TSC: in hsw_ext_get_count()
124 hsw_ext_get_count(TSC, &tsc_at_measure_start, base_cpu); in hsw_ext_start()
133 hsw_ext_get_count(TSC, &tsc_at_measure_end, base_cpu); in hsw_ext_stop()
/openbmc/linux/Documentation/virt/kvm/devices/
H A Dvcpu.rst206 :Parameters: 64-bit unsigned TSC offset
216 Specifies the guest's TSC offset relative to the host's TSC. The guest's
217 TSC is then derived by the following equation:
221 This attribute is useful to adjust the guest's TSC on live migration,
222 so that the TSC counts the time during which the VM was paused. The
227 1. Invoke the KVM_GET_CLOCK ioctl to record the host TSC (tsc_src),
232 guest TSC offset (ofs_src[i]).
235 guest's TSC (freq).
251 5. Invoke the KVM_GET_CLOCK ioctl to record the host TSC (tsc_dest) and
254 6. Adjust the guest TSC offsets for every vCPU to account for (1) time
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/openbmc/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dlpc32xx-tsc.txt1 * NXP LPC32xx SoC Touchscreen Controller (TSC)
7 - interrupts: The TSC/ADC interrupt
/openbmc/qemu/docs/system/i386/
H A Dhyperv.rst79 Hyper-V clocksource (HV_X64_MSR_TIME_REF_COUNT, 0x40000020) and Reference TSC
81 are per-guest, Reference TSC page clocksource allows for exit-less time stamp
139 (0x40000023) allowing the guest to get its TSC/APIC frequencies without doing
146 (0x40000108) MSRs allowing the guest to get notified when TSC frequency changes
150 (Reference TSC page) to its own guests.
153 emulate TSC accesses after migration so 'tsc-frequency=' CPU option also has to
155 the same TSC frequency or support TSC scaling CPU feature.
309 - ``hv-reenlightenment`` can only be used on hardware which supports TSC
H A Dkvm-pv.rst84 Tell the guest that guest visible TSC value can be fully trusted for kvmclock
/openbmc/u-boot/drivers/timer/
H A DKconfig114 int "x86 TSC timer frequency in MHz when used as the early timer"
118 Sets the estimated CPU frequency in MHz when TSC is used as the
165 bool "x86 Time-Stamp Counter (TSC) timer support"
168 Select this to enable Time-Stamp Counter (TSC) timer for x86.
/openbmc/linux/tools/perf/Documentation/
H A Dperf-intel-pt.txt262 So, to disable TSC packets use:
315 tsc Always supported. Produces TSC timestamp packets to provide
367 Because a TSC packet is produced with PSB, the PSB period can
373 MTC packets provide finer grain timestamp information than TSC
375 clock (CTC) which is related to TSC packets using a TMA packet.
404 can be related to TSC via values provided in cpuid leaf 0x15.
418 MTC and TSC packets. A CYC packet contains the number of CPU
419 cycles since the last CYC packet. Unlike MTC and TSC packets,
883 Note also, the sched_switch event is only added if TSC packets are requested.
1026 "ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions).
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/openbmc/linux/Documentation/translations/zh_CN/virt/acrn/
H A Dcpuid.rst56 eax = (Virtual) TSC frequency in kHz.
/openbmc/linux/Documentation/virt/acrn/
H A Dcpuid.rst46 eax = (Virtual) TSC frequency in kHz.
/openbmc/openbmc/poky/documentation/dev-manual/
H A Dsecurity-subjects.rst94 members are needed, the Yocto Project Technical Steering Committee (YP TSC)
97 reached, the YP TSC posts the list of candidates for the comments of project
99 YP and OE TSCs. The candidates are approved by both YP TSC and OpenEmbedded
100 Technical Steering Committee (OE TSC) and the final list of the team members
/openbmc/openbmc/poky/documentation/test-manual/
H A Dyocto-project-compatible.rst84 or through the :oe_wiki:`Technical Steering Committee (TSC) </TSC>`.
85 The TSC is responsible for the technical criteria used by the program.
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dfsl-imx25-tsadc.txt1 Freescale MX25 ADC/TSC MultiFunction Device (MFD)
/openbmc/linux/include/dt-bindings/clock/
H A Dstm32mp13-clks.h101 #define TSC 73 macro
/openbmc/linux/Documentation/driver-api/hte/
H A Dtegra-hte.rst11 from the system counter TSC which has 31.25MHz clock rate, and the driver
/openbmc/openbmc/poky/meta/lib/oeqa/runtime/cases/
H A Dparselogs-ignores-common.txt40 Fast TSC calibration
/openbmc/linux/arch/x86/
H A DKconfig.cpu24 - "586" for generic Pentium CPUs lacking the TSC
187 like a 586 with TSC, and sets some GCC optimization flags (like a
201 treat this chip as a 586TSC with some extended instructions
209 treat this chip as a 586TSC with some extended instructions
/openbmc/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv43 …1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline …
302 … 0x15, 0, EAX, 31:0, tsc_denominator, The denominator of the TSC/”core crystal clock” ratio
303 0x15, 0, EBX, 31:0, tsc_numerator, The numerator of the TSC/”core crystal clock” ratio
424 0x80000007, 0, EDX, 8, nonstop_tsc, Invariant TSC available
/openbmc/linux/Documentation/tools/rtla/
H A Drtla-hwnoise.rst80 and disabling the TSC watchdog to remove the NMI (it is possible to identify
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra234.c1902 PINGROUP(can0_stb_paa4, RSVD0, WDT, TSC, TSC_ALT, 0x3020, 0, Y, -1, 5, 6, -1, 9, 10, 12),
1905 PINGROUP(can0_err_paa7, RSVD0, TSC, RSVD2, TSC_ALT, 0x3038, 0, Y, -1, 5, 6, -1, 9, 10, 12),
1908 PINGROUP(soc_gpio50_pbb2, RSVD0, TSC, RSVD2, TSC_ALT, 0x3050, 0, Y, -1, 5, 6, -1, 9, 10, 12),
1909 PINGROUP(can1_err_pbb3, RSVD0, TSC, RSVD2, TSC_ALT, 0x3058, 0, Y, -1, 5, 6, -1, 9, 10, 12),
/openbmc/linux/Documentation/trace/
H A Dhwlat_detector.rst26 for some period, then looking for gaps in the TSC data. Any gap indicates a

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