Searched refs:TIMING_CFG1_WRTORD_SHIFT (Results 1 – 18 of 18) sorted by relevance
99 (2 << TIMING_CFG1_WRTORD_SHIFT) | \
135 (2 << TIMING_CFG1_WRTORD_SHIFT) | \
122 (2 << TIMING_CFG1_WRTORD_SHIFT) | \
160 | (2 << TIMING_CFG1_WRTORD_SHIFT))
156 | (2 << TIMING_CFG1_WRTORD_SHIFT))
106 | (2 << TIMING_CFG1_WRTORD_SHIFT))
82 | (2 << TIMING_CFG1_WRTORD_SHIFT))
128 (2 << TIMING_CFG1_WRTORD_SHIFT))
116 | (2 << TIMING_CFG1_WRTORD_SHIFT))
131 | (2 << TIMING_CFG1_WRTORD_SHIFT))
169 | (2 << TIMING_CFG1_WRTORD_SHIFT))
143 | (2 << TIMING_CFG1_WRTORD_SHIFT))
147 | (2 << TIMING_CFG1_WRTORD_SHIFT))
360 (1 << TIMING_CFG1_WRTORD_SHIFT) | in set_ddr_config()
50 static const uint TIMING_CFG1_WRTORD_SHIFT = (31 - 31); variable688 last_write_data_to_read << TIMING_CFG1_WRTORD_SHIFT; in mpc83xx_sdram_probe()
1193 #define TIMING_CFG1_WRTORD_SHIFT 0 macro