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Searched refs:TIMING_CFG1_PRETOACT_SHIFT (Results 1 – 18 of 18) sorted by relevance

/openbmc/u-boot/include/configs/km/
H A Dkm8321-common.h105 (3 << TIMING_CFG1_PRETOACT_SHIFT))
H A Dkm8309-common.h141 (3 << TIMING_CFG1_PRETOACT_SHIFT))
/openbmc/u-boot/include/configs/
H A Dkm8360.h128 (3 << TIMING_CFG1_PRETOACT_SHIFT))
H A Dmpc8308_p1m.h153 #define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \
H A DMPC8308RDB.h149 #define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \
H A DMPC8323ERDB.h99 #define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \
H A Dve8313.h75 #define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \
H A Dids8313.h121 #define CONFIG_SYS_DDR_TIMING_1 ((4 << TIMING_CFG1_PRETOACT_SHIFT) |\
H A DMPC832XEMDS.h109 #define CONFIG_SYS_DDR_TIMING_1 ((3 << TIMING_CFG1_PRETOACT_SHIFT) \
H A DMPC8315ERDB.h124 #define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \
H A DMPC837XERDB.h162 #define CONFIG_SYS_DDR_TIMING_1 ((3 << TIMING_CFG1_PRETOACT_SHIFT) \
H A DMPC8313ERDB.h136 #define CONFIG_SYS_DDR_TIMING_1 ((3 << TIMING_CFG1_PRETOACT_SHIFT) \
H A DMPC837XEMDS.h149 #define CONFIG_SYS_DDR_TIMING_1 ((3 << TIMING_CFG1_PRETOACT_SHIFT) \
H A Dhrcon.h140 #define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \
H A Dstrider.h140 #define CONFIG_SYS_DDR_TIMING_1 ((2 << TIMING_CFG1_PRETOACT_SHIFT) \
/openbmc/u-boot/board/tqc/tqm834x/
H A Dtqm834x.c354 (4 << TIMING_CFG1_PRETOACT_SHIFT) | in set_ddr_config()
/openbmc/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c43 static const uint TIMING_CFG1_PRETOACT_SHIFT = (31 - 3); variable
679 timing_cfg_1 = precharge_to_activate << TIMING_CFG1_PRETOACT_SHIFT | in mpc83xx_sdram_probe()
/openbmc/u-boot/include/
H A Dmpc83xx.h1179 #define TIMING_CFG1_PRETOACT_SHIFT 28 macro