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Searched refs:TIMING_CFG0_MRS_CYC_SHIFT (Results 1 – 17 of 17) sorted by relevance

/openbmc/u-boot/include/configs/km/
H A Dkm8321-common.h89 #define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \
H A Dkm8309-common.h125 #define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \
/openbmc/u-boot/include/configs/
H A Dkm8360.h112 (2 << TIMING_CFG0_MRS_CYC_SHIFT) | \
H A Dmpc8308_p1m.h151 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A DMPC8308RDB.h147 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A DMPC8323ERDB.h97 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A Dve8313.h73 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A Dids8313.h120 (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A DMPC832XEMDS.h107 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A DMPC8315ERDB.h122 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A DMPC837XERDB.h160 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A DMPC8313ERDB.h134 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A DMPC837XEMDS.h147 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A Dhrcon.h138 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
H A Dstrider.h138 | (2 << TIMING_CFG0_MRS_CYC_SHIFT))
/openbmc/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c40 static const uint TIMING_CFG0_MRS_CYC_SHIFT = (31 - 31); variable
592 mode_reg_set_cycle << TIMING_CFG0_MRS_CYC_SHIFT; in mpc83xx_sdram_probe()
/openbmc/u-boot/include/
H A Dmpc83xx.h1173 #define TIMING_CFG0_MRS_CYC_SHIFT 0 macro