Home
last modified time | relevance | path

Searched refs:SKL_ADSP_REG_CL_SD_CTL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/sound/soc/intel/skylake/
H A Dskl-sst-cldma.c36 SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_stream_run()
43 val = sst_dsp_shim_read(ctx, SKL_ADSP_REG_CL_SD_CTL) & in skl_cldma_stream_run()
61 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_stream_clear()
63 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_stream_clear()
65 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_stream_clear()
67 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_stream_clear()
124 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_setup_controller()
126 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_setup_controller()
128 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_setup_controller()
130 sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, in skl_cldma_setup_controller()
H A Dskl-sst-cldma.h27 #define SKL_ADSP_REG_CL_SD_CTL (HDA_ADSP_LOADER_BASE + 0x00) macro