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Searched refs:SGMII (Results 1 – 25 of 61) sorted by relevance

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/openbmc/linux/drivers/net/dsa/sja1105/
H A DKconfig17 - SJA1105P (Gen. 2, No SGMII, No TT-Ethernet)
18 - SJA1105Q (Gen. 2, No SGMII, TT-Ethernet)
19 - SJA1105R (Gen. 2, SGMII, No TT-Ethernet)
20 - SJA1105S (Gen. 2, SGMII, TT-Ethernet)
21 - SJA1110A (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 10 ports)
22 - SJA1110B (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 9 ports)
23 - SJA1110C (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 7 ports)
24 - SJA1110D (Gen. 3, SGMII, TT-Ethernet, no 100base-TX PHY, 7 ports)
/openbmc/u-boot/board/freescale/lx2160a/
H A DREADME88 1 |Mezzanine:X-M4-PCIE-SGMII (29733)
91 |Mezzanine:X-M4-PCIE-SGMII (29733)
98 |Mezzanine:X-M4-PCIE-SGMII (29733)
105 |Mezzanine:X-M4-PCIE-SGMII (29733)
126 |Mezzanine:X-M4-PCIE-SGMII (29733)
133 |Mezzanine:X-M4-PCIE-SGMII (29733)
160 3 |Mezzanine:X-M4-PCIE-SGMII (29733)
163 |Mezzanine:X-M4-PCIE-SGMII (29733)
167 5 |Mezzanine:X-M4-PCIE-SGMII (29733)
177 |Mezzanine:X-M4-PCIE-SGMII (29733)
[all …]
/openbmc/u-boot/board/freescale/ls1012ardb/
H A DREADME18 - SGMII, SGMII 2.5
59 - SGMII, SGMII 2.5
/openbmc/linux/Documentation/networking/dsa/
H A Dsja1105.rst12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
20 - SJA1110D: Third generation, TTEthernet, SGMII, 100base-T1
54 SGMII no yes
420 4 xMII xMII SGMII
431 or SGMII SGMII
433 or SGMII or SGMII
435 or SGMII or SGMII SGMII
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/pcs/
H A Dmediatek,sgmiisys.yaml13 The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks
35 description: Invert polarity of the SGMII data lanes
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dmicrochip,sparx5-serdes.yaml35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
45 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
57 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
H A Dxlnx,zynqmp-psgtr.yaml15 Ethernet SGMII controllers.
36 maximum: 3 # for PCIE or SGMII
H A Dqcom,sa8775p-dwmac-sgmii-phy.yaml7 title: Qualcomm SerDes/SGMII ethernet PHY controller
H A Dcalxeda-combophy.yaml12 SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
/openbmc/linux/Documentation/hwmon/
H A Dbcm54140.rst3 Broadcom BCM54140 Quad SGMII/QSGMII PHY
17 The Broadcom BCM54140 is a Quad SGMII/QSGMII PHY which supports monitoring
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dti,dp83869.yaml22 SGMII The DP83869HM supports Media Conversion in Managed mode. In this mode,
25 SGMII and SGMII to RGMII.
H A Dxlnx,axi-ethernet.yaml12 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two
92 SGMII modes. If set, the phy-mode should be set to match the mode
121 description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
H A Dapm-xgene-enet.txt9 - "apm,xgene1-sgenet": SGMII based 1G interface
20 This is supported only on SGMII based 1GbE and 10GbE interfaces.
/openbmc/u-boot/board/freescale/ls2080aqds/
H A DREADME18 - SGMII, SGMII 2.5
143 - Card can operate with up to 8 SGMII lane simultaneously
152 Supported PHY addresses during SGMII:
162 Mapping DPMACx to PHY during SGMII
/openbmc/u-boot/board/freescale/ls1012aqds/
H A DREADME18 - SGMII, SGMII 2.5
/openbmc/u-boot/board/freescale/ls1021aiot/
H A Dls102xa_rcw_sd.cfg5 #Default with 2 x SGMII (no SATA)
/openbmc/u-boot/board/freescale/ls1043aqds/
H A DREADME18 - SGMII, SGMII 2.5
/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Dqca8k.yaml88 the QCA8327 with CPU port 0 set to SGMII.
98 For SGMII CPU port, explicitly enable PLL, TX and RX chain along with
100 the SGMII port will not initialize. When used on the QCA8337, revision 3
102 SGMII on the QCA8337, it is advised to set this unless a communication
/openbmc/u-boot/board/freescale/ls1046ardb/
H A DREADME19 - Lane2: SGMII.5
20 - Lane3: SGMII.6
/openbmc/u-boot/board/freescale/ls1046aqds/
H A DREADME18 - SGMII, SGMII 2.5
/openbmc/u-boot/doc/
H A DREADME.b4860qds74 - A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper connectors
102 controllers, less serdes lanes, less SGMII interfaces and reduced target frequencies.
112 5. 3 SGMII interfaces
310 When using [DEFAULT] RCW, which including 2 * 1G SGMII on board and 2 * 1G
311 SGMII on SGMII riser card.
/openbmc/u-boot/board/freescale/t102xqds/
H A DREADME40 - Four SGMII interface supporting 1000 Mbps
41 - Three SGMII interfaces supporting up to 2500 Mbps
80 - SGMII 1G and SGMII 2.5G
102 - Four SGMII interface supporting 1Gbps
103 - Three SGMII interfaces supporting 2.5Gbps
/openbmc/u-boot/Documentation/devicetree/bindings/misc/
H A Dfsl,mpc83xx-serdes.txt4 protocols (SATA, PCI Express, SGMII, ...) are used on the system's serdes lines
/openbmc/u-boot/board/freescale/t1040qds/
H A DREADME36 - Upto six SGMII interface supporting 1000 Mbps
37 - One SGMII interface supporting upto 2500 Mbps
57 — SGMII
/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a-tsn.dts236 /* SGMII PCS for enet0 */
244 /* SGMII PCS for enet1 */

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