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Searched refs:SDHCI (Results 1 – 25 of 50) sorted by relevance

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/openbmc/qemu/tests/unit/
H A Dtest-qgraph.c27 #define SDHCI "sdhci" macro
211 check_consumes(I440FX, SDHCI); in test_consumes()
222 check_consumes(I440FX, SDHCI); in test_multiple_consumes()
223 check_consumes(PCIBUS_PC, SDHCI); in test_multiple_consumes()
237 check_test(REGISTER_TEST, SDHCI); in test_test()
271 check_produces(I440FX, SDHCI); in test_driver_produces_interface()
287 check_consumes(I440FX, SDHCI); in test_driver_consumes_interface()
294 check_test(REGISTER_TEST, SDHCI); in test_test_consumes_interface()
309 check_produces(SDHCI_PCI, SDHCI); in test_full_sample()
311 check_produces(SDHCI_MM, SDHCI); in test_full_sample()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-common.yaml7 title: SDHCI Controller Common Properties
13 Common properties present on Secure Digital Host Controller Interface (SDHCI)
20 Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES
26 Masked SDHCI capabilities to remove from SDHCI_CAPABILITIES and
H A Dmicrochip,sdhci-pic32.txt1 * Microchip PIC32 SDHCI Controller
14 - pinctrl-0: Phandle referencing pin configuration of the SDHCI controller.
H A Darasan,sdhci.yaml7 title: Arasan SDHCI Controller
45 - const: arasan,sdhci-8.9a # generic Arasan SDHCI 8.9a PHY
46 - const: arasan,sdhci-4.9a # generic Arasan SDHCI 4.9a PHY
47 - const: arasan,sdhci-5.1 # generic Arasan SDHCI 5.1 PHY
55 - const: xlnx,zynqmp-8.9a # ZynqMP SDHCI 8.9a PHY
61 - const: xlnx,versal-8.9a # Versal SDHCI 8.9a PHY
H A Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
H A Dsdhci-spear.txt1 * SPEAr SDHCI Controller
H A Dnpcm,sdhci.yaml7 title: NPCM SDHCI Controller
H A Dbrcm,kona-sdhci.yaml7 title: Broadcom Kona family SDHCI controller
H A Dsdhci-milbeaut.txt1 * SOCIONEXT Milbeaut SDHCI controller
H A Dfujitsu,sdhci-fujitsu.yaml7 title: Fujitsu/Socionext SDHCI controller (F_SDH30)
/openbmc/qemu/hw/sd/
H A DKconfig13 config SDHCI config
21 select SDHCI
25 select SDHCI
/openbmc/u-boot/drivers/mmc/
H A DKconfig372 bool "Support SDHCI SDMA"
391 bool "Atmel SDHCI controller support"
452 Interface(SDHCI) support.
458 bool "Qualcomm SDHCI controller"
468 bool "SDHCI support on Marvell platform"
480 bool "Microchip PIC32 on-chip SDHCI support"
495 bool "SDHCI support on Samsung S5P SoC"
506 bool "SDHCI support on ST SPEAr platform"
525 bool "SDHCI support for the Xenon SDHCI controller"
536 bool "Tangier SDHCI controller support"
[all …]
/openbmc/linux/drivers/mmc/host/
H A DKconfig85 need to overwrite SDHCI IO memory accessors.
99 This is the case for the Nintendo Wii SDHCI.
102 tristate "SDHCI support on PCI bus"
130 tristate "SDHCI support for ACPI enumerated SDHCI controllers"
143 tristate "SDHCI platform and OF driver helper"
154 tristate "SDHCI OF support for the Arasan SDHCI controllers"
168 tristate "SDHCI OF support for the ASPEED SDHCI controller"
218 tristate "SDHCI OF support for the Nintendo Wii SDHCI controllers"
375 bool "DMA support on S3C SDHCI"
390 Interface(SDHCI) support.
[all …]
/openbmc/u-boot/doc/device-tree-bindings/mmc/
H A Dmsm_sdhci.txt1 Qualcomm Snapdragon SDHCI controller
6 - Host controller registers (SDHCI)
12 by generic SDHCI code).
/openbmc/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dakebono.txt14 1.a) The Secure Digital Host Controller Interface (SDHCI) node
21 - reg : should contain the SDHCI registers location and length.
22 - interrupts : should contain the SDHCI interrupt.
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-gated-clock.txt21 17 sdio SDHCI Host
40 17 sdio SDHCI Host
111 17 sdio SDHCI Host
128 17 sdio SDHCI Host
141 8 sdio0 SDHCI Host 0
142 9 sdio1 SDHCI Host 1
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6115p-lenovo-j606f.dts178 /* 3.056V capped to 2.96V for SDHCI */
181 /* Broken hw, this one can't be turned off or SDHCI will break! */
191 /* 1.2V-1.304V fixed at 1.256V for SDHCI bias */
195 * TODO: SDHCI seems to also work with this one turned off, however
277 /* 3.304V capped to 2.96V for SDHCI */
280 /* Broken hw, this one can't be turned off or SDHCI will break! */
/openbmc/qemu/hw/arm/
H A DKconfig70 select SDHCI
375 select SDHCI
444 select SDHCI
500 select SDHCI
560 select SDHCI
585 select SDHCI
641 select SDHCI
657 select SDHCI
/openbmc/qemu/docs/system/arm/
H A Dcubieboard.rst14 - SDHCI
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm283x-rpi-wifi-bt.dtsi9 /* SDHCI is used to control the SDIO for wireless */
/openbmc/linux/Documentation/devicetree/bindings/powerpc/nintendo/
H A Dwii.txt110 1.i) The Secure Digital Host Controller Interface (SDHCI) nodes
117 - reg : should contain the SDHCI registers location and length
118 - interrupts : should contain the SDHCI interrupt
/openbmc/linux/arch/arm/mach-s3c/
H A DKconfig.s3c64xx53 Internal configuration for default SDHCI setup for S3C6400 and
85 Common setup code for S3C64XX SDHCI GPIO configurations
/openbmc/u-boot/arch/arm/dts/
H A Dbcm2837-rpi-3-b.dts36 /* SDHCI is used to control the SDIO for wireless */
/openbmc/u-boot/arch/arm/mach-zynqmp/
H A DKconfig106 This option reflects that board has two SDHCI controllers which
109 SDHCI0 controller. Platforms which have only one SDHCI controller
/openbmc/u-boot/arch/arm/mach-bcmstb/
H A DKconfig40 int "Index of preferred BCMSTB SDHCI alias in DTB"

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