Revision tags: v9.2.1, v9.2.0, v9.1.2, v9.1.1, v9.1.0, v8.0.0 |
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48e32aa1 |
| 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
qtest: remote_i3c: Add remote I3C qtest
This adds a remote I3C qtest using the Aspeed I3C controller and an AST2600 board.
The qtest uses a basic Aspeed I3C driver to test: - data transmission from
qtest: remote_i3c: Add remote I3C qtest
This adds a remote I3C qtest using the Aspeed I3C controller and an AST2600 board.
The qtest uses a basic Aspeed I3C driver to test: - data transmission from controller to target - data reception from target to controller - target sending an IBI (with data bytes) to controller
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Patrick Venture <venture@google.com>
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c8944934 |
| 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com> Reviewed-by: Titus Rwantare <titusr@google.com> [ clg: - replaced softmmu_ss with system_ss in meson.build files - local variable renames in aspeed_i3c_realize() ]
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Revision tags: v7.2.0, v7.0.0, v6.2.0, v6.1.0, v5.2.0, v5.0.0, v4.2.0, v4.0.0 |
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d7c25c46 |
| 03-Apr-2019 |
Cédric Le Goater <clg@kaod.org> |
i2c: Add a ir35221 device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric Le Goater <c
i2c: Add a ir35221 device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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1b9844d6 |
| 02-Apr-2019 |
Cédric Le Goater <clg@kaod.org> |
i2c: Add a IBM CFF Power Supply device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric
i2c: Add a IBM CFF Power Supply device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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7e1e49d7 |
| 11-Aug-2022 |
Cédric Le Goater <clg@kaod.org> |
pci: Add Aspeed host bridge (WIP)
IRQ:
167 AHB to PCIe Bus bridge L 168 AHB to PCIe Bus bridge H
MEM:
1E6E:D000-1E6E:D1FF PCIe Host Controller (RC/Bridge) 1E6E:D200-1E6E:D3FF PCIe Host Co
pci: Add Aspeed host bridge (WIP)
IRQ:
167 AHB to PCIe Bus bridge L 168 AHB to PCIe Bus bridge H
MEM:
1E6E:D000-1E6E:D1FF PCIe Host Controller (RC/Bridge) 1E6E:D200-1E6E:D3FF PCIe Host Controller (RC) 1E77:0000-1E77:0FFF AHB to PCIe RC bridge controller 6000:0000-7FFF:FFFF PCIe memory window.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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040d1502 |
| 12-Nov-2024 |
Guenter Roeck <linux@roeck-us.net> |
usb/uhci: Add support for usb-uhci-sysbus
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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ee53f8a6 |
| 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
qtest: remote_i3c: Add remote I3C qtest
This adds a remote I3C qtest using the Aspeed I3C controller and an AST2600 board.
The qtest uses a basic Aspeed I3C driver to test: - data transmission from
qtest: remote_i3c: Add remote I3C qtest
This adds a remote I3C qtest using the Aspeed I3C controller and an AST2600 board.
The qtest uses a basic Aspeed I3C driver to test: - data transmission from controller to target - data reception from target to controller - target sending an IBI (with data bytes) to controller
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Patrick Venture <venture@google.com>
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7d87775f |
| 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture
hw/misc/aspeed_i3c: Move to i3c directory
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com> Reviewed-by: Titus Rwantare <titusr@google.com> [ clg: - replaced softmmu_ss with system_ss in meson.build files - local variable renames in aspeed_i3c_realize() ]
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7ac65cd7 |
| 03-Apr-2019 |
Cédric Le Goater <clg@kaod.org> |
i2c: Add a ir35221 device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric Le Goater <c
i2c: Add a ir35221 device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
show more ...
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46f3d6a1 |
| 02-Apr-2019 |
Cédric Le Goater <clg@kaod.org> |
i2c: Add a IBM CFF Power Supply device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric
i2c: Add a IBM CFF Power Supply device
Simple model of a PSU device of the witherspoon.
TODO: - generate "real" values - implement property visitors to generate faults.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
show more ...
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8d40a557 |
| 11-Aug-2022 |
Cédric Le Goater <clg@kaod.org> |
pci: Add Aspeed host bridge (WIP)
IRQ:
167 AHB to PCIe Bus bridge L 168 AHB to PCIe Bus bridge H
MEM:
1E6E:D000-1E6E:D1FF PCIe Host Controller (RC/Bridge) 1E6E:D200-1E6E:D3FF PCIe Host Co
pci: Add Aspeed host bridge (WIP)
IRQ:
167 AHB to PCIe Bus bridge L 168 AHB to PCIe Bus bridge H
MEM:
1E6E:D000-1E6E:D1FF PCIe Host Controller (RC/Bridge) 1E6E:D200-1E6E:D3FF PCIe Host Controller (RC) 1E77:0000-1E77:0FFF AHB to PCIe RC bridge controller 6000:0000-7FFF:FFFF PCIe memory window.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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83698261 |
| 12-Nov-2024 |
Guenter Roeck <linux@roeck-us.net> |
usb/uhci: Add support for usb-uhci-sysbus
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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37fdb2f5 |
| 24-Oct-2024 |
Manos Pitsidianakis <manos.pitsidianakis@linaro.org> |
rust: add PL011 device model
This commit adds a re-implementation of hw/char/pl011.c in Rust.
How to build:
1. Configure a QEMU build with: --enable-system --target-list=aarch64-softmmu --enabl
rust: add PL011 device model
This commit adds a re-implementation of hw/char/pl011.c in Rust.
How to build:
1. Configure a QEMU build with: --enable-system --target-list=aarch64-softmmu --enable-rust 2. Launching a VM with qemu-system-aarch64 should use the Rust version of the pl011 device
Co-authored-by: Junjie Mao <junjie.mao@intel.com> Co-authored-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Junjie Mao <junjie.mao@intel.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-2-051e7a25b978@linaro.org
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ca5aa28e |
| 24-Oct-2024 |
Manos Pitsidianakis <manos.pitsidianakis@linaro.org> |
Revert "rust: add PL011 device model"
Patch was applied with invalid authorship by accident, which confuses git tooling that look at git blame for contributors etc.
Patch will be re-applied with co
Revert "rust: add PL011 device model"
Patch was applied with invalid authorship by accident, which confuses git tooling that look at git blame for contributors etc.
Patch will be re-applied with correct authorship right after this commit.
This reverts commit d0f0cd5b1f7e9780753344548e17ad4df9fcf5d8.
Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-1-051e7a25b978@linaro.org
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9a7b0a86 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-aspeed-20241104' of https://github.com/legoater/qemu into staging
aspeed queue:
* Fixed eMMC size calculation * Fixed IRQ definitions on AST2700 * Added RTC support to AST2700 * Fix
Merge tag 'pull-aspeed-20241104' of https://github.com/legoater/qemu into staging
aspeed queue:
* Fixed eMMC size calculation * Fixed IRQ definitions on AST2700 * Added RTC support to AST2700 * Fixed timer IRQ status on AST2600 * Improved SDHCI model with new registers * Added -nodefaults support to AST1030 * Provided a way to use an eMMC device without boot partitions
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* tag 'pull-aspeed-20241104' of https://github.com/legoater/qemu: aspeed: Don't set always boot properties of the emmc device aspeed: Support create flash devices via command line for AST1030 hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0 and 1 hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600 hw/timer/aspeed: Fix coding style aspeed/soc: Support RTC for AST2700 hw/arm/aspeed_ast27x0: Avoid hardcoded '256' in IRQ calculation hw/arm/aspeed_ast27x0: Use bsa.h for PPI definitions hw/sd/sdcard: Fix calculation of size when using eMMC boot partitions hw/arm: enable at24c with aspeed
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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deb771d8 |
| 28-Oct-2024 |
Patrick Leis <venture@google.com> |
hw/arm: enable at24c with aspeed
Enable AT24C with ASPEED in the KConfig because the boards build this device.
Signed-off-by: Patrick Leis <venture@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.
hw/arm: enable at24c with aspeed
Enable AT24C with ASPEED in the KConfig because the boards build this device.
Signed-off-by: Patrick Leis <venture@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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f774a677 |
| 15-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add R
Merge tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add RCC device to stm32f405 SoC * arm/gicv3: add missing casts * hw/misc: Create STM32L4x5 SYSCFG clock * hw/arm: Add SPI to Allwinner A10 * hw/intc/omap_intc: Remove now-unnecessary abstract base class * hw/char/pl011: Use correct masks for IBRD and FBRD * docs/devel: Convert txt files to rST * Remove MAX111X, MAX7310, DSCM-1XXXX, pcmcia devices (used only by now-removed omap/pxa2xx boards) * vl.c: Remove pxa2xx-specific -portrait and -rotate options * dma: Fix function names in documentation * hw/arm/xilinx_zynq: Add various missing unimplemented devices
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* tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm: (28 commits) hw/arm/xilinx_zynq: Add various missing unimplemented devices dma: Fix function names in documentation vl.c: Remove pxa2xx-specific -portrait and -rotate options hw/block: Remove ecc hw: Remove PCMCIA subsystem hw/ide: Remove DSCM-1XXXX microdrive device model hw/gpio: Remove MAX7310 device hw/adc: Remove MAX111X device docs/devel/lockcnt: Include kernel-doc API documentation include: Move QemuLockCnt APIs to their own header docs/devel/rcu: Convert to rST format docs/devel/multiple-iothreads: Convert to rST format docs/devel/lockcnt: Convert to rST format docs/devel/blkverify: Convert to rST format docs/devel/blkdebug: Convert to rST format hw/char/pl011: Use correct masks for IBRD and FBRD hw/intc/omap_intc: Remove now-unnecessary abstract base class hw/arm: Add SPI to Allwinner A10 hw/ssi: Allwinner A10 SPI emulation tests/qtest: Check STM32L4x5 clock connections ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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48cbe686 |
| 14-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/block: Remove ecc
The ecc.c code was used only by the PXA2xx and OMAP2 SoC devices, which we have removed, so it is now completely unused.
Note that hw/misc/eccmemctl.c does not in fact use any
hw/block: Remove ecc
The ecc.c code was used only by the PXA2xx and OMAP2 SoC devices, which we have removed, so it is now completely unused.
Note that hw/misc/eccmemctl.c does not in fact use any of the code frome ecc.c, so that KConfig dependency was incorrect.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003140010.1653808-6-peter.maydell@linaro.org
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3341d1cb |
| 14-Oct-2024 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
hw/arm: Add SPI to Allwinner A10
The Allwinner A10 SPI controller is added to the Allwinner A10 description, so it is available when Cubieboard is emulated.
Update the documentation for Cubieboard
hw/arm: Add SPI to Allwinner A10
The Allwinner A10 SPI controller is added to the Allwinner A10 description, so it is available when Cubieboard is emulated.
Update the documentation for Cubieboard to indicate SPI availability.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Message-id: 20241001221349.8319-3-strahinja.p.jankovic@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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950dff9a |
| 14-Oct-2024 |
Román Cárdenas Rodríguez <rcardenas.rod@gmail.com> |
hw/arm/stm32f405: Add RCC device to stm32f405 SoC
Add the reset and clock controller device to the stm32f405 SoC.
Signed-off-by: Roman Cardenas Rodriguez <rcardenas.rod@gmail.com> [PMM: tweak commi
hw/arm/stm32f405: Add RCC device to stm32f405 SoC
Add the reset and clock controller device to the stm32f405 SoC.
Signed-off-by: Roman Cardenas Rodriguez <rcardenas.rod@gmail.com> [PMM: tweak commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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b38d263b |
| 11-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* first commit for Rust support * add CI job using Fedora + Rust nightly * fix detection of ATOMIC128 on x86_64 * fix compila
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* first commit for Rust support * add CI job using Fedora + Rust nightly * fix detection of ATOMIC128 on x86_64 * fix compilation with Sphinx 8.1.0
# -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmcJEKUUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOSZQf+LlvZm9npHR6lZ9DEruhu/uf0c1gO # 9+dBJiKQ1OWopSQOqEgOsLL0J123Ls4V8O3tzZwIDuuRofCB2+wKswad6CHoydJx # 4p9rRXv6MLlnTqqGxemm/dPZqJ7+6L0poHoDKW+s7AgfVDshhj1RSbQfs8Ujh41F # f1sdi3DzopVWtK4CE+8/UeLy5Cxlixke9SKhYQrFHrdsANARP81gxQjczKApMc1z # v9qkrLtkM06VUyuvbPps7CHSHDpzx9mXcmkkPgLqLX9MfbCztzi44aVSaS9HYk5G # y54dSKdY7VJEuGhG916G+GMDJyow4nhT9Gk6tWtk63TQN5nExVsoZMOmdw== # =PFGL # -----END PGP SIGNATURE----- # gpg: Signature made Fri 11 Oct 2024 12:48:53 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: docs: use consistent markup for footnotes docs: avoid footnotes consisting of just URLs docs: fix invalid footnote syntax gitlab-ci: add Rust-enabled CI job dockerfiles: add a Dockerfile using a nightly Rust toolchain meson: ensure -mcx16 is passed when detecting ATOMIC128 meson: define qemu_isa_flags meson: fix machine option for x86_version rust: add PL011 device model rust: add utility procedural macro crate scripts/archive-source: find directory name for subprojects rust: add crate to expose bindings and interfaces meson.build: add HAVE_GLIB_WITH_ALIGNED_ALLOC flag .gitattributes: add Rust diff and merge attributes rust: add bindgen step as a meson dependency configure, meson: detect Rust toolchain build-sys: Add rust feature option Require meson version 1.5.0
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d0f0cd5b |
| 10-Oct-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
rust: add PL011 device model
This commit adds a re-implementation of hw/char/pl011.c in Rust.
How to build:
1. Configure a QEMU build with: --enable-system --target-list=aarch64-softmmu --enabl
rust: add PL011 device model
This commit adds a re-implementation of hw/char/pl011.c in Rust.
How to build:
1. Configure a QEMU build with: --enable-system --target-list=aarch64-softmmu --enable-rust 2. Launching a VM with qemu-system-aarch64 should use the Rust version of the pl011 device
Co-authored-by: Junjie Mao <junjie.mao@intel.com> Co-authored-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Junjie Mao <junjie.mao@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/6ec1d4fb8db2a1d7ba94c73e65d9770371b7857d.1727961605.git.manos.pitsidianakis@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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b5ab62b3 |
| 04-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* pc: Add a description for the i8042 property * kvm: support for nested FRED * tests/unit: fix warning when compiling test-n
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* pc: Add a description for the i8042 property * kvm: support for nested FRED * tests/unit: fix warning when compiling test-nested-aio-poll with LTO * kvm: refactoring of VM creation * target/i386: expose IBPB-BRTYPE and SBPB CPUID bits to the guest * hw/char: clean up serial * remove virtfs-proxy-helper * target/i386/kvm: Report which action failed in kvm_arch_put/get_registers * qom: improvements to object_resolve_path*()
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (23 commits) qom: update object_resolve_path*() documentation qom: set *ambiguous on all paths qom: rename object_resolve_path_type() "ambiguousp" target/i386/kvm: Report which action failed in kvm_arch_put/get_registers kvm: Allow kvm_arch_get/put_registers to accept Error** accel/kvm: refactor dirty ring setup minikconf: print error entirely on stderr 9p: remove 'proxy' filesystem backend driver hw/char: Extract serial-mm hw/char/serial.h: Extract serial-isa.h hw: Remove unused inclusion of hw/char/serial.h target/i386: Expose IBPB-BRTYPE and SBPB CPUID bits to the guest kvm: refactor core virtual machine creation into its own function kvm/i386: replace identity_base variable with a constant kvm/i386: refactor kvm_arch_init and split it into smaller functions kvm: replace fprintf with error_report()/printf() in kvm_init() kvm/i386: fix return values of is_host_cpu_intel() kvm/i386: make kvm_filter_msr() and related definitions private to kvm module hw/i386/pc: Add a description for the i8042 property tests/unit: remove block layer code from test-nested-aio-poll ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts: # hw/arm/Kconfig # hw/arm/pxa2xx.c
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7e6b5497 |
| 05-Sep-2024 |
Bernhard Beschow <shentey@gmail.com> |
hw/char: Extract serial-mm
hw/char/serial currently contains the implementation of both TYPE_SERIAL and TYPE_SERIAL_MM. According to serial_class_init(), TYPE_SERIAL is an internal class while TYPE_
hw/char: Extract serial-mm
hw/char/serial currently contains the implementation of both TYPE_SERIAL and TYPE_SERIAL_MM. According to serial_class_init(), TYPE_SERIAL is an internal class while TYPE_SERIAL_MM is used by numerous machine types directly. Let's move the latter into its own module which makes the dependencies more obvious and the code more tidy.
The includes and the dependencies have been converted mechanically except in the hw/char directories which were updated manually. The result was compile-tested. Now, only hw/char makes direct use of TYPE_SERIAL:
# grep -r -e "select SERIAL" | grep -v SERIAL_ hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL
# grep -r -e "/serial\\.h" include/hw/char/serial-mm.h:#include "hw/char/serial.h" hw/char/serial-pci-multi.c:#include "hw/char/serial.h" hw/char/serial.c:#include "hw/char/serial.h" hw/char/serial-isa.c:#include "hw/char/serial.h" hw/char/serial-pci.c:#include "hw/char/serial.h"
Tested-by: Andrew Jeffery <andrew@codeconstruct.com.au> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Link: https://lore.kernel.org/r/20240905073832.16222-4-shentey@gmail.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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062cfce8 |
| 01-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20241001' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * MAINTAINERS: Update STM32L4x5 and B-L475E-IOT01A maintainers * hw/arm/xlnx:
Merge tag 'pull-target-arm-20241001' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * MAINTAINERS: Update STM32L4x5 and B-L475E-IOT01A maintainers * hw/arm/xlnx: Connect secondary CGEM IRQs * m25p80: Add SFDP table for mt35xu01g flash * target/arm: Avoid target_ulong for physical address lookups * hw/ssi/xilinx_spips: Fix flash erase assert in dual parallel configuration * hw: fix memory leak in IRQState allocation * hw/sd/sdcard: Fix handling of disabled boot partitions * arm: Remove deprecated board models
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* tag 'pull-target-arm-20241001' of https://git.linaro.org/people/pmaydell/qemu-arm: (54 commits) hw: Remove omap2 specific defines and enums hw/dma: Remove omap_dma4 device hw/misc/omap_clk: Remove OMAP2-specifics hw/misc: Remove omap_l4 device hw/display: Remove omap_dss hw/misc: Remove omap_tap device hw/ssi: Remove omap_mcspi hw/timer: Remove omap_synctimer hw/timer: Remove omap_gptimer hw/misc: Remove omap_gpmc hw/misc: Remove omap_sdrc device hw/sd: Remove omap2_mmc device hw/intc: Remove omap2-intc device hw/char: Remove omap2_uart hw/gpio: Remove TYPE_OMAP2_GPIO hw/arm: Remove omap2.c docs: Document removal of old Arm boards hw/usb: Remove MUSB USB host controller hw/usb: Remove tusb6010 USB controller hw/block: Remove OneNAND device ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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