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Searched refs:SCLK_TIMER2 (Results 1 – 25 of 25) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3128-cru.h29 #define SCLK_TIMER2 87 macro
H A Drk3036-cru.h30 #define SCLK_TIMER2 87 macro
H A Drk3228-cru.h32 #define SCLK_TIMER2 87 macro
H A Drk3188-cru-common.h42 #define SCLK_TIMER2 86 macro
H A Drk3288-cru.h39 #define SCLK_TIMER2 87 macro
H A Drk3368-cru.h49 #define SCLK_TIMER2 87 macro
H A Drk3328-cru.h37 #define SCLK_TIMER2 49 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3036-cru.h30 #define SCLK_TIMER2 87 macro
H A Drk3188-cru-common.h42 #define SCLK_TIMER2 86 macro
H A Drk3128-cru.h33 #define SCLK_TIMER2 87 macro
H A Drk3228-cru.h33 #define SCLK_TIMER2 87 macro
H A Dpx30-cru.h42 #define SCLK_TIMER2 40 macro
H A Drk3308-cru.h36 #define SCLK_TIMER2 32 macro
H A Drk3328-cru.h38 #define SCLK_TIMER2 49 macro
H A Drk3288-cru.h42 #define SCLK_TIMER2 87 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3188.c607 GATE(SCLK_TIMER2, "timer2", "xin24m", 0,
711 GATE(SCLK_TIMER2, "timer2", "xin24m", 0, RK2928_CLKGATE_CON(3), 4, GFLAGS),
H A Dclk-rk3036.c232 COMPOSITE_NODIV(SCLK_TIMER2, "sclk_timer2", mux_timer_p, CLK_IGNORE_UNUSED,
H A Dclk-rk3128.c295 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0,
H A Dclk-rk3228.c358 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0,
H A Dclk-rk3328.c482 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0,
H A Dclk-rk3288.c401 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0,
H A Dclk-px30.c755 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0,
H A Dclk-rk3308.c417 GATE(SCLK_TIMER2, "sclk_timer2", "xin24m", 0,
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3066a.dtsi225 clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>;
H A Drk3128.dtsi253 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER2>;