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Searched refs:SCLK_TIMER0 (Results 1 – 25 of 30) sorted by relevance

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/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3128-cru.h27 #define SCLK_TIMER0 85 macro
H A Drk3036-cru.h28 #define SCLK_TIMER0 85 macro
H A Drk3228-cru.h30 #define SCLK_TIMER0 85 macro
H A Drk3188-cru-common.h40 #define SCLK_TIMER0 84 macro
H A Drk3288-cru.h37 #define SCLK_TIMER0 85 macro
H A Drv1108-cru.h28 #define SCLK_TIMER0 78 macro
H A Drk3368-cru.h47 #define SCLK_TIMER0 85 macro
H A Drk3328-cru.h35 #define SCLK_TIMER0 47 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3036-cru.h28 #define SCLK_TIMER0 85 macro
H A Drk3188-cru-common.h40 #define SCLK_TIMER0 84 macro
H A Drk3128-cru.h31 #define SCLK_TIMER0 85 macro
H A Drk3228-cru.h31 #define SCLK_TIMER0 85 macro
H A Drv1108-cru.h28 #define SCLK_TIMER0 78 macro
H A Dpx30-cru.h40 #define SCLK_TIMER0 38 macro
H A Drk3308-cru.h34 #define SCLK_TIMER0 30 macro
H A Drk3328-cru.h36 #define SCLK_TIMER0 47 macro
H A Drk3288-cru.h40 #define SCLK_TIMER0 85 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c226 COMPOSITE_NODIV(SCLK_TIMER0, "sclk_timer0", mux_timer_p, CLK_IGNORE_UNUSED,
H A Dclk-rk3128.c291 GATE(SCLK_TIMER0, "sclk_timer0", "xin24m", 0,
H A Dclk-rk3228.c354 GATE(SCLK_TIMER0, "sclk_timer0", "xin24m", 0,
H A Dclk-rk3328.c478 GATE(SCLK_TIMER0, "sclk_timer0", "xin24m", 0,
H A Dclk-rv1108.c555 GATE(SCLK_TIMER0, "clk_timer0", "xin24m", 0,
H A Dclk-rk3188.c441 GATE(SCLK_TIMER0, "timer0", "xin24m", 0, RK2928_CLKGATE_CON(1), 0, GFLAGS),
H A Dclk-rk3288.c397 GATE(SCLK_TIMER0, "sclk_timer0", "xin24m", 0,
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3066a.dtsi245 clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>;

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