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Searched refs:RVC (Results 1 – 13 of 13) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu.c43 RVC, RVS, RVU, RVH, RVJ, RVG, 0};
382 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVF | RVD | RVC | RVU); in riscv_any_cpu_init()
437 RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv64_sifive_u_cpu_init()
455 riscv_cpu_set_misa(env, MXL_RV64, RVI | RVM | RVA | RVC | RVU); in rv64_sifive_e_cpu_init()
472 riscv_cpu_set_misa(env, MXL_RV64, RVG | RVC | RVS | RVU); in rv64_thead_c906_cpu_init()
503 riscv_cpu_set_misa(env, MXL_RV64, RVG | RVC | RVS | RVU | RVH); in rv64_veyron_v1_cpu_init()
573 RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv32_sifive_u_cpu_init()
591 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVC | RVU); in rv32_sifive_e_cpu_init()
608 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVC | RVU); in rv32_ibex_cpu_init()
625 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVF | RVC | RVU); in rv32_imafcu_nommu_cpu_init()
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H A Dop_helper.c274 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) { in helper_sret()
326 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) { in helper_mret()
H A Dtranslate.c562 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { in gen_jal()
1144 if ((has_ext(ctx, RVC) || ctx->cfg_ptr->ext_zca) && in decode_opc()
H A Dcpu.h66 #define RVC RV('C') macro
H A Dcsr.c1436 if ((val & RVC) && (GETPC() & ~3) != 0) { in write_misa()
1437 val &= ~RVC; in write_misa()
/openbmc/u-boot/doc/
H A DREADME.AX2517 - RVC for 16-bit compressed instructions
/openbmc/qemu/target/riscv/tcg/
H A Dtcg-cpu.c468 if (riscv_has_ext(env, RVC) && env->priv_ver >= PRIV_VERSION_1_12_0) { in riscv_cpu_validate_set_extensions()
782 MISA_CFG(RVC, true),
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc66 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) {
184 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca &&
H A Dtrans_rvf.c.inc36 if (!has_ext(ctx, RVF) || !has_ext(ctx, RVC)) { \
H A Dtrans_rvd.c.inc36 if (!has_ext(ctx, RVD) || !has_ext(ctx, RVC)) { \
/openbmc/qemu/target/riscv/kvm/
H A Dkvm-cpu.c135 KVM_MISA_CFG(RVC, KVM_RISCV_ISA_EXT_C),
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc290 * RISC-V immediate and instruction encoders (excludes 16-bit RVC)
/openbmc/qemu/linux-user/
H A Dsyscall.c8850 value |= riscv_has_ext(env, RVC) ? in risc_hwprobe_fill_pairs()