Searched refs:RVC (Results 1 – 13 of 13) sorted by relevance
/openbmc/qemu/target/riscv/ |
H A D | cpu.c | 43 RVC, RVS, RVU, RVH, RVJ, RVG, 0}; 382 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVF | RVD | RVC | RVU); in riscv_any_cpu_init() 437 RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv64_sifive_u_cpu_init() 455 riscv_cpu_set_misa(env, MXL_RV64, RVI | RVM | RVA | RVC | RVU); in rv64_sifive_e_cpu_init() 472 riscv_cpu_set_misa(env, MXL_RV64, RVG | RVC | RVS | RVU); in rv64_thead_c906_cpu_init() 503 riscv_cpu_set_misa(env, MXL_RV64, RVG | RVC | RVS | RVU | RVH); in rv64_veyron_v1_cpu_init() 573 RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv32_sifive_u_cpu_init() 591 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVC | RVU); in rv32_sifive_e_cpu_init() 608 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVC | RVU); in rv32_ibex_cpu_init() 625 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVF | RVC | RVU); in rv32_imafcu_nommu_cpu_init() [all …]
|
H A D | op_helper.c | 274 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) { in helper_sret() 326 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) { in helper_mret()
|
H A D | translate.c | 562 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { in gen_jal() 1144 if ((has_ext(ctx, RVC) || ctx->cfg_ptr->ext_zca) && in decode_opc()
|
H A D | cpu.h | 66 #define RVC RV('C') macro
|
H A D | csr.c | 1436 if ((val & RVC) && (GETPC() & ~3) != 0) { in write_misa() 1437 val &= ~RVC; in write_misa()
|
/openbmc/u-boot/doc/ |
H A D | README.AX25 | 17 - RVC for 16-bit compressed instructions
|
/openbmc/qemu/target/riscv/tcg/ |
H A D | tcg-cpu.c | 468 if (riscv_has_ext(env, RVC) && env->priv_ver >= PRIV_VERSION_1_12_0) { in riscv_cpu_validate_set_extensions() 782 MISA_CFG(RVC, true),
|
/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvi.c.inc | 66 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { 184 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca &&
|
H A D | trans_rvf.c.inc | 36 if (!has_ext(ctx, RVF) || !has_ext(ctx, RVC)) { \
|
H A D | trans_rvd.c.inc | 36 if (!has_ext(ctx, RVD) || !has_ext(ctx, RVC)) { \
|
/openbmc/qemu/target/riscv/kvm/ |
H A D | kvm-cpu.c | 135 KVM_MISA_CFG(RVC, KVM_RISCV_ISA_EXT_C),
|
/openbmc/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 290 * RISC-V immediate and instruction encoders (excludes 16-bit RVC)
|
/openbmc/qemu/linux-user/ |
H A D | syscall.c | 8850 value |= riscv_has_ext(env, RVC) ? in risc_hwprobe_fill_pairs()
|