Searched refs:REG_HDMI_PHY_QSERDES_TX_LX_TX_EMP_POST1_LVL (Results 1 – 2 of 2) sorted by relevance
1272 #define REG_HDMI_PHY_QSERDES_TX_LX_TX_EMP_POST1_LVL 0x00000018 macro
506 REG_HDMI_PHY_QSERDES_TX_LX_TX_EMP_POST1_LVL, in hdmi_8996_pll_set_clk_rate()