Searched refs:REG_HDMI_8996_PHY_PD_CTL (Results 1 – 2 of 2) sorted by relevance
413 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x0); in hdmi_8996_pll_set_clk_rate()419 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1); in hdmi_8996_pll_set_clk_rate()532 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1F); in hdmi_8996_pll_set_clk_rate()
904 #define REG_HDMI_8996_PHY_PD_CTL 0x00000004 macro