Searched refs:REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK (Results 1 – 2 of 2) sorted by relevance
580 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK, 7); in a6xx_gmu_rpmh_init()
8047 #define REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK 0x00001573 macro