Searched refs:REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID (Results 1 – 2 of 2) sorted by relevance
583 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID, 0x10108); in a6xx_gmu_rpmh_init()586 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID + 4, 0x10108); in a6xx_gmu_rpmh_init()590 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID + 8, 0x10108); in a6xx_gmu_rpmh_init()
8051 #define REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID 0x00001575 macro