Searched refs:REG_A6XX_GPU_CC_GX_GDSCR (Results 1 – 2 of 2) sorted by relevance
442 #define REG_A6XX_GPU_CC_GX_GDSCR 0x00009c03 macro
390 gmu_rmw(gmu, REG_A6XX_GPU_CC_GX_GDSCR, 0, (1 << 11)); in a6xx_sptprac_disable()