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Searched refs:PWR_CSR1_ODRDY (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-stm32f4/
H A Dstm32_pwr.h14 #define PWR_CSR1_ODRDY BIT(16) macro
/openbmc/u-boot/arch/arm/include/asm/arch-stm32f7/
H A Dstm32_pwr.h14 #define PWR_CSR1_ODRDY BIT(16) macro
/openbmc/u-boot/drivers/clk/
H A Dclk_stm32f.c239 while (!(readl(&pwr->csr1) & PWR_CSR1_ODRDY)) in configure_clocks()