Home
last modified time | relevance | path

Searched refs:PRM_RSTCTRL (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dhardware_ti816x.h39 #define PRM_RSTCTRL (PRCM_BASE + 0x00A0) macro
40 #define PRM_RSTST (PRM_RSTCTRL + 8)
H A Dhardware_ti814x.h30 #define PRM_RSTCTRL (PRCM_BASE + 0x00A0) macro
31 #define PRM_RSTST (PRM_RSTCTRL + 8)
H A Dhardware_am33xx.h40 #define PRM_RSTCTRL (PRCM_BASE + 0x0F00) macro
41 #define PRM_RSTST (PRM_RSTCTRL + 8)
H A Dhardware_am43xx.h38 #define PRM_RSTCTRL (PRCM_BASE + 0x4000) macro
39 #define PRM_RSTST (PRM_RSTCTRL + 4)
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dlowlevel_init.S16 ldr x1, =PRM_RSTCTRL
37 .word PRM_RSTCTRL
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dreset.c18 writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL); in reset_cpu()
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dtegra.h105 #define PRM_RSTCTRL NV_PA_PMC_BASE macro
/openbmc/u-boot/arch/arm/include/asm/arch-omap4/
H A Dcpu.h104 #define PRM_RSTCTRL PRM_DEVICE_BASE macro
/openbmc/u-boot/arch/arm/include/asm/arch-omap5/
H A Dcpu.h112 #define PRM_RSTCTRL PRM_DEVICE_BASE macro
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Dcpu.h410 #define PRM_RSTCTRL 0x48307250 macro