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Searched refs:PRCMU_DSI0ESCCLK (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/mfd/
H A Ddbx500-prcmu.h70 #define PRCMU_DSI0ESCCLK 49 macro
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dste,mcde.yaml133 clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
/openbmc/linux/drivers/mfd/
H A Ddb8500-prcmu.c1383 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in db8500_prcmu_request_clock()
1384 return request_dsiescclk((clock - PRCMU_DSI0ESCCLK), enable); in db8500_prcmu_request_clock()
1560 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_clock_rate()
1561 return dsiescclk_rate(clock - PRCMU_DSI0ESCCLK); in prcmu_clock_rate()
1741 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_round_clock_rate()
1913 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_set_clock_rate()
1914 set_dsiescclk_rate((clock - PRCMU_DSI0ESCCLK), rate); in prcmu_set_clock_rate()
/openbmc/linux/drivers/clk/ux500/
H A Du8500_of_clk.c286 u8500_prcmu_hw_clks.hws[PRCMU_DSI0ESCCLK] = in u8500_clk_init()
288 PRCMU_DSI0ESCCLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0.dtsi1199 clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;