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Searched refs:PLLE_MISC (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c636 #define PLLE_MISC 0x0ec macro
661 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()
689 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
693 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
695 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
704 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
708 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
720 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c665 #define PLLE_MISC 0x0ec macro
690 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()
718 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
722 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
724 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
750 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
754 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
766 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1134 #define PLLE_MISC 0x0ec macro
1170 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1172 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1191 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1196 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1207 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1240 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1242 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c949 #define PLLE_MISC 0x0ec macro
977 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
984 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c61 #define PLLE_MISC 0xec macro
408 .misc_reg = PLLE_MISC,
H A Dclk-tegra114.c70 #define PLLE_MISC 0xec macro
562 .misc_reg = PLLE_MISC,
H A Dclk-tegra30.c70 #define PLLE_MISC 0xec macro
516 .misc_reg = PLLE_MISC,
H A Dclk-tegra124.c59 #define PLLE_MISC 0xec macro
478 .misc_reg = PLLE_MISC,