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Searched refs:PLL2 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/video/tegra124/
H A Dsor.c486 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
507 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
518 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
524 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
563 DUMP_REG(PLL2); in dump_sor_reg()
700 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
714 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
724 if (tegra_dc_sor_poll_register(sor, PLL2, in tegra_dc_sor_enable_dp()
732 tegra_sor_write_field(sor, PLL2, PLL2_AUX2_MASK | in tegra_dc_sor_enable_dp()
H A Dsor.h255 #define PLL2 0x19 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dstm32mp1-clks.h184 #define PLL2 177 macro