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Searched refs:PIXIS_SW2_LANE_67_SEL_5 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Deth_hydra.c274 #define PIXIS_SW2_LANE_67_SEL_5 0x00 macro
299 case PIXIS_SW2_LANE_67_SEL_5: in initialize_lane_to_slot()
H A Deth_superhydra.c236 #define PIXIS_SW2_LANE_67_SEL_5 0x00 macro
263 case PIXIS_SW2_LANE_67_SEL_5: in initialize_lane_to_slot()