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Searched refs:PG (Results 1 – 25 of 35) sorted by relevance

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/openbmc/linux/arch/m68k/include/asm/
H A DMC68328.h586 #define PG(x) (1 << (x)) macro
588 #define PG_UART_TXD PG(0) /* Use UART_TXD as PG(0) */
589 #define PG_UART_RXD PG(1) /* Use UART_RXD as PG(1) */
590 #define PG_PWMOUT PG(2) /* Use PWMOUT as PG(2) */
591 #define PG_TOUT2 PG(3) /* Use TOUT2 as PG(3) */
592 #define PG_TIN2 PG(4) /* Use TIN2 as PG(4) */
593 #define PG_TOUT1 PG(5) /* Use TOUT1 as PG(5) */
594 #define PG_TIN1 PG(6) /* Use TIN1 as PG(6) */
595 #define PG_RTCOUT PG(7) /* Use RTCOUT as PG(7) */
/openbmc/phosphor-dbus-interfaces/yaml/com/ibm/ipzvpd/
H A DCP00.interface.yaml12 - name: PG
15 PG keyword.Partial Good Vector.
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-boneblack.dts19 * All PG 2.0 silicon may not support 1GHz but some of the early
20 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
21 * to support 1GHz OPP so enable it for PG 2.0 on this board.
H A Ddra76x-mmc-iodelay.dtsi18 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
19 * 'rev20' for PG 2.0 and so on.
H A Ddra72x-mmc-iodelay.dtsi20 * a revision tag to both the new and old entry. Use 'rev10' for PG 1.0,
21 * 'rev20' for PG 2.0 and so on.
/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Dbq24257.yaml45 GPIO used for connecting the bq2425x device PG (Power Good) pin.
47 possible as this is the recommended way to obtain the charger's input PG
48 state. If this pin is not specified a software-based approach for PG
H A Dbq2515x.yaml35 GPIO used for connecting the bq2515x device PG (AC Detect)
/openbmc/linux/arch/loongarch/kernel/
H A Dhead.S55 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
130 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
/openbmc/linux/include/linux/ceph/
H A Drados.h317 f(PGLS, __CEPH_OSD_OP(RD, PG, 1), "pgls") \
318 f(PGLS_FILTER, __CEPH_OSD_OP(RD, PG, 2), "pgls-filter") \
319 f(PG_HITSET_LS, __CEPH_OSD_OP(RD, PG, 3), "pg-hitset-ls") \
320 f(PG_HITSET_GET, __CEPH_OSD_OP(RD, PG, 4), "pg-hitset-get")
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-t/
H A Duk-RidgeHill3 # <http://www.digitaluk.co.uk/coveragechecker/main/tradeexport/HR8�2PG/NA/0/>
/openbmc/linux/arch/loongarch/power/
H A Dsuspend_asm.S84 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
/openbmc/qemu/target/loongarch/tcg/
H A Dop_helper.c115 env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PG, 1); in helper_ertn()
/openbmc/linux/Documentation/devicetree/bindings/hwmon/
H A Dti,ina2xx.yaml48 the gain value maps directly with the PG bits of the config register.
/openbmc/linux/drivers/net/ethernet/qlogic/
H A DKconfig55 mode of DCB is supported. PG and PFC values are related only
/openbmc/u-boot/arch/arm/dts/
H A Ddra76x-mmc-iodelay.dtsi18 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
19 * 'rev20' for PG 2.0 and so on.
H A Ddra72x-mmc-iodelay.dtsi28 * a revision tag to both the new and old entry. Use 'rev10' for PG 1.0,
29 * 'rev20' for PG 2.0 and so on.
/openbmc/qemu/target/loongarch/
H A Dcpu.c241 env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PG, 0); in loongarch_cpu_do_interrupt()
371 if (FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PG)) { in loongarch_cpu_mmu_index()
530 env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PG, 0); in loongarch_cpu_reset_hold()
H A Dcpu_helper.c188 uint8_t pg = FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PG); in get_physical_address()
/openbmc/linux/arch/x86/kernel/
H A Dhead_32.S282 andl $0x80000011,%eax # Save PG,PE,ET
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dcpm_85xx.h69 #define mk_cr_cmd(PG, SBC, MCN, OP) \ argument
70 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dingenic,pinctrl.yaml25 ports, PA to PG, for a total of 224 pins.
/openbmc/linux/drivers/iio/temperature/
H A Dmlx90632.c897 s32 PT, PR, PG, PO; in mlx90632_calc_ambient_dsp105() local
904 ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_P_G, &PG); in mlx90632_calc_ambient_dsp105()
923 PT, PR, PG, PO, Gb); in mlx90632_calc_ambient_dsp105()
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-h2-plus-bananapi-m2-zero.dts240 /* PG */
H A Dsun7i-a20-bananapi.dts234 /* PG */
/openbmc/linux/arch/powerpc/include/asm/
H A Dcpm2.h76 #define mk_cr_cmd(PG, SBC, MCN, OP) \ argument
77 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)

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