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Searched refs:PCP (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_acl_flex_keys.c13 MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 13, 3),
21 MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 13, 3),
56 MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x08, 29, 3),
143 MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x00, 0, 3),
149 MLXSW_AFK_ELEMENT_INST_U32(PCP, 0x00, 0, 3),
H A Dcore_acl_flex_keys.c29 MLXSW_AFK_ELEMENT_INFO_U32(PCP, 0x10, 20, 3),
/openbmc/linux/Documentation/networking/dsa/
H A Dsja1105.rst113 on the VLAN PCP bits (if no VLAN is present, the port-based default is used).
117 for tagging. Therefore, the switch ignores the VLAN PCP if used in standalone
120 done by the DSA net devices, which populate the PCP field of the tagging header
122 offloaded flows can be steered to TX queues based on the VLAN PCP, but the DSA
126 towards the switch, with the VLAN PCP bits set appropriately.
130 disregards any VLAN PCP bits even if present. The traffic class for management
190 VLAN PCP.
214 of 100 and a PCP of 0::
303 The virtual link keys are always fixed at {MAC DA, VLAN ID, VLAN PCP}, but the
304 driver asks for the VLAN ID and VLAN PCP when the port is under a VLAN-aware
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dxgene.txt10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
16 Required properties for SoC or PCP PLL clocks:
/openbmc/linux/drivers/net/ethernet/microchip/lan966x/
H A DKconfig21 DSCP and PCP.
/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A DKconfig23 DSCP and PCP.
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dsumod.h40 # define PCP(x) ((x) << 8) macro
H A Dsumo_dpm.c198 rcu_pwr_gating_cntl |= PCP(0x77); in sumo_gfx_powergating_initialize()
228 rcu_pwr_gating_cntl |= PCP(0x77); in sumo_gfx_powergating_initialize()
254 rcu_pwr_gating_cntl |= PCP(0x77); in sumo_gfx_powergating_initialize()
/openbmc/linux/Documentation/devicetree/bindings/edac/
H A Dapm-xgene-edac.txt23 - reg : First resource shall be the CPU bus (PCP) resource.
/openbmc/linux/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/
H A Dswitch-driver.rst159 Example 2: drop frames received on eth4 with VID 100 and PCP of 3::
/openbmc/linux/Documentation/networking/device_drivers/ethernet/aquantia/
H A Datlantic.rst331 and User Priority (PCP) field of 802.1Q.
/openbmc/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpsw.c426 dpsw_set_field(tmp_conf, PCP, cfg->pcp); in dpsw_if_set_tci()
/openbmc/linux/sound/pci/
H A DKconfig605 FM801 chip with a TEA5757 tuner (MediaForte SF256-PCS, SF256-PCP and