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Searched refs:PCI_BASE_ADDRESS_3 (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/board/freescale/common/
H A Dcds_via.c52 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_3, 0x1fe4); in mpc85xx_config_via_usbide()
/openbmc/u-boot/drivers/misc/
H A Dswap_case.c96 case PCI_BASE_ADDRESS_3: in sandbox_swap_case_read_config()
/openbmc/qemu/hw/pci-host/
H A Dgt64120.c1236 pci_set_long(d->wmask + PCI_BASE_ADDRESS_3, 0xfffff008); /* CS[3], BootCS */ in gt64120_pci_realize()
1255 pci_set_long(d->config + PCI_BASE_ADDRESS_3, 0x1f000000); in gt64120_pci_reset_hold()
/openbmc/u-boot/drivers/pci/
H A Dpcie_layerscape.c384 writel(0, bar_base + PCI_BASE_ADDRESS_3); in ls_pcie_ep_setup_bar()
/openbmc/u-boot/cmd/
H A Dpci.c189 { "base address 3", PCI_SIZE_32, PCI_BASE_ADDRESS_3 },
/openbmc/qemu/tests/qtest/libqos/
H A Dpci.c523 PCI_BASE_ADDRESS_3, PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_5, in qpci_iomap()
/openbmc/qemu/include/standard-headers/linux/
H A Dpci_regs.h99 #define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ macro
/openbmc/u-boot/drivers/ata/
H A Dsata_sil3114.c657 pci_read_config_dword (devno, PCI_BASE_ADDRESS_3, &iobase[3]); in init_sata()
/openbmc/u-boot/include/
H A Dpci.h203 #define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ macro
/openbmc/qemu/hw/xen/
H A Dxen_pt_config_init.c740 .offset = PCI_BASE_ADDRESS_3,