Searched refs:MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 (Results 1 – 14 of 14) sorted by relevance
28 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
329 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1
740 #define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x258 0x628 0x000 0x5 0x0 macro
233 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b1 /* DIO_9 */
125 #define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x094 0x3a8 0x000 0x5 0x0 macro
469 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x0001b099
275 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1 /* HD1_SPI_CS */
618 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
533 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x15059 /*WL_IRQ*/
681 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 /* USB power */
556 fsl,pins = <MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x400120b0>;
1211 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
743 #define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x258 0x628 0x000 0x5 0x0 macro
129 #define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x094 0x3a8 0x000 0x5 0x0 macro