Searched refs:MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 (Results 1 – 9 of 9) sorted by relevance
747 #define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x25c 0x62c 0x000 0x5 0x0 macro
126 #define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x090 0x3a4 0x000 0x5 0x0 macro
744 #define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x25c 0x62c 0x000 0x5 0x0 macro
377 MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x4001b0b5 /* PICO_P24 */
232 MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b1 /* DIO_8 */
258 MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
122 #define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x090 0x3a4 0x000 0x5 0x0 macro
560 fsl,pins = <MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x400120b0>;
1210 MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0