| /openbmc/u-boot/doc/imx/habv4/ |
| H A D | introduction_habv4.txt | 2 + i.MX Secure and Encrypted Boot using HABv4 + 8 The i.MX family of applications processors provides the High Assurance Boot 14 This feature is supported in i.MX 50, i.MX 53, i.MX 6, i.MX 7 series and 15 i.MX 8M, i.MX 8MM devices. 31 keys. The resulting signed image data is then verified on the i.MX processor 38 Host PC + CST i.MX + HAB 56 ---> | + | -----> | i.MX | -----> | + | 93 Host PC + CST i.MX + HAB 114 | + CSF | ----> | i.MX | -------> | + CSF | 259 [1] CST: i.MX High Assurance Boot Reference Code Signing Tool. [all …]
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| /openbmc/u-boot/drivers/w1/ |
| H A D | Kconfig | 24 bool "Enable 1-wire controller on i.MX processors" 29 i.MX SoC family. 33 Newer i.MX SoCs such as the i.MX6 do not have one wire controllers.
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| /openbmc/qemu/disas/ |
| H A D | mips.c | 1181 #define MX INSN_MDMX macro 1982 {"add.ob", "X,Y,Q", 0x7800000b, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX|SB1 }, 1987 {"add.qh", "X,Y,Q", 0x7820000b, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX }, 1988 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_S|RD_T|FP_D, WR_MACC, MX|SB1 }, 1989 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_S|RD_T|FP_D, WR_MACC, MX }, 1992 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_S|RD_T|FP_D, WR_MACC, MX|SB1 }, 1993 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_S|RD_T|FP_D, WR_MACC, MX }, 1997 {"alni.ob", "X,Y,Z,O", 0x78000018, 0xff00003f, WR_D|RD_S|RD_T|FP_D, 0, MX|SB1 }, 1999 {"alni.qh", "X,Y,Z,O", 0x7800001a, 0xff00003f, WR_D|RD_S|RD_T|FP_D, 0, MX }, 2001 {"alnv.ob", "X,Y,Z,s", 0x78000019, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, 0, MX|SB1 }, [all …]
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| /openbmc/qemu/docs/system/arm/ |
| H A D | imx8mp-evk.rst | 1 NXP i.MX 8M Plus Evaluation Kit (``imx8mp-evk``) 4 The ``imx8mp-evk`` machine models the i.MX 8M Plus Evaluation Kit, based on an 5 i.MX 8M Plus SoC.
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| H A D | sabrelite.rst | 5 platform featuring the powerful Freescale / NXP Semiconductor's i.MX 6 Quad
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| /openbmc/u-boot/drivers/thermal/ |
| H A D | Kconfig | 12 bool "Temperature sensor driver for Freescale i.MX SoCs" 15 Support for Temperature Monitor (TEMPMON) found on Freescale i.MX SoCs.
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/imx-cst/ |
| H A D | imx-cst_3.4.0.bb | 1 SUMMARY = "i.MX code signing tool" 2 DESCRIPTION = "Code signing support that integrates the HABv4 and AHAB library for i.MX processors"
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| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | Kconfig | 17 bool "i.MX Resource domain controller driver" 20 i.MX Resource domain controller is used to assign masters 38 bool "Support i.MX HAB features"
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| /openbmc/u-boot/doc/device-tree-bindings/serial/ |
| H A D | mxc-serial.txt | 1 NXP i.MX (MXC) UART
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| /openbmc/u-boot/doc/imx/habv4/guides/ |
| H A D | mx6_mx7_spl_secure_boot.txt | 94 ARM architecture -> Support i.MX HAB features 180 [1] AN4581: "Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using
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| H A D | mx6_mx7_secure_boot.txt | 69 ARM architecture -> Support i.MX HAB features 146 The U-Boot fuse tool can be used for programming eFuses on i.MX SoCs. 171 The table below lists the SRK_HASH bank and word according to the i.MX device: 230 The table below list the SEC_CONFIG[1] bank and word according to the i.MX 266 and word according to the i.MX device: 401 [1] AN4581: "Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using
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| H A D | encrypted_boot.txt | 4 Encrypted Boot. The image is encrypted by i.MX Code Signing
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/crucible/ |
| H A D | crucible_2023.11.02.bb | 1 SUMMARY = "Utility that provides userspace support for reading and writing to the i.MX fuses"
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| /openbmc/u-boot/arch/arm/include/asm/mach-imx/ |
| H A D | imximage.cfg | 3 * i.MX image header offset values
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/bcu/ |
| H A D | bcu_1.1.115.bb | 3 features of NXP i.MX evaluation boards (EVK) from a host \
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| /openbmc/u-boot/doc/imx/misc/ |
| H A D | sdp.txt | 6 i.MX SoCs ROM Serial Downloader and provides means to download a program 24 The host side utilities are typically capable to interpret the i.MX 28 support beside the i.MX specific header the U-Boot legacy header.
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| /openbmc/u-boot/doc/device-tree-bindings/w1/ |
| H A D | mxc-w1.txt | 1 NXP i.MX (MXC) One wire bus master controller
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| /openbmc/openbmc/poky/meta/recipes-extended/shadow/files/ |
| H A D | securetty | 156 # Embedded Freescale i.MX ports
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| /openbmc/openbmc/poky/meta/recipes-core/busybox/busybox/ |
| H A D | 0002-nslookup-sanitize-all-printed-strings-with-printable.patch | 32 //printf("Cannot uncompress MX domain: %s\n", strerror(errno));
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| /openbmc/u-boot/doc/imx/common/ |
| H A D | imx6.txt | 76 Definition" from the "i.MX 6Dual/6Quad Applications Processor Reference Manual,
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| /openbmc/u-boot/board/bticino/mamoj/ |
| H A D | README | 39 …Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip i…
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| /openbmc/u-boot/drivers/pinctrl/nxp/ |
| H A D | Kconfig | 15 This provides a simple pinctrl driver for i.MX 53SoC familiy,
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| /openbmc/openbmc/meta-raspberrypi/recipes-graphics/userland/files/ |
| H A D | 0003-wayland-Add-Wayland-example.patch | 73 …ER2CO,9?P\=MZ5EU0BN4CO3DM%.%108F29J8IZ8HU&.;%*5(.9'1:,4B"/= /:3AM:HT?O[:MX@R]=OZ<Q[6GS0@L9GT%… 74 …MX;QX6LT:MU=OW:NU;LU=NW<MV;MY<MY;OZ<Q\:LW4EQ*6/7E/@M!.:+9E7CO(5",6!,6"+5)2;&/9&/<'3?*8DAQ^BS\-AH… 76 …MX]ozey�k��j}�h~�PfsE]iG\gJ[eO_l^n~�������������������і�ɓ�Ã��r��w��OfvI`pG^n{�������������������… 77 …RX4DJ:IO;KQ=KQ>LR9GM9EJ/;A5AG7EJ=MT?OUAR[WgpZlwM_jXjuQaoM]kJ\gFXcAS^>P[:LW<MX;PZ6JU<P]2CO6EU8GW<GY…
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| /openbmc/u-boot/drivers/i2c/ |
| H A D | Kconfig | 154 bool "NXP i.MX LPI2C driver" 156 Add support for the NXP i.MX LPI2C driver.
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| /openbmc/u-boot/drivers/usb/gadget/ |
| H A D | Kconfig | 164 using the same protocol as implemented by the i.MX family's boot ROM.
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