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Searched refs:MSR_P4_TBPU_ESCR1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h563 #define MSR_P4_TBPU_ESCR1 0x000003c3 macro
/openbmc/linux/arch/x86/events/intel/
H A Dp4.c357 .escr_msr = { MSR_P4_TBPU_ESCR0 , MSR_P4_TBPU_ESCR1 },
1205 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_TBPU_ESCR1),
/openbmc/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h1034 #define MSR_P4_TBPU_ESCR1 0x000003c3 macro
/openbmc/linux/arch/x86/include/asm/
H A Dmsr-index.h1056 #define MSR_P4_TBPU_ESCR1 0x000003c3 macro