| /openbmc/linux/arch/x86/include/asm/ |
| H A D | switch_to.h | 62 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); in refresh_sysenter_cs()
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| H A D | msr-index.h | 209 #define MSR_IA32_SYSENTER_CS 0x00000174 macro
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| /openbmc/qemu/target/i386/tcg/sysemu/ |
| H A D | misc_helper.c | 142 case MSR_IA32_SYSENTER_CS: in helper_wrmsr()
336 case MSR_IA32_SYSENTER_CS: in helper_rdmsr()
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| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | msr-index.h | 70 #define MSR_IA32_SYSENTER_CS 0x00000174 macro
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| /openbmc/qemu/target/i386/hvf/ |
| H A D | x86hvf.c | 133 hv_vcpu_write_msr(cs->accel->fd, MSR_IA32_SYSENTER_CS, in hvf_put_msrs()
216 hv_vcpu_read_msr(cs->accel->fd, MSR_IA32_SYSENTER_CS, &tmp); in hvf_get_msrs()
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| H A D | hvf.c | 334 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_SYSENTER_CS, 1); in hvf_arch_init_vcpu()
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| /openbmc/linux/arch/x86/kernel/cpu/ |
| H A D | common.c | 2023 * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field -- in enable_sep_cpu()
2028 wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0); in enable_sep_cpu()
2141 wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS); in syscall_init()
2147 wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG); in syscall_init()
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| /openbmc/linux/tools/testing/selftests/kvm/lib/x86_64/ |
| H A D | vmx.c | 271 vmwrite(HOST_IA32_SYSENTER_CS, rdmsr(MSR_IA32_SYSENTER_CS)); in init_vmcs_host_state()
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| /openbmc/linux/tools/arch/x86/include/asm/ |
| H A D | msr-index.h | 194 #define MSR_IA32_SYSENTER_CS 0x00000174 macro
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| /openbmc/linux/arch/x86/xen/ |
| H A D | enlighten_pv.c | 1071 case MSR_IA32_SYSENTER_CS: in xen_do_write_msr()
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| /openbmc/linux/arch/x86/kvm/vmx/ |
| H A D | vmx.c | 177 MSR_IA32_SYSENTER_CS,
2032 case MSR_IA32_SYSENTER_CS: in vmx_get_msr()
2217 case MSR_IA32_SYSENTER_CS: in vmx_set_msr()
4347 rdmsr(MSR_IA32_SYSENTER_CS, low32, high32); in vmx_set_constant_host_state()
7528 vmx_disable_intercept_for_msr(vcpu, MSR_IA32_SYSENTER_CS, MSR_TYPE_RW); in vmx_vcpu_create()
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| /openbmc/linux/arch/x86/kvm/svm/ |
| H A D | svm.c | 88 { .index = MSR_IA32_SYSENTER_CS, .always = true },
2885 case MSR_IA32_SYSENTER_CS: in svm_get_msr()
3112 case MSR_IA32_SYSENTER_CS: in svm_set_msr()
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| /openbmc/qemu/target/i386/ |
| H A D | cpu.h | 445 #define MSR_IA32_SYSENTER_CS 0x174 macro
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| /openbmc/qemu/target/i386/kvm/ |
| H A D | kvm.c | 3898 kvm_msr_entry_add(cpu, MSR_IA32_SYSENTER_CS, env->sysenter_cs); in kvm_put_msrs()
4374 kvm_msr_entry_add(cpu, MSR_IA32_SYSENTER_CS, 0); in kvm_get_msrs()
4648 case MSR_IA32_SYSENTER_CS: in kvm_get_msrs()
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| /openbmc/linux/arch/x86/kvm/ |
| H A D | emulate.c | 2482 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data); in em_sysenter()
2535 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data); in em_sysexit()
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| H A D | x86.c | 1450 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
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