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Searched refs:MSR_IA32_PEBS_ENABLE (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/arch/x86/kvm/vmx/
H A Dpmu_intel.c209 case MSR_IA32_PEBS_ENABLE: in intel_is_valid_msr()
358 case MSR_IA32_PEBS_ENABLE: in intel_pmu_get_msr()
407 case MSR_IA32_PEBS_ENABLE: in intel_pmu_set_msr()
H A Dvmx.c1070 case MSR_IA32_PEBS_ENABLE: in add_atomic_switch_msr()
1076 wrmsrl(MSR_IA32_PEBS_ENABLE, 0); in add_atomic_switch_msr()
/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h105 #define MSR_IA32_PEBS_ENABLE 0x000003f1 macro
/openbmc/linux/arch/x86/xen/
H A Dpmu.c159 case MSR_IA32_PEBS_ENABLE: in is_intel_pmu_msr()
/openbmc/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h253 #define MSR_IA32_PEBS_ENABLE 0x000003f1 macro
/openbmc/linux/arch/x86/include/asm/
H A Dmsr-index.h269 #define MSR_IA32_PEBS_ENABLE 0x000003f1 macro
/openbmc/linux/arch/x86/events/intel/
H A Dds.c1422 wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); in intel_pmu_pebs_disable()
1432 wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); in intel_pmu_pebs_enable_all()
H A Dp4.c946 (void)wrmsrl_safe(MSR_IA32_PEBS_ENABLE, (u64)bind->metric_pebs); in p4_pmu_enable_pebs()
H A Dcore.c3020 wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); in handle_pmi_common()
4091 .msr = MSR_IA32_PEBS_ENABLE, in intel_guest_get_msrs()
4117 .msr = MSR_IA32_PEBS_ENABLE, in intel_guest_get_msrs()
/openbmc/linux/arch/x86/events/
H A Dperf_event.h1443 wrmsrl(MSR_IA32_PEBS_ENABLE, 0); in __intel_pmu_pebs_disable_all()
H A Dcore.c1550 rdmsrl(MSR_IA32_PEBS_ENABLE, pebs); in perf_event_print_debug()
/openbmc/linux/arch/x86/kvm/
H A Dx86.c1474 MSR_IA32_PEBS_ENABLE, MSR_IA32_DS_AREA, MSR_PEBS_DATA_CFG,