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Searched refs:MSR_IA32_MISC_ENABLE_TM1 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/thermal/intel/
H A Dtherm_throt.c747 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { in intel_init_thermal()
808 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); in intel_init_thermal()
/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h454 #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << 3) macro
/openbmc/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h895 #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << MSR_IA32_MISC_ENABLE_TM1_BIT) macro
/openbmc/linux/arch/x86/include/asm/
H A Dmsr-index.h916 #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << MSR_IA32_MISC_ENABLE_TM1_BIT) macro
/openbmc/linux/tools/power/x86/turbostat/
H A Dturbostat.c5349 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-", in decode_misc_enable_msr()