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Searched refs:LS2080A (Results 1 – 22 of 22) sorted by relevance

/openbmc/u-boot/board/freescale/ls2080ardb/
H A DREADME3 The LS2080A Reference Design (RDB) is a high-performance computing,
4 evaluation, and development platform that supports the QorIQ LS2080A, LS2088A
11 LS2080A, LS2088A, LS2081A SoC Overview
13 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
H A DMAINTAINERS1 LS2080A BOARD
/openbmc/u-boot/doc/
H A DREADME.fsl-trustzone-components1 Freescale ARM64 SoCs like LS2080A have ARM TrustZone components like
10 LS2080A like SoCs.
/openbmc/u-boot/board/freescale/ls2080aqds/
H A DREADME3 The LS2080A Development System (QDS) is a high-performance computing,
4 evaluation, and development platform that supports the QorIQ LS2080A
6 validation and SW development platform for the Freescale LS2080A, LS2088A
9 LS2080A, LS2088A SoC Overview
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
H A DMAINTAINERS1 LS2080A BOARD
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.qspi5 2. LS2080A
33 The u-boot image should be written to 0x10000(but 0x1000 for LS1043A, LS2080A).
H A DREADME.soc5 3. LS2080A
82 LS2080A
84 The LS2080A integrated multicore processor combines eight ARM Cortex-A57
89 The LS2080A SoC includes the following function and features:
H A DREADME.lsch310 for example LS2080A.
/openbmc/u-boot/board/freescale/ls2080a/
H A DMAINTAINERS1 LS2080A BOARD
/openbmc/u-boot/configs/
H A Dls2080a_emu_defconfig4 CONFIG_IDENT_STRING=" LS2080A-EMU"
H A Dls2080a_simu_defconfig4 CONFIG_IDENT_STRING=" LS2080A-SIMU"
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls208xa-rdb.dtsi3 * Device Tree file for Freescale LS2080A RDB Board.
H A Dfsl-ls208xa-qds.dtsi3 * Device Tree file for Freescale LS2080A QDS Board.
/openbmc/u-boot/board/freescale/ls1012afrdm/
H A DREADME10 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
/openbmc/linux/Documentation/devicetree/bindings/board/
H A Dfsl-board.txt43 Example (LS2080A-RDB):
/openbmc/u-boot/drivers/i2c/
H A DKconfig181 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
187 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
193 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
199 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
/openbmc/u-boot/arch/arm/
H A DKconfig1024 The LS2080A Development System (EMULATOR) is a pre silicon
1025 development platform that supports the QorIQ LS2080A
1036 The LS2080A Development System (QDS) is a pre silicon
1037 development platform that supports the QorIQ LS2080A
1069 The LS2080A Development System (QDS) is a high-performance
1070 development platform that supports the QorIQ LS2080A
1087 The LS2080A Reference design board (RDB) is a high-performance
1088 development platform that supports the QorIQ LS2080A
/openbmc/u-boot/board/freescale/ls1012ardb/
H A DREADME11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
/openbmc/linux/drivers/spi/
H A Dspi-fsl-dspi.c132 LS2080A, enumerator
174 [LS2080A] = {
1119 .data = &devtype_data[LS2080A],
/openbmc/linux/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/
H A Dethernet-driver.rst15 LS2080A, LS2088A, LS1088A.
/openbmc/linux/Documentation/arch/arm64/
H A Dsilicon-errata.rst234 | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dcpu.c44 CPU_TYPE_ENTRY(LS2080A, LS2080A, 8),