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Searched refs:L1CSR0_CUL (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/powerpc/kvm/
H A De500_emulate.c111 vcpu_e500->l1csr0 |= L1CSR0_CUL; in kvmppc_e500_emul_dcbtls()
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg_booke.h581 #define L1CSR0_CUL 0x00000400 /* Data Cache Unable to Lock */ macro
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h487 #define L1CSR0_CUL 0x00000400 /* (D-)Cache Unable to Lock */ macro
/openbmc/qemu/target/ppc/
H A Dcpu.h2299 #define L1CSR0_CUL 0x00000400 /* (D-)Cache Unable to Lock */ macro
H A Dtranslate.c4451 tcg_gen_ori_tl(t0, t0, L1CSR0_CUL); in gen_dcbtls()