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Searched refs:JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Djpeg_v4_0.c260 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_disable_clock_gating()
263 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_disable_clock_gating()
284 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_enable_clock_gating()
287 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_enable_clock_gating()
H A Djpeg_v2_0.c267 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v2_0_disable_clock_gating()
269 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v2_0_disable_clock_gating()
290 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v2_0_enable_clock_gating()
292 data |= 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v2_0_enable_clock_gating()
H A Djpeg_v3_0.c231 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v3_0_disable_clock_gating()
233 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v3_0_disable_clock_gating()
H A Djpeg_v4_0_3.c422 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_3_disable_clock_gating()
425 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_3_disable_clock_gating()
447 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_3_enable_clock_gating()
450 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v4_0_3_enable_clock_gating()
H A Djpeg_v2_5.c281 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v2_5_disable_clock_gating()
283 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in jpeg_v2_5_disable_clock_gating()
H A Dvcn_v1_0.c459 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v1_0_disable_clock_gating()
584 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v1_0_enable_clock_gating()
586 data |= 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v1_0_enable_clock_gating()
648 reg_data = 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v1_0_clock_gating_dpg_mode()
650 reg_data = 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; in vcn_v1_0_clock_gating_dpg_mode()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h494 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1016 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro
H A Dvcn_2_5_sh_mask.h1355 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1352 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h2269 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h1877 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h6169 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h6894 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT … macro