Searched refs:IXGBE_MSCA_ADDR_CYCLE (Results 1 – 2 of 2) sorted by relevance
482 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); in ixgbe_read_phy_reg_mdi()586 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); in ixgbe_write_phy_reg_mdi()732 cmd = hwaddr | IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND; in ixgbe_mii_bus_read_generic_c45()804 cmd = hwaddr | IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND; in ixgbe_mii_bus_write_generic_c45()
1304 #define IXGBE_MSCA_ADDR_CYCLE 0x00000000 /* OP CODE 00 (addr cycle) */ macro