Searched refs:IS_ALDERLAKE_S (Results 1 – 24 of 24) sorted by relevance
140 drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) && in intel_pch_type()178 else if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) in intel_virt_detect_pch()
142 if (IS_ALDERLAKE_S(i915)) in has_phy_misc()211 else if (IS_ALDERLAKE_S(dev_priv)) in phy_is_master()
39 #define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
2467 IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) && in ehl_combo_pll_div_frac_wa_needed()3210 if (IS_ALDERLAKE_S(dev_priv)) { in icl_get_combo_phy_dpll()3552 if (IS_ALDERLAKE_S(dev_priv)) { in icl_pll_get_hw_state()3616 if (IS_ALDERLAKE_S(dev_priv)) { in icl_dpll_write()4150 else if (IS_ALDERLAKE_S(dev_priv)) in intel_shared_dpll_init()
2220 } else if (IS_ALDERLAKE_S(i915)) { in map_ddc_pin()2364 else if (IS_ALDERLAKE_S(i915)) in dvo_port_to_port()3535 } else if (IS_ALDERLAKE_S(i915)) { in map_aux_ch()
352 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()373 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()
889 if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2)) in intel_display_device_info_runtime_init()
1049 } else if (IS_ALDERLAKE_S(i915)) { in intel_dmc_init()
1721 } else if (IS_ALDERLAKE_S(i915)) { in intel_ddi_buf_trans_init()
672 else if (IS_ALDERLAKE_S(dev_priv)) in intel_bw_init_hw()
1663 else if (IS_ALDERLAKE_S(i915)) in intel_display_power_map_init()
1611 if (IS_ALDERLAKE_S(dev_priv) || in tgl_bw_buddy_init()
1411 if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) && in skl_plane_check_fb()
2893 if (IS_ALDERLAKE_S(dev_priv)) in intel_hdmi_default_ddc_pin()
1085 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
1748 else if (IS_ALDERLAKE_S(dev_priv)) in intel_phy_is_combo()1800 else if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) in intel_port_to_phy()
504 else if (IS_ALDERLAKE_P(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_dp_set_source_rates()
4896 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_ddi_init()
89 IS_ALDERLAKE_S(i915) || in mmio_invalidate_full()
2349 if (IS_DG2(i915) || IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()2362 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || IS_DG1(i915) || in rcs_engine_wa_init()2382 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()
207 } else if (IS_ALDERLAKE_S(i915)) { in intel_step_init()
569 #define IS_ALDERLAKE_S(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_S) macro
46 if (IS_ALDERLAKE_S(i915) && !IS_RAPTORLAKE_S(i915)) { in uc_expand_default_options()
497 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) { in set_proto_ctx_engines_bond()