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Searched refs:ISA_MIPS_R2 (Results 1 – 7 of 7) sorted by relevance

/openbmc/qemu/target/mips/
H A Dmips-defs.h20 #define ISA_MIPS_R2 0x0000000000000040ULL macro
72 #define CPU_MIPS32R2 (CPU_MIPS32R1 | ISA_MIPS_R2)
H A Dinternal.h373 if (env->insn_flags & ISA_MIPS_R2) { in compute_hflags()
/openbmc/qemu/target/mips/sysemu/
H A Dcp0_timer.c57 if (env->insn_flags & ISA_MIPS_R2) { in cpu_mips_timer_expire()
105 if (env->insn_flags & ISA_MIPS_R2) { in cpu_mips_store_compare()
H A Dcp0.c100 if (env->insn_flags & ISA_MIPS_R2) { in cpu_mips_store_cause()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c5543 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
5591 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
5596 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
5601 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
5606 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
5611 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
5627 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
5721 check_insn(ctx, ISA_MIPS_R2); in gen_mfc0()
11124 check_insn(ctx, ISA_MIPS_R2); in gen_rdhwr()
14533 check_insn(ctx, ISA_MIPS_R2); in decode_opc_special3()
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H A Dmicromips_translate.c.inc1218 check_insn(ctx, ISA_MIPS_R2);
1223 check_insn(ctx, ISA_MIPS_R2);
/openbmc/qemu/linux-user/mips/
H A Dcpu_loop.c280 bool cpu_has_mips_r2_r6 = env->insn_flags & ISA_MIPS_R2 || in target_cpu_copy_regs()