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Searched refs:IP6_31_28 (Results 1 – 13 of 13) sorted by relevance

/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c109 #define GPSR3_15 F_(VI1_DATA11, IP6_31_28)
208 #define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) FM(MMC_WP) F_(0, 0) F_(0, 0) F_(0, … macro
275 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
631 PINMUX_IPSR_GPSR(IP6_31_28, VI1_DATA11),
632 PINMUX_IPSR_GPSR(IP6_31_28, SCL4),
633 PINMUX_IPSR_GPSR(IP6_31_28, IRQ4),
634 PINMUX_IPSR_GPSR(IP6_31_28, D14),
635 PINMUX_IPSR_GPSR(IP6_31_28, MMC_WP),
2320 IP6_31_28
H A Dpfc-r8a77990.c50 #define GPSR0_10 F_(D10, IP6_31_28)
246 #define IP6_31_28 FM(D10) FM(MSIOF2_RXD_A) F_(0, 0) F_(0, 0) FM(VI5_DATA13_A) FM(DU_DG1) FM(RIF… macro
377 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
880 PINMUX_IPSR_GPSR(IP6_31_28, D10),
881 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_RXD_A, SEL_MSIOF2_0),
882 PINMUX_IPSR_MSEL(IP6_31_28, VI5_DATA13_A, SEL_VIN5_0),
883 PINMUX_IPSR_GPSR(IP6_31_28, DU_DG1),
884 PINMUX_IPSR_MSEL(IP6_31_28, RIF3_D0_B, SEL_DRIF3_1),
885 PINMUX_IPSR_GPSR(IP6_31_28, HTX3_E),
886 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT9),
[all …]
H A Dpfc-r8a77995.c95 #define GPSR2_18 F_(VI4_DATA17, IP6_31_28)
258 #define IP6_31_28 FM(VI4_DATA17) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
367 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
731 PINMUX_IPSR_GPSR(IP6_31_28, VI4_DATA17),
732 PINMUX_IPSR_MSEL(IP6_31_28, HTX3_A, SEL_HSCIF3_0),
2322 IP6_31_28
H A Dpfc-r8a7795.c42 #define GPSR0_12 F_(D12, IP6_31_28)
269 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU… macro
419 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
951 PINMUX_IPSR_GPSR(IP6_31_28, D12),
952 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4),
953 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3),
954 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2),
955 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0),
956 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR4),
5418 IP6_31_28
H A Dpfc-r8a7796.c48 #define GPSR0_12 F_(D12, IP6_31_28)
275 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU… macro
425 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
953 PINMUX_IPSR_GPSR(IP6_31_28, D12),
954 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4),
955 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3),
956 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2),
957 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0),
958 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR4),
5375 IP6_31_28
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c120 #define GPSR3_15 F_(VI1_DATA11, IP6_31_28)
219 #define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
285 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
639 PINMUX_IPSR_GPSR(IP6_31_28, VI1_DATA11),
640 PINMUX_IPSR_GPSR(IP6_31_28, SCL4),
641 PINMUX_IPSR_GPSR(IP6_31_28, IRQ4),
642 PINMUX_IPSR_GPSR(IP6_31_28, D14),
2293 IP6_31_28
H A Dpfc-r8a77980.c135 #define GPSR3_15 F_(VI1_DATA11, IP6_31_28)
253 #define IP6_31_28 FM(VI1_DATA11) FM(SCL4) F_(0, 0) FM(D14) FM(MMC_D6) F_(0, 0) F_(0, 0) F_(0, … macro
335 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
712 PINMUX_IPSR_GPSR(IP6_31_28, VI1_DATA11),
713 PINMUX_IPSR_GPSR(IP6_31_28, SCL4),
714 PINMUX_IPSR_GPSR(IP6_31_28, D14),
715 PINMUX_IPSR_GPSR(IP6_31_28, MMC_D6),
2747 IP6_31_28
H A Dpfc-r8a77990.c75 #define GPSR0_10 F_(D10, IP6_31_28)
271 #define IP6_31_28 FM(D10) FM(MSIOF2_RXD_A) F_(0, 0) F_(0, 0) FM(VI5_DATA13_A) FM(DU_DG1) FM(RIF… macro
402 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
910 PINMUX_IPSR_GPSR(IP6_31_28, D10),
911 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_RXD_A, SEL_MSIOF2_0),
912 PINMUX_IPSR_MSEL(IP6_31_28, VI5_DATA13_A, SEL_VIN5_0),
913 PINMUX_IPSR_GPSR(IP6_31_28, DU_DG1),
914 PINMUX_IPSR_MSEL(IP6_31_28, RIF3_D0_B, SEL_DRIF3_1),
915 PINMUX_IPSR_GPSR(IP6_31_28, HTX3_E),
916 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT9),
[all …]
H A Dpfc-r8a77995.c104 #define GPSR2_18 F_(VI4_DATA17, IP6_31_28)
267 #define IP6_31_28 FM(VI4_DATA17) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
376 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
741 PINMUX_IPSR_GPSR(IP6_31_28, VI4_DATA17),
742 PINMUX_IPSR_MSEL(IP6_31_28, HTX3_A, SEL_HSCIF3_0),
2734 IP6_31_28
H A Dpfc-r8a77965.c89 #define GPSR0_12 F_(D12, IP6_31_28)
316 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU… macro
466 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
1004 PINMUX_IPSR_GPSR(IP6_31_28, D12),
1005 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4),
1006 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3),
1007 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2),
1008 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0),
1009 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR4),
5604 IP6_31_28
H A Dpfc-r8a77951.c84 #define GPSR0_12 F_(D12, IP6_31_28)
311 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU… macro
461 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
998 PINMUX_IPSR_GPSR(IP6_31_28, D12),
999 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4),
1000 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3),
1001 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2),
1002 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0),
1003 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR4),
5408 IP6_31_28
H A Dpfc-r8a7796.c89 #define GPSR0_12 F_(D12, IP6_31_28)
316 #define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU… macro
466 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
1002 PINMUX_IPSR_GPSR(IP6_31_28, D12),
1003 PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4),
1004 PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3),
1005 PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2),
1006 PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0),
1007 PINMUX_IPSR_GPSR(IP6_31_28, DU_DR4),
5363 IP6_31_28
H A Dpfc-r8a77470.c761 PINMUX_IPSR_GPSR(IP6_31_28, DU0_DB6),
762 PINMUX_IPSR_GPSR(IP6_31_28, A22),