1077365a9SGeert Uytterhoeven // SPDX-License-Identifier: GPL-2.0
2077365a9SGeert Uytterhoeven /*
3077365a9SGeert Uytterhoeven  * R8A77965 processor support - PFC hardware block.
4077365a9SGeert Uytterhoeven  *
5077365a9SGeert Uytterhoeven  * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6077365a9SGeert Uytterhoeven  * Copyright (C) 2016-2019 Renesas Electronics Corp.
7077365a9SGeert Uytterhoeven  *
8077365a9SGeert Uytterhoeven  * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c
9077365a9SGeert Uytterhoeven  *
10077365a9SGeert Uytterhoeven  * R-Car Gen3 processor support - PFC hardware block.
11077365a9SGeert Uytterhoeven  *
12077365a9SGeert Uytterhoeven  * Copyright (C) 2015  Renesas Electronics Corporation
13077365a9SGeert Uytterhoeven  */
14077365a9SGeert Uytterhoeven 
15077365a9SGeert Uytterhoeven #include <linux/errno.h>
16077365a9SGeert Uytterhoeven #include <linux/kernel.h>
17077365a9SGeert Uytterhoeven 
18077365a9SGeert Uytterhoeven #include "sh_pfc.h"
19077365a9SGeert Uytterhoeven 
20077365a9SGeert Uytterhoeven #define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN)
21077365a9SGeert Uytterhoeven 
22077365a9SGeert Uytterhoeven #define CPU_ALL_GP(fn, sfx)						\
23077365a9SGeert Uytterhoeven 	PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS),	\
24077365a9SGeert Uytterhoeven 	PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS),	\
25077365a9SGeert Uytterhoeven 	PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS),	\
26a3ca1e18SGeert Uytterhoeven 	PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33),	\
27077365a9SGeert Uytterhoeven 	PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS),	\
28077365a9SGeert Uytterhoeven 	PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS),	\
29077365a9SGeert Uytterhoeven 	PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS),	\
30077365a9SGeert Uytterhoeven 	PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS),	\
31a3ca1e18SGeert Uytterhoeven 	PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33),	\
32077365a9SGeert Uytterhoeven 	PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS),	\
33077365a9SGeert Uytterhoeven 	PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS),	\
34077365a9SGeert Uytterhoeven 	PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS)
35077365a9SGeert Uytterhoeven 
36077365a9SGeert Uytterhoeven #define CPU_ALL_NOGP(fn)						\
37077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS),			\
38077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS),		\
39077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_RD0, "AVB_RD0", fn, CFG_FLAGS),		\
40077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_RD1, "AVB_RD1", fn, CFG_FLAGS),		\
41077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_RD2, "AVB_RD2", fn, CFG_FLAGS),		\
42077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_RD3, "AVB_RD3", fn, CFG_FLAGS),		\
43077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_RXC, "AVB_RXC", fn, CFG_FLAGS),		\
44077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_RX_CTL, "AVB_RX_CTL", fn, CFG_FLAGS),		\
45077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS),		\
46077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS),		\
47077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS),		\
48077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS),		\
49077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS),		\
50077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_TXCREFCLK, "AVB_TXCREFCLK", fn, CFG_FLAGS),	\
51077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS),		\
52077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(DU_DOTCLKIN0, "DU_DOTCLKIN0", fn, CFG_FLAGS),	\
53077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(DU_DOTCLKIN1, "DU_DOTCLKIN1", fn, CFG_FLAGS),	\
54077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(DU_DOTCLKIN3, "DU_DOTCLKIN3", fn, CFG_FLAGS),	\
55077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),\
56077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(FSCLKST, "FSCLKST", fn, CFG_FLAGS),		\
57077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS),		\
58077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, CFG_FLAGS),		\
59077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI0_IO2, "QSPI0_IO2", fn, CFG_FLAGS),		\
60077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI0_IO3, "QSPI0_IO3", fn, CFG_FLAGS),		\
61077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI0_MISO_IO1, "QSPI0_MISO_IO1", fn, CFG_FLAGS),	\
62077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI0_MOSI_IO0, "QSPI0_MOSI_IO0", fn, CFG_FLAGS),	\
63077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI0_SPCLK, "QSPI0_SPCLK", fn, CFG_FLAGS),	\
64077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI0_SSL, "QSPI0_SSL", fn, CFG_FLAGS),		\
65077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI1_IO2, "QSPI1_IO2", fn, CFG_FLAGS),		\
66077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI1_IO3, "QSPI1_IO3", fn, CFG_FLAGS),		\
67077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI1_MISO_IO1, "QSPI1_MISO_IO1", fn, CFG_FLAGS),	\
68077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI1_MOSI_IO0, "QSPI1_MOSI_IO0", fn, CFG_FLAGS),	\
69077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI1_SPCLK, "QSPI1_SPCLK", fn, CFG_FLAGS),	\
70077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(QSPI1_SSL, "QSPI1_SSL", fn, CFG_FLAGS),		\
71077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(RPC_INT_N, "RPC_INT#", fn, CFG_FLAGS),		\
72077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(RPC_RESET_N, "RPC_RESET#", fn, CFG_FLAGS),		\
73077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(RPC_WP_N, "RPC_WP#", fn, CFG_FLAGS),		\
74077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),	\
75077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),	\
76077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_DRIVE_STRENGTH),	\
77077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS),			\
78077365a9SGeert Uytterhoeven 	PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN)
79077365a9SGeert Uytterhoeven 
80077365a9SGeert Uytterhoeven /*
81077365a9SGeert Uytterhoeven  * F_() : just information
82077365a9SGeert Uytterhoeven  * FM() : macro for FN_xxx / xxx_MARK
83077365a9SGeert Uytterhoeven  */
84077365a9SGeert Uytterhoeven 
85077365a9SGeert Uytterhoeven /* GPSR0 */
86077365a9SGeert Uytterhoeven #define GPSR0_15	F_(D15,			IP7_11_8)
87077365a9SGeert Uytterhoeven #define GPSR0_14	F_(D14,			IP7_7_4)
88077365a9SGeert Uytterhoeven #define GPSR0_13	F_(D13,			IP7_3_0)
89077365a9SGeert Uytterhoeven #define GPSR0_12	F_(D12,			IP6_31_28)
90077365a9SGeert Uytterhoeven #define GPSR0_11	F_(D11,			IP6_27_24)
91077365a9SGeert Uytterhoeven #define GPSR0_10	F_(D10,			IP6_23_20)
92077365a9SGeert Uytterhoeven #define GPSR0_9		F_(D9,			IP6_19_16)
93077365a9SGeert Uytterhoeven #define GPSR0_8		F_(D8,			IP6_15_12)
94077365a9SGeert Uytterhoeven #define GPSR0_7		F_(D7,			IP6_11_8)
95077365a9SGeert Uytterhoeven #define GPSR0_6		F_(D6,			IP6_7_4)
96077365a9SGeert Uytterhoeven #define GPSR0_5		F_(D5,			IP6_3_0)
97077365a9SGeert Uytterhoeven #define GPSR0_4		F_(D4,			IP5_31_28)
98077365a9SGeert Uytterhoeven #define GPSR0_3		F_(D3,			IP5_27_24)
99077365a9SGeert Uytterhoeven #define GPSR0_2		F_(D2,			IP5_23_20)
100077365a9SGeert Uytterhoeven #define GPSR0_1		F_(D1,			IP5_19_16)
101077365a9SGeert Uytterhoeven #define GPSR0_0		F_(D0,			IP5_15_12)
102077365a9SGeert Uytterhoeven 
103077365a9SGeert Uytterhoeven /* GPSR1 */
104077365a9SGeert Uytterhoeven #define GPSR1_28	FM(CLKOUT)
105077365a9SGeert Uytterhoeven #define GPSR1_27	F_(EX_WAIT0_A,		IP5_11_8)
106077365a9SGeert Uytterhoeven #define GPSR1_26	F_(WE1_N,		IP5_7_4)
107077365a9SGeert Uytterhoeven #define GPSR1_25	F_(WE0_N,		IP5_3_0)
108077365a9SGeert Uytterhoeven #define GPSR1_24	F_(RD_WR_N,		IP4_31_28)
109077365a9SGeert Uytterhoeven #define GPSR1_23	F_(RD_N,		IP4_27_24)
110077365a9SGeert Uytterhoeven #define GPSR1_22	F_(BS_N,		IP4_23_20)
111077365a9SGeert Uytterhoeven #define GPSR1_21	F_(CS1_N,		IP4_19_16)
112077365a9SGeert Uytterhoeven #define GPSR1_20	F_(CS0_N,		IP4_15_12)
113077365a9SGeert Uytterhoeven #define GPSR1_19	F_(A19,			IP4_11_8)
114077365a9SGeert Uytterhoeven #define GPSR1_18	F_(A18,			IP4_7_4)
115077365a9SGeert Uytterhoeven #define GPSR1_17	F_(A17,			IP4_3_0)
116077365a9SGeert Uytterhoeven #define GPSR1_16	F_(A16,			IP3_31_28)
117077365a9SGeert Uytterhoeven #define GPSR1_15	F_(A15,			IP3_27_24)
118077365a9SGeert Uytterhoeven #define GPSR1_14	F_(A14,			IP3_23_20)
119077365a9SGeert Uytterhoeven #define GPSR1_13	F_(A13,			IP3_19_16)
120077365a9SGeert Uytterhoeven #define GPSR1_12	F_(A12,			IP3_15_12)
121077365a9SGeert Uytterhoeven #define GPSR1_11	F_(A11,			IP3_11_8)
122077365a9SGeert Uytterhoeven #define GPSR1_10	F_(A10,			IP3_7_4)
123077365a9SGeert Uytterhoeven #define GPSR1_9		F_(A9,			IP3_3_0)
124077365a9SGeert Uytterhoeven #define GPSR1_8		F_(A8,			IP2_31_28)
125077365a9SGeert Uytterhoeven #define GPSR1_7		F_(A7,			IP2_27_24)
126077365a9SGeert Uytterhoeven #define GPSR1_6		F_(A6,			IP2_23_20)
127077365a9SGeert Uytterhoeven #define GPSR1_5		F_(A5,			IP2_19_16)
128077365a9SGeert Uytterhoeven #define GPSR1_4		F_(A4,			IP2_15_12)
129077365a9SGeert Uytterhoeven #define GPSR1_3		F_(A3,			IP2_11_8)
130077365a9SGeert Uytterhoeven #define GPSR1_2		F_(A2,			IP2_7_4)
131077365a9SGeert Uytterhoeven #define GPSR1_1		F_(A1,			IP2_3_0)
132077365a9SGeert Uytterhoeven #define GPSR1_0		F_(A0,			IP1_31_28)
133077365a9SGeert Uytterhoeven 
134077365a9SGeert Uytterhoeven /* GPSR2 */
135077365a9SGeert Uytterhoeven #define GPSR2_14	F_(AVB_AVTP_CAPTURE_A,	IP0_23_20)
136077365a9SGeert Uytterhoeven #define GPSR2_13	F_(AVB_AVTP_MATCH_A,	IP0_19_16)
137077365a9SGeert Uytterhoeven #define GPSR2_12	F_(AVB_LINK,		IP0_15_12)
138077365a9SGeert Uytterhoeven #define GPSR2_11	F_(AVB_PHY_INT,		IP0_11_8)
139077365a9SGeert Uytterhoeven #define GPSR2_10	F_(AVB_MAGIC,		IP0_7_4)
140077365a9SGeert Uytterhoeven #define GPSR2_9		F_(AVB_MDC,		IP0_3_0)
141077365a9SGeert Uytterhoeven #define GPSR2_8		F_(PWM2_A,		IP1_27_24)
142077365a9SGeert Uytterhoeven #define GPSR2_7		F_(PWM1_A,		IP1_23_20)
143077365a9SGeert Uytterhoeven #define GPSR2_6		F_(PWM0,		IP1_19_16)
144077365a9SGeert Uytterhoeven #define GPSR2_5		F_(IRQ5,		IP1_15_12)
145077365a9SGeert Uytterhoeven #define GPSR2_4		F_(IRQ4,		IP1_11_8)
146077365a9SGeert Uytterhoeven #define GPSR2_3		F_(IRQ3,		IP1_7_4)
147077365a9SGeert Uytterhoeven #define GPSR2_2		F_(IRQ2,		IP1_3_0)
148077365a9SGeert Uytterhoeven #define GPSR2_1		F_(IRQ1,		IP0_31_28)
149077365a9SGeert Uytterhoeven #define GPSR2_0		F_(IRQ0,		IP0_27_24)
150077365a9SGeert Uytterhoeven 
151077365a9SGeert Uytterhoeven /* GPSR3 */
152077365a9SGeert Uytterhoeven #define GPSR3_15	F_(SD1_WP,		IP11_23_20)
153077365a9SGeert Uytterhoeven #define GPSR3_14	F_(SD1_CD,		IP11_19_16)
154077365a9SGeert Uytterhoeven #define GPSR3_13	F_(SD0_WP,		IP11_15_12)
155077365a9SGeert Uytterhoeven #define GPSR3_12	F_(SD0_CD,		IP11_11_8)
156077365a9SGeert Uytterhoeven #define GPSR3_11	F_(SD1_DAT3,		IP8_31_28)
157077365a9SGeert Uytterhoeven #define GPSR3_10	F_(SD1_DAT2,		IP8_27_24)
158077365a9SGeert Uytterhoeven #define GPSR3_9		F_(SD1_DAT1,		IP8_23_20)
159077365a9SGeert Uytterhoeven #define GPSR3_8		F_(SD1_DAT0,		IP8_19_16)
160077365a9SGeert Uytterhoeven #define GPSR3_7		F_(SD1_CMD,		IP8_15_12)
161077365a9SGeert Uytterhoeven #define GPSR3_6		F_(SD1_CLK,		IP8_11_8)
162077365a9SGeert Uytterhoeven #define GPSR3_5		F_(SD0_DAT3,		IP8_7_4)
163077365a9SGeert Uytterhoeven #define GPSR3_4		F_(SD0_DAT2,		IP8_3_0)
164077365a9SGeert Uytterhoeven #define GPSR3_3		F_(SD0_DAT1,		IP7_31_28)
165077365a9SGeert Uytterhoeven #define GPSR3_2		F_(SD0_DAT0,		IP7_27_24)
166077365a9SGeert Uytterhoeven #define GPSR3_1		F_(SD0_CMD,		IP7_23_20)
167077365a9SGeert Uytterhoeven #define GPSR3_0		F_(SD0_CLK,		IP7_19_16)
168077365a9SGeert Uytterhoeven 
169077365a9SGeert Uytterhoeven /* GPSR4 */
170077365a9SGeert Uytterhoeven #define GPSR4_17	F_(SD3_DS,		IP11_7_4)
171077365a9SGeert Uytterhoeven #define GPSR4_16	F_(SD3_DAT7,		IP11_3_0)
172077365a9SGeert Uytterhoeven #define GPSR4_15	F_(SD3_DAT6,		IP10_31_28)
173077365a9SGeert Uytterhoeven #define GPSR4_14	F_(SD3_DAT5,		IP10_27_24)
174077365a9SGeert Uytterhoeven #define GPSR4_13	F_(SD3_DAT4,		IP10_23_20)
175077365a9SGeert Uytterhoeven #define GPSR4_12	F_(SD3_DAT3,		IP10_19_16)
176077365a9SGeert Uytterhoeven #define GPSR4_11	F_(SD3_DAT2,		IP10_15_12)
177077365a9SGeert Uytterhoeven #define GPSR4_10	F_(SD3_DAT1,		IP10_11_8)
178077365a9SGeert Uytterhoeven #define GPSR4_9		F_(SD3_DAT0,		IP10_7_4)
179077365a9SGeert Uytterhoeven #define GPSR4_8		F_(SD3_CMD,		IP10_3_0)
180077365a9SGeert Uytterhoeven #define GPSR4_7		F_(SD3_CLK,		IP9_31_28)
181077365a9SGeert Uytterhoeven #define GPSR4_6		F_(SD2_DS,		IP9_27_24)
182077365a9SGeert Uytterhoeven #define GPSR4_5		F_(SD2_DAT3,		IP9_23_20)
183077365a9SGeert Uytterhoeven #define GPSR4_4		F_(SD2_DAT2,		IP9_19_16)
184077365a9SGeert Uytterhoeven #define GPSR4_3		F_(SD2_DAT1,		IP9_15_12)
185077365a9SGeert Uytterhoeven #define GPSR4_2		F_(SD2_DAT0,		IP9_11_8)
186077365a9SGeert Uytterhoeven #define GPSR4_1		F_(SD2_CMD,		IP9_7_4)
187077365a9SGeert Uytterhoeven #define GPSR4_0		F_(SD2_CLK,		IP9_3_0)
188077365a9SGeert Uytterhoeven 
189077365a9SGeert Uytterhoeven /* GPSR5 */
190077365a9SGeert Uytterhoeven #define GPSR5_25	F_(MLB_DAT,		IP14_19_16)
191077365a9SGeert Uytterhoeven #define GPSR5_24	F_(MLB_SIG,		IP14_15_12)
192077365a9SGeert Uytterhoeven #define GPSR5_23	F_(MLB_CLK,		IP14_11_8)
193077365a9SGeert Uytterhoeven #define GPSR5_22	FM(MSIOF0_RXD)
194077365a9SGeert Uytterhoeven #define GPSR5_21	F_(MSIOF0_SS2,		IP14_7_4)
195077365a9SGeert Uytterhoeven #define GPSR5_20	FM(MSIOF0_TXD)
196077365a9SGeert Uytterhoeven #define GPSR5_19	F_(MSIOF0_SS1,		IP14_3_0)
197077365a9SGeert Uytterhoeven #define GPSR5_18	F_(MSIOF0_SYNC,		IP13_31_28)
198077365a9SGeert Uytterhoeven #define GPSR5_17	FM(MSIOF0_SCK)
199077365a9SGeert Uytterhoeven #define GPSR5_16	F_(HRTS0_N,		IP13_27_24)
200077365a9SGeert Uytterhoeven #define GPSR5_15	F_(HCTS0_N,		IP13_23_20)
201077365a9SGeert Uytterhoeven #define GPSR5_14	F_(HTX0,		IP13_19_16)
202077365a9SGeert Uytterhoeven #define GPSR5_13	F_(HRX0,		IP13_15_12)
203077365a9SGeert Uytterhoeven #define GPSR5_12	F_(HSCK0,		IP13_11_8)
204077365a9SGeert Uytterhoeven #define GPSR5_11	F_(RX2_A,		IP13_7_4)
205077365a9SGeert Uytterhoeven #define GPSR5_10	F_(TX2_A,		IP13_3_0)
206077365a9SGeert Uytterhoeven #define GPSR5_9		F_(SCK2,		IP12_31_28)
207077365a9SGeert Uytterhoeven #define GPSR5_8		F_(RTS1_N,		IP12_27_24)
208077365a9SGeert Uytterhoeven #define GPSR5_7		F_(CTS1_N,		IP12_23_20)
209077365a9SGeert Uytterhoeven #define GPSR5_6		F_(TX1_A,		IP12_19_16)
210077365a9SGeert Uytterhoeven #define GPSR5_5		F_(RX1_A,		IP12_15_12)
211077365a9SGeert Uytterhoeven #define GPSR5_4		F_(RTS0_N,		IP12_11_8)
212077365a9SGeert Uytterhoeven #define GPSR5_3		F_(CTS0_N,		IP12_7_4)
213077365a9SGeert Uytterhoeven #define GPSR5_2		F_(TX0,			IP12_3_0)
214077365a9SGeert Uytterhoeven #define GPSR5_1		F_(RX0,			IP11_31_28)
215077365a9SGeert Uytterhoeven #define GPSR5_0		F_(SCK0,		IP11_27_24)
216077365a9SGeert Uytterhoeven 
217077365a9SGeert Uytterhoeven /* GPSR6 */
218077365a9SGeert Uytterhoeven #define GPSR6_31	F_(GP6_31,		IP18_7_4)
219077365a9SGeert Uytterhoeven #define GPSR6_30	F_(GP6_30,		IP18_3_0)
220077365a9SGeert Uytterhoeven #define GPSR6_29	F_(USB30_OVC,		IP17_31_28)
221077365a9SGeert Uytterhoeven #define GPSR6_28	F_(USB30_PWEN,		IP17_27_24)
222077365a9SGeert Uytterhoeven #define GPSR6_27	F_(USB1_OVC,		IP17_23_20)
223077365a9SGeert Uytterhoeven #define GPSR6_26	F_(USB1_PWEN,		IP17_19_16)
224077365a9SGeert Uytterhoeven #define GPSR6_25	F_(USB0_OVC,		IP17_15_12)
225077365a9SGeert Uytterhoeven #define GPSR6_24	F_(USB0_PWEN,		IP17_11_8)
226077365a9SGeert Uytterhoeven #define GPSR6_23	F_(AUDIO_CLKB_B,	IP17_7_4)
227077365a9SGeert Uytterhoeven #define GPSR6_22	F_(AUDIO_CLKA_A,	IP17_3_0)
228077365a9SGeert Uytterhoeven #define GPSR6_21	F_(SSI_SDATA9_A,	IP16_31_28)
229077365a9SGeert Uytterhoeven #define GPSR6_20	F_(SSI_SDATA8,		IP16_27_24)
230077365a9SGeert Uytterhoeven #define GPSR6_19	F_(SSI_SDATA7,		IP16_23_20)
231077365a9SGeert Uytterhoeven #define GPSR6_18	F_(SSI_WS78,		IP16_19_16)
232077365a9SGeert Uytterhoeven #define GPSR6_17	F_(SSI_SCK78,		IP16_15_12)
233077365a9SGeert Uytterhoeven #define GPSR6_16	F_(SSI_SDATA6,		IP16_11_8)
234077365a9SGeert Uytterhoeven #define GPSR6_15	F_(SSI_WS6,		IP16_7_4)
235077365a9SGeert Uytterhoeven #define GPSR6_14	F_(SSI_SCK6,		IP16_3_0)
236077365a9SGeert Uytterhoeven #define GPSR6_13	FM(SSI_SDATA5)
237077365a9SGeert Uytterhoeven #define GPSR6_12	FM(SSI_WS5)
238077365a9SGeert Uytterhoeven #define GPSR6_11	FM(SSI_SCK5)
239077365a9SGeert Uytterhoeven #define GPSR6_10	F_(SSI_SDATA4,		IP15_31_28)
240077365a9SGeert Uytterhoeven #define GPSR6_9		F_(SSI_WS4,		IP15_27_24)
241077365a9SGeert Uytterhoeven #define GPSR6_8		F_(SSI_SCK4,		IP15_23_20)
242077365a9SGeert Uytterhoeven #define GPSR6_7		F_(SSI_SDATA3,		IP15_19_16)
243077365a9SGeert Uytterhoeven #define GPSR6_6		F_(SSI_WS349,		IP15_15_12)
244077365a9SGeert Uytterhoeven #define GPSR6_5		F_(SSI_SCK349,		IP15_11_8)
245077365a9SGeert Uytterhoeven #define GPSR6_4		F_(SSI_SDATA2_A,	IP15_7_4)
246077365a9SGeert Uytterhoeven #define GPSR6_3		F_(SSI_SDATA1_A,	IP15_3_0)
247077365a9SGeert Uytterhoeven #define GPSR6_2		F_(SSI_SDATA0,		IP14_31_28)
248077365a9SGeert Uytterhoeven #define GPSR6_1		F_(SSI_WS01239,		IP14_27_24)
249077365a9SGeert Uytterhoeven #define GPSR6_0		F_(SSI_SCK01239,	IP14_23_20)
250077365a9SGeert Uytterhoeven 
251077365a9SGeert Uytterhoeven /* GPSR7 */
252077365a9SGeert Uytterhoeven #define GPSR7_3		FM(GP7_03)
253077365a9SGeert Uytterhoeven #define GPSR7_2		FM(GP7_02)
254077365a9SGeert Uytterhoeven #define GPSR7_1		FM(AVS2)
255077365a9SGeert Uytterhoeven #define GPSR7_0		FM(AVS1)
256077365a9SGeert Uytterhoeven 
257077365a9SGeert Uytterhoeven 
258077365a9SGeert Uytterhoeven /* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
259077365a9SGeert Uytterhoeven #define IP0_3_0		FM(AVB_MDC)		F_(0, 0)	FM(MSIOF2_SS2_C)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
260077365a9SGeert Uytterhoeven #define IP0_7_4		FM(AVB_MAGIC)		F_(0, 0)	FM(MSIOF2_SS1_C)	FM(SCK4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
261077365a9SGeert Uytterhoeven #define IP0_11_8	FM(AVB_PHY_INT)		F_(0, 0)	FM(MSIOF2_SYNC_C)	FM(RX4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
262077365a9SGeert Uytterhoeven #define IP0_15_12	FM(AVB_LINK)		F_(0, 0)	FM(MSIOF2_SCK_C)	FM(TX4_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
263077365a9SGeert Uytterhoeven #define IP0_19_16	FM(AVB_AVTP_MATCH_A)	F_(0, 0)	FM(MSIOF2_RXD_C)	FM(CTS4_N_A)			F_(0, 0)	FM(FSCLKST2_N_A) F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
264077365a9SGeert Uytterhoeven #define IP0_23_20	FM(AVB_AVTP_CAPTURE_A)	F_(0, 0)	FM(MSIOF2_TXD_C)	FM(RTS4_N_A)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
265077365a9SGeert Uytterhoeven #define IP0_27_24	FM(IRQ0)		FM(QPOLB)	F_(0, 0)		FM(DU_CDE)			FM(VI4_DATA0_B) FM(CAN0_TX_B)	FM(CANFD0_TX_B)		FM(MSIOF3_SS2_E) F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
266077365a9SGeert Uytterhoeven #define IP0_31_28	FM(IRQ1)		FM(QPOLA)	F_(0, 0)		FM(DU_DISP)			FM(VI4_DATA1_B) FM(CAN0_RX_B)	FM(CANFD0_RX_B)		FM(MSIOF3_SS1_E) F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
267077365a9SGeert Uytterhoeven #define IP1_3_0		FM(IRQ2)		FM(QCPV_QDE)	F_(0, 0)		FM(DU_EXODDF_DU_ODDF_DISP_CDE)	FM(VI4_DATA2_B) F_(0, 0)	F_(0, 0)		FM(MSIOF3_SYNC_E) F_(0, 0)		FM(PWM3_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
268077365a9SGeert Uytterhoeven #define IP1_7_4		FM(IRQ3)		FM(QSTVB_QVE)	F_(0, 0)		FM(DU_DOTCLKOUT1)		FM(VI4_DATA3_B) F_(0, 0)	F_(0, 0)		FM(MSIOF3_SCK_E) F_(0, 0)		FM(PWM4_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
269077365a9SGeert Uytterhoeven #define IP1_11_8	FM(IRQ4)		FM(QSTH_QHS)	F_(0, 0)		FM(DU_EXHSYNC_DU_HSYNC)		FM(VI4_DATA4_B) F_(0, 0)	F_(0, 0)		FM(MSIOF3_RXD_E) F_(0, 0)		FM(PWM5_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
270077365a9SGeert Uytterhoeven #define IP1_15_12	FM(IRQ5)		FM(QSTB_QHE)	F_(0, 0)		FM(DU_EXVSYNC_DU_VSYNC)		FM(VI4_DATA5_B) FM(FSCLKST2_N_B) F_(0, 0)		FM(MSIOF3_TXD_E) F_(0, 0)		FM(PWM6_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
271077365a9SGeert Uytterhoeven #define IP1_19_16	FM(PWM0)		FM(AVB_AVTP_PPS)F_(0, 0)		F_(0, 0)			FM(VI4_DATA6_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IECLK_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
272077365a9SGeert Uytterhoeven #define IP1_23_20	FM(PWM1_A)		F_(0, 0)	F_(0, 0)		FM(HRX3_D)			FM(VI4_DATA7_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IERX_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
273077365a9SGeert Uytterhoeven #define IP1_27_24	FM(PWM2_A)		F_(0, 0)	F_(0, 0)		FM(HTX3_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		FM(IETX_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
274077365a9SGeert Uytterhoeven #define IP1_31_28	FM(A0)			FM(LCDOUT16)	FM(MSIOF3_SYNC_B)	F_(0, 0)			FM(VI4_DATA8)	F_(0, 0)	FM(DU_DB0)		F_(0, 0)	F_(0, 0)		FM(PWM3_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
275077365a9SGeert Uytterhoeven #define IP2_3_0		FM(A1)			FM(LCDOUT17)	FM(MSIOF3_TXD_B)	F_(0, 0)			FM(VI4_DATA9)	F_(0, 0)	FM(DU_DB1)		F_(0, 0)	F_(0, 0)		FM(PWM4_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
276077365a9SGeert Uytterhoeven #define IP2_7_4		FM(A2)			FM(LCDOUT18)	FM(MSIOF3_SCK_B)	F_(0, 0)			FM(VI4_DATA10)	F_(0, 0)	FM(DU_DB2)		F_(0, 0)	F_(0, 0)		FM(PWM5_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
277077365a9SGeert Uytterhoeven #define IP2_11_8	FM(A3)			FM(LCDOUT19)	FM(MSIOF3_RXD_B)	F_(0, 0)			FM(VI4_DATA11)	F_(0, 0)	FM(DU_DB3)		F_(0, 0)	F_(0, 0)		FM(PWM6_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
278077365a9SGeert Uytterhoeven #define IP2_15_12	FM(A4)			FM(LCDOUT20)	FM(MSIOF3_SS1_B)	F_(0, 0)			FM(VI4_DATA12)	FM(VI5_DATA12)	FM(DU_DB4)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
279077365a9SGeert Uytterhoeven #define IP2_19_16	FM(A5)			FM(LCDOUT21)	FM(MSIOF3_SS2_B)	FM(SCK4_B)			FM(VI4_DATA13)	FM(VI5_DATA13)	FM(DU_DB5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
280077365a9SGeert Uytterhoeven #define IP2_23_20	FM(A6)			FM(LCDOUT22)	FM(MSIOF2_SS1_A)	FM(RX4_B)			FM(VI4_DATA14)	FM(VI5_DATA14)	FM(DU_DB6)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
281077365a9SGeert Uytterhoeven #define IP2_27_24	FM(A7)			FM(LCDOUT23)	FM(MSIOF2_SS2_A)	FM(TX4_B)			FM(VI4_DATA15)	FM(VI5_DATA15)	FM(DU_DB7)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
282077365a9SGeert Uytterhoeven #define IP2_31_28	FM(A8)			FM(RX3_B)	FM(MSIOF2_SYNC_A)	FM(HRX4_B)			F_(0, 0)	F_(0, 0)	F_(0, 0)		FM(SDA6_A)	FM(AVB_AVTP_MATCH_B)	FM(PWM1_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
283077365a9SGeert Uytterhoeven #define IP3_3_0		FM(A9)			F_(0, 0)	FM(MSIOF2_SCK_A)	FM(CTS4_N_B)			F_(0, 0)	FM(VI5_VSYNC_N)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
284077365a9SGeert Uytterhoeven #define IP3_7_4		FM(A10)			F_(0, 0)	FM(MSIOF2_RXD_A)	FM(RTS4_N_B)			F_(0, 0)	FM(VI5_HSYNC_N)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
285077365a9SGeert Uytterhoeven #define IP3_11_8	FM(A11)			FM(TX3_B)	FM(MSIOF2_TXD_A)	FM(HTX4_B)			FM(HSCK4)	FM(VI5_FIELD)	F_(0, 0)		FM(SCL6_A)	FM(AVB_AVTP_CAPTURE_B)	FM(PWM2_B)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
286077365a9SGeert Uytterhoeven 
287077365a9SGeert Uytterhoeven /* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
288077365a9SGeert Uytterhoeven #define IP3_15_12	FM(A12)			FM(LCDOUT12)	FM(MSIOF3_SCK_C)	F_(0, 0)			FM(HRX4_A)	FM(VI5_DATA8)	FM(DU_DG4)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
289077365a9SGeert Uytterhoeven #define IP3_19_16	FM(A13)			FM(LCDOUT13)	FM(MSIOF3_SYNC_C)	F_(0, 0)			FM(HTX4_A)	FM(VI5_DATA9)	FM(DU_DG5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
290077365a9SGeert Uytterhoeven #define IP3_23_20	FM(A14)			FM(LCDOUT14)	FM(MSIOF3_RXD_C)	F_(0, 0)			FM(HCTS4_N)	FM(VI5_DATA10)	FM(DU_DG6)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
291077365a9SGeert Uytterhoeven #define IP3_27_24	FM(A15)			FM(LCDOUT15)	FM(MSIOF3_TXD_C)	F_(0, 0)			FM(HRTS4_N)	FM(VI5_DATA11)	FM(DU_DG7)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
292077365a9SGeert Uytterhoeven #define IP3_31_28	FM(A16)			FM(LCDOUT8)	F_(0, 0)		F_(0, 0)			FM(VI4_FIELD)	F_(0, 0)	FM(DU_DG0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
293077365a9SGeert Uytterhoeven #define IP4_3_0		FM(A17)			FM(LCDOUT9)	F_(0, 0)		F_(0, 0)			FM(VI4_VSYNC_N)	F_(0, 0)	FM(DU_DG1)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
294077365a9SGeert Uytterhoeven #define IP4_7_4		FM(A18)			FM(LCDOUT10)	F_(0, 0)		F_(0, 0)			FM(VI4_HSYNC_N)	F_(0, 0)	FM(DU_DG2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
295077365a9SGeert Uytterhoeven #define IP4_11_8	FM(A19)			FM(LCDOUT11)	F_(0, 0)		F_(0, 0)			FM(VI4_CLKENB)	F_(0, 0)	FM(DU_DG3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
296077365a9SGeert Uytterhoeven #define IP4_15_12	FM(CS0_N)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(VI5_CLKENB)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
297077365a9SGeert Uytterhoeven #define IP4_19_16	FM(CS1_N)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(VI5_CLK)	F_(0, 0)		FM(EX_WAIT0_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
298077365a9SGeert Uytterhoeven #define IP4_23_20	FM(BS_N)		FM(QSTVA_QVS)	FM(MSIOF3_SCK_D)	FM(SCK3)			FM(HSCK3)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(CAN1_TX)		FM(CANFD1_TX)	FM(IETX_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
299077365a9SGeert Uytterhoeven #define IP4_27_24	FM(RD_N)		F_(0, 0)	FM(MSIOF3_SYNC_D)	FM(RX3_A)			FM(HRX3_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(CAN0_TX_A)		FM(CANFD0_TX_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
300077365a9SGeert Uytterhoeven #define IP4_31_28	FM(RD_WR_N)		F_(0, 0)	FM(MSIOF3_RXD_D)	FM(TX3_A)			FM(HTX3_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(CAN0_RX_A)		FM(CANFD0_RX_A)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
301077365a9SGeert Uytterhoeven #define IP5_3_0		FM(WE0_N)		F_(0, 0)	FM(MSIOF3_TXD_D)	FM(CTS3_N)			FM(HCTS3_N)	F_(0, 0)	F_(0, 0)		FM(SCL6_B)	FM(CAN_CLK)		F_(0, 0)	FM(IECLK_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
302077365a9SGeert Uytterhoeven #define IP5_7_4		FM(WE1_N)		F_(0, 0)	FM(MSIOF3_SS1_D)	FM(RTS3_N)			FM(HRTS3_N)	F_(0, 0)	F_(0, 0)		FM(SDA6_B)	FM(CAN1_RX)		FM(CANFD1_RX)	FM(IERX_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
303077365a9SGeert Uytterhoeven #define IP5_11_8	FM(EX_WAIT0_A)		FM(QCLK)	F_(0, 0)		F_(0, 0)			FM(VI4_CLK)	F_(0, 0)	FM(DU_DOTCLKOUT0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
304077365a9SGeert Uytterhoeven #define IP5_15_12	FM(D0)			FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A)	F_(0, 0)			FM(VI4_DATA16)	FM(VI5_DATA0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
305077365a9SGeert Uytterhoeven #define IP5_19_16	FM(D1)			FM(MSIOF2_SS2_B)FM(MSIOF3_SYNC_A)	F_(0, 0)			FM(VI4_DATA17)	FM(VI5_DATA1)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
306077365a9SGeert Uytterhoeven #define IP5_23_20	FM(D2)			F_(0, 0)	FM(MSIOF3_RXD_A)	F_(0, 0)			FM(VI4_DATA18)	FM(VI5_DATA2)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
307077365a9SGeert Uytterhoeven #define IP5_27_24	FM(D3)			F_(0, 0)	FM(MSIOF3_TXD_A)	F_(0, 0)			FM(VI4_DATA19)	FM(VI5_DATA3)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
308077365a9SGeert Uytterhoeven #define IP5_31_28	FM(D4)			FM(MSIOF2_SCK_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA20)	FM(VI5_DATA4)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
309077365a9SGeert Uytterhoeven #define IP6_3_0		FM(D5)			FM(MSIOF2_SYNC_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA21)	FM(VI5_DATA5)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
310077365a9SGeert Uytterhoeven #define IP6_7_4		FM(D6)			FM(MSIOF2_RXD_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA22)	FM(VI5_DATA6)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
311077365a9SGeert Uytterhoeven #define IP6_11_8	FM(D7)			FM(MSIOF2_TXD_B)F_(0, 0)		F_(0, 0)			FM(VI4_DATA23)	FM(VI5_DATA7)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
312077365a9SGeert Uytterhoeven #define IP6_15_12	FM(D8)			FM(LCDOUT0)	FM(MSIOF2_SCK_D)	FM(SCK4_C)			FM(VI4_DATA0_A)	F_(0, 0)	FM(DU_DR0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
313077365a9SGeert Uytterhoeven #define IP6_19_16	FM(D9)			FM(LCDOUT1)	FM(MSIOF2_SYNC_D)	F_(0, 0)			FM(VI4_DATA1_A)	F_(0, 0)	FM(DU_DR1)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
314077365a9SGeert Uytterhoeven #define IP6_23_20	FM(D10)			FM(LCDOUT2)	FM(MSIOF2_RXD_D)	FM(HRX3_B)			FM(VI4_DATA2_A)	FM(CTS4_N_C)	FM(DU_DR2)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
315077365a9SGeert Uytterhoeven #define IP6_27_24	FM(D11)			FM(LCDOUT3)	FM(MSIOF2_TXD_D)	FM(HTX3_B)			FM(VI4_DATA3_A)	FM(RTS4_N_C)	FM(DU_DR3)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
316077365a9SGeert Uytterhoeven #define IP6_31_28	FM(D12)			FM(LCDOUT4)	FM(MSIOF2_SS1_D)	FM(RX4_C)			FM(VI4_DATA4_A)	F_(0, 0)	FM(DU_DR4)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
317077365a9SGeert Uytterhoeven 
318077365a9SGeert Uytterhoeven /* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
319077365a9SGeert Uytterhoeven #define IP7_3_0		FM(D13)			FM(LCDOUT5)	FM(MSIOF2_SS2_D)	FM(TX4_C)			FM(VI4_DATA5_A)	F_(0, 0)	FM(DU_DR5)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
320077365a9SGeert Uytterhoeven #define IP7_7_4		FM(D14)			FM(LCDOUT6)	FM(MSIOF3_SS1_A)	FM(HRX3_C)			FM(VI4_DATA6_A)	F_(0, 0)	FM(DU_DR6)		FM(SCL6_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
321077365a9SGeert Uytterhoeven #define IP7_11_8	FM(D15)			FM(LCDOUT7)	FM(MSIOF3_SS2_A)	FM(HTX3_C)			FM(VI4_DATA7_A)	F_(0, 0)	FM(DU_DR7)		FM(SDA6_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
322077365a9SGeert Uytterhoeven #define IP7_19_16	FM(SD0_CLK)		F_(0, 0)	FM(MSIOF1_SCK_E)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_OPWM_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
323077365a9SGeert Uytterhoeven #define IP7_23_20	FM(SD0_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_E)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
324077365a9SGeert Uytterhoeven #define IP7_27_24	FM(SD0_DAT0)		F_(0, 0)	FM(MSIOF1_RXD_E)	F_(0, 0)			F_(0, 0)	FM(TS_SCK0_B)	FM(STP_ISCLK_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
325077365a9SGeert Uytterhoeven #define IP7_31_28	FM(SD0_DAT1)		F_(0, 0)	FM(MSIOF1_TXD_E)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_B)FM(STP_ISSYNC_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
326077365a9SGeert Uytterhoeven #define IP8_3_0		FM(SD0_DAT2)		F_(0, 0)	FM(MSIOF1_SS1_E)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_B)	FM(STP_ISD_0_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
327077365a9SGeert Uytterhoeven #define IP8_7_4		FM(SD0_DAT3)		F_(0, 0)	FM(MSIOF1_SS2_E)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_B)	FM(STP_ISEN_0_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
328077365a9SGeert Uytterhoeven #define IP8_11_8	FM(SD1_CLK)		F_(0, 0)	FM(MSIOF1_SCK_G)	F_(0, 0)			F_(0, 0)	FM(SIM0_CLK_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
329077365a9SGeert Uytterhoeven #define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	FM(NFCE_N_B)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
330077365a9SGeert Uytterhoeven #define IP8_19_16	FM(SD1_DAT0)		FM(SD2_DAT4)	FM(MSIOF1_RXD_G)	FM(NFWP_N_B)			F_(0, 0)	FM(TS_SCK1_B)	FM(STP_ISCLK_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
331077365a9SGeert Uytterhoeven #define IP8_23_20	FM(SD1_DAT1)		FM(SD2_DAT5)	FM(MSIOF1_TXD_G)	FM(NFDATA14_B)			F_(0, 0)	FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
332077365a9SGeert Uytterhoeven #define IP8_27_24	FM(SD1_DAT2)		FM(SD2_DAT6)	FM(MSIOF1_SS1_G)	FM(NFDATA15_B)			F_(0, 0)	FM(TS_SDAT1_B)	FM(STP_ISD_1_B)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
333077365a9SGeert Uytterhoeven #define IP8_31_28	FM(SD1_DAT3)		FM(SD2_DAT7)	FM(MSIOF1_SS2_G)	FM(NFRB_N_B)			F_(0, 0)	FM(TS_SDEN1_B)	FM(STP_ISEN_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
334077365a9SGeert Uytterhoeven #define IP9_3_0		FM(SD2_CLK)		F_(0, 0)	FM(NFDATA8)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
335077365a9SGeert Uytterhoeven #define IP9_7_4		FM(SD2_CMD)		F_(0, 0)	FM(NFDATA9)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
336077365a9SGeert Uytterhoeven #define IP9_11_8	FM(SD2_DAT0)		F_(0, 0)	FM(NFDATA10)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
337077365a9SGeert Uytterhoeven #define IP9_15_12	FM(SD2_DAT1)		F_(0, 0)	FM(NFDATA11)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
338077365a9SGeert Uytterhoeven #define IP9_19_16	FM(SD2_DAT2)		F_(0, 0)	FM(NFDATA12)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
339077365a9SGeert Uytterhoeven #define IP9_23_20	FM(SD2_DAT3)		F_(0, 0)	FM(NFDATA13)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
340077365a9SGeert Uytterhoeven #define IP9_27_24	FM(SD2_DS)		F_(0, 0)	FM(NFALE)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_B)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
341077365a9SGeert Uytterhoeven #define IP9_31_28	FM(SD3_CLK)		F_(0, 0)	FM(NFWE_N)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
342077365a9SGeert Uytterhoeven #define IP10_3_0	FM(SD3_CMD)		F_(0, 0)	FM(NFRE_N)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
343077365a9SGeert Uytterhoeven #define IP10_7_4	FM(SD3_DAT0)		F_(0, 0)	FM(NFDATA0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
344077365a9SGeert Uytterhoeven #define IP10_11_8	FM(SD3_DAT1)		F_(0, 0)	FM(NFDATA1)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
345077365a9SGeert Uytterhoeven #define IP10_15_12	FM(SD3_DAT2)		F_(0, 0)	FM(NFDATA2)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
346077365a9SGeert Uytterhoeven #define IP10_19_16	FM(SD3_DAT3)		F_(0, 0)	FM(NFDATA3)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
347077365a9SGeert Uytterhoeven #define IP10_23_20	FM(SD3_DAT4)		FM(SD2_CD_A)	FM(NFDATA4)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
348077365a9SGeert Uytterhoeven #define IP10_27_24	FM(SD3_DAT5)		FM(SD2_WP_A)	FM(NFDATA5)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
349077365a9SGeert Uytterhoeven #define IP10_31_28	FM(SD3_DAT6)		FM(SD3_CD)	FM(NFDATA6)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
350077365a9SGeert Uytterhoeven #define IP11_3_0	FM(SD3_DAT7)		FM(SD3_WP)	FM(NFDATA7)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
351077365a9SGeert Uytterhoeven #define IP11_7_4	FM(SD3_DS)		F_(0, 0)	FM(NFCLE)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
352077365a9SGeert Uytterhoeven #define IP11_11_8	FM(SD0_CD)		F_(0, 0)	FM(NFDATA14_A)		F_(0, 0)			FM(SCL2_B)	FM(SIM0_RST_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
353077365a9SGeert Uytterhoeven 
354077365a9SGeert Uytterhoeven /* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
355077365a9SGeert Uytterhoeven #define IP11_15_12	FM(SD0_WP)		F_(0, 0)	FM(NFDATA15_A)		F_(0, 0)			FM(SDA2_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
356077365a9SGeert Uytterhoeven #define IP11_19_16	FM(SD1_CD)		F_(0, 0)	FM(NFRB_N_A)		F_(0, 0)			F_(0, 0)	FM(SIM0_CLK_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
357077365a9SGeert Uytterhoeven #define IP11_23_20	FM(SD1_WP)		F_(0, 0)	FM(NFCE_N_A)		F_(0, 0)			F_(0, 0)	FM(SIM0_D_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
358077365a9SGeert Uytterhoeven #define IP11_27_24	FM(SCK0)		FM(HSCK1_B)	FM(MSIOF1_SS2_B)	FM(AUDIO_CLKC_B)		FM(SDA2_A)	FM(SIM0_RST_B)	FM(STP_OPWM_0_C)	FM(RIF0_CLK_B)	F_(0, 0)		FM(ADICHS2)	FM(SCK5_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
359077365a9SGeert Uytterhoeven #define IP11_31_28	FM(RX0)			FM(HRX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SCK0_C)	FM(STP_ISCLK_0_C)	FM(RIF0_D0_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
360077365a9SGeert Uytterhoeven #define IP12_3_0	FM(TX0)			FM(HTX1_B)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C)	FM(RIF0_D1_B)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
361077365a9SGeert Uytterhoeven #define IP12_7_4	FM(CTS0_N)		FM(HCTS1_N_B)	FM(MSIOF1_SYNC_B)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C)	FM(RIF1_SYNC_B)	FM(AUDIO_CLKOUT_C)	FM(ADICS_SAMP)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
362077365a9SGeert Uytterhoeven #define IP12_11_8	FM(RTS0_N)		FM(HRTS1_N_B)	FM(MSIOF1_SS1_B)	FM(AUDIO_CLKA_B)		FM(SCL2_A)	F_(0, 0)	FM(STP_IVCXO27_1_C)	FM(RIF0_SYNC_B)	F_(0, 0)		FM(ADICHS1)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
363077365a9SGeert Uytterhoeven #define IP12_15_12	FM(RX1_A)		FM(HRX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_C)	FM(STP_ISD_0_C)		FM(RIF1_CLK_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
364077365a9SGeert Uytterhoeven #define IP12_19_16	FM(TX1_A)		FM(HTX1_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_C)	FM(STP_ISEN_0_C)	FM(RIF1_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
365077365a9SGeert Uytterhoeven #define IP12_23_20	FM(CTS1_N)		FM(HCTS1_N_A)	FM(MSIOF1_RXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_C)	FM(STP_ISEN_1_C)	FM(RIF1_D0_B)	F_(0, 0)		FM(ADIDATA)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
366077365a9SGeert Uytterhoeven #define IP12_27_24	FM(RTS1_N)		FM(HRTS1_N_A)	FM(MSIOF1_TXD_B)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_C)	FM(STP_ISD_1_C)		FM(RIF1_D1_B)	F_(0, 0)		FM(ADICHS0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
367077365a9SGeert Uytterhoeven #define IP12_31_28	FM(SCK2)		FM(SCIF_CLK_B)	FM(MSIOF1_SCK_B)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_C)	FM(STP_ISCLK_1_C)	FM(RIF1_CLK_B)	F_(0, 0)		FM(ADICLK)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
368077365a9SGeert Uytterhoeven #define IP13_3_0	FM(TX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_CD_B)			FM(SCL1_A)	F_(0, 0)	FM(FMCLK_A)		FM(RIF1_D1_C)	F_(0, 0)		FM(FSO_CFE_0_N)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
369077365a9SGeert Uytterhoeven #define IP13_7_4	FM(RX2_A)		F_(0, 0)	F_(0, 0)		FM(SD2_WP_B)			FM(SDA1_A)	F_(0, 0)	FM(FMIN_A)		FM(RIF1_SYNC_C)	F_(0, 0)		FM(FSO_CFE_1_N)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
370077365a9SGeert Uytterhoeven #define IP13_11_8	FM(HSCK0)		F_(0, 0)	FM(MSIOF1_SCK_D)	FM(AUDIO_CLKB_A)		FM(SSI_SDATA1_B)FM(TS_SCK0_D)	FM(STP_ISCLK_0_D)	FM(RIF0_CLK_C)	F_(0, 0)		F_(0, 0)	FM(RX5_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
371077365a9SGeert Uytterhoeven #define IP13_15_12	FM(HRX0)		F_(0, 0)	FM(MSIOF1_RXD_D)	F_(0, 0)			FM(SSI_SDATA2_B)FM(TS_SDEN0_D)	FM(STP_ISEN_0_D)	FM(RIF0_D0_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
372077365a9SGeert Uytterhoeven #define IP13_19_16	FM(HTX0)		F_(0, 0)	FM(MSIOF1_TXD_D)	F_(0, 0)			FM(SSI_SDATA9_B)FM(TS_SDAT0_D)	FM(STP_ISD_0_D)		FM(RIF0_D1_C)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
373077365a9SGeert Uytterhoeven #define IP13_23_20	FM(HCTS0_N)		FM(RX2_B)	FM(MSIOF1_SYNC_D)	F_(0, 0)			FM(SSI_SCK9_A)	FM(TS_SPSYNC0_D)FM(STP_ISSYNC_0_D)	FM(RIF0_SYNC_C)	FM(AUDIO_CLKOUT1_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
374077365a9SGeert Uytterhoeven #define IP13_27_24	FM(HRTS0_N)		FM(TX2_B)	FM(MSIOF1_SS1_D)	F_(0, 0)			FM(SSI_WS9_A)	F_(0, 0)	FM(STP_IVCXO27_0_D)	FM(BPFCLK_A)	FM(AUDIO_CLKOUT2_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
375077365a9SGeert Uytterhoeven #define IP13_31_28	FM(MSIOF0_SYNC)		F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(AUDIO_CLKOUT_A)	F_(0, 0)	FM(TX5_B)	F_(0, 0)	F_(0, 0) FM(BPFCLK_D) F_(0, 0) F_(0, 0)
376077365a9SGeert Uytterhoeven #define IP14_3_0	FM(MSIOF0_SS1)		FM(RX5_A)	FM(NFWP_N_A)		FM(AUDIO_CLKA_C)		FM(SSI_SCK2_A)	F_(0, 0)	FM(STP_IVCXO27_0_C)	F_(0, 0)	FM(AUDIO_CLKOUT3_A)	F_(0, 0)	FM(TCLK1_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
377077365a9SGeert Uytterhoeven #define IP14_7_4	FM(MSIOF0_SS2)		FM(TX5_A)	FM(MSIOF1_SS2_D)	FM(AUDIO_CLKC_A)		FM(SSI_WS2_A)	F_(0, 0)	FM(STP_OPWM_0_D)	F_(0, 0)	FM(AUDIO_CLKOUT_D)	F_(0, 0)	FM(SPEEDIN_B)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
378077365a9SGeert Uytterhoeven #define IP14_11_8	FM(MLB_CLK)		F_(0, 0)	FM(MSIOF1_SCK_F)	F_(0, 0)			FM(SCL1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
379077365a9SGeert Uytterhoeven #define IP14_15_12	FM(MLB_SIG)		FM(RX1_B)	FM(MSIOF1_SYNC_F)	F_(0, 0)			FM(SDA1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
380077365a9SGeert Uytterhoeven #define IP14_19_16	FM(MLB_DAT)		FM(TX1_B)	FM(MSIOF1_RXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
381077365a9SGeert Uytterhoeven #define IP14_23_20	FM(SSI_SCK01239)	F_(0, 0)	FM(MSIOF1_TXD_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
382077365a9SGeert Uytterhoeven #define IP14_27_24	FM(SSI_WS01239)		F_(0, 0)	FM(MSIOF1_SS1_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
383077365a9SGeert Uytterhoeven 
384077365a9SGeert Uytterhoeven /* IPSRx */		/* 0 */			/* 1 */		/* 2 */			/* 3 */				/* 4 */		/* 5 */		/* 6 */			/* 7 */		/* 8 */			/* 9 */		/* A */		/* B */		/* C - F */
385077365a9SGeert Uytterhoeven #define IP14_31_28	FM(SSI_SDATA0)		F_(0, 0)	FM(MSIOF1_SS2_F)	F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
386077365a9SGeert Uytterhoeven #define IP15_3_0	FM(SSI_SDATA1_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
387077365a9SGeert Uytterhoeven #define IP15_7_4	FM(SSI_SDATA2_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			FM(SSI_SCK1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
388077365a9SGeert Uytterhoeven #define IP15_11_8	FM(SSI_SCK349)		F_(0, 0)	FM(MSIOF1_SS1_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_OPWM_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
389077365a9SGeert Uytterhoeven #define IP15_15_12	FM(SSI_WS349)		FM(HCTS2_N_A)	FM(MSIOF1_SS2_A)	F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_0_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
390077365a9SGeert Uytterhoeven #define IP15_19_16	FM(SSI_SDATA3)		FM(HRTS2_N_A)	FM(MSIOF1_TXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SCK0_A)	FM(STP_ISCLK_0_A)	FM(RIF0_D1_A)	FM(RIF2_D0_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
391077365a9SGeert Uytterhoeven #define IP15_23_20	FM(SSI_SCK4)		FM(HRX2_A)	FM(MSIOF1_SCK_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT0_A)	FM(STP_ISD_0_A)		FM(RIF0_CLK_A)	FM(RIF2_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
392077365a9SGeert Uytterhoeven #define IP15_27_24	FM(SSI_WS4)		FM(HTX2_A)	FM(MSIOF1_SYNC_A)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN0_A)	FM(STP_ISEN_0_A)	FM(RIF0_SYNC_A)	FM(RIF2_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
393077365a9SGeert Uytterhoeven #define IP15_31_28	FM(SSI_SDATA4)		FM(HSCK2_A)	FM(MSIOF1_RXD_A)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC0_A)FM(STP_ISSYNC_0_A)	FM(RIF0_D0_A)	FM(RIF2_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
394077365a9SGeert Uytterhoeven #define IP16_3_0	FM(SSI_SCK6)		F_(0, 0)	F_(0, 0)		FM(SIM0_RST_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
395077365a9SGeert Uytterhoeven #define IP16_7_4	FM(SSI_WS6)		F_(0, 0)	F_(0, 0)		FM(SIM0_D_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
396077365a9SGeert Uytterhoeven #define IP16_11_8	FM(SSI_SDATA6)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_D)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	FM(SATA_DEVSLP_A)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
397077365a9SGeert Uytterhoeven #define IP16_15_12	FM(SSI_SCK78)		FM(HRX2_B)	FM(MSIOF1_SCK_C)	F_(0, 0)			F_(0, 0)	FM(TS_SCK1_A)	FM(STP_ISCLK_1_A)	FM(RIF1_CLK_A)	FM(RIF3_CLK_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
398077365a9SGeert Uytterhoeven #define IP16_19_16	FM(SSI_WS78)		FM(HTX2_B)	FM(MSIOF1_SYNC_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDAT1_A)	FM(STP_ISD_1_A)		FM(RIF1_SYNC_A)	FM(RIF3_SYNC_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
399077365a9SGeert Uytterhoeven #define IP16_23_20	FM(SSI_SDATA7)		FM(HCTS2_N_B)	FM(MSIOF1_RXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SDEN1_A)	FM(STP_ISEN_1_A)	FM(RIF1_D0_A)	FM(RIF3_D0_A)		F_(0, 0)	FM(TCLK2_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
400077365a9SGeert Uytterhoeven #define IP16_27_24	FM(SSI_SDATA8)		FM(HRTS2_N_B)	FM(MSIOF1_TXD_C)	F_(0, 0)			F_(0, 0)	FM(TS_SPSYNC1_A)FM(STP_ISSYNC_1_A)	FM(RIF1_D1_A)	FM(RIF3_D1_A)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
401077365a9SGeert Uytterhoeven #define IP16_31_28	FM(SSI_SDATA9_A)	FM(HSCK2_B)	FM(MSIOF1_SS1_C)	FM(HSCK1_A)			FM(SSI_WS1_B)	FM(SCK1)	FM(STP_IVCXO27_1_A)	FM(SCK5_A)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
402077365a9SGeert Uytterhoeven #define IP17_3_0	FM(AUDIO_CLKA_A)	F_(0, 0)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
403077365a9SGeert Uytterhoeven #define IP17_7_4	FM(AUDIO_CLKB_B)	FM(SCIF_CLK_A)	F_(0, 0)		F_(0, 0)			F_(0, 0)	F_(0, 0)	FM(STP_IVCXO27_1_D)	FM(REMOCON_A)	F_(0, 0)		F_(0, 0)	FM(TCLK1_A)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
404077365a9SGeert Uytterhoeven #define IP17_11_8	FM(USB0_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_RST_C)			F_(0, 0)	FM(TS_SCK1_D)	FM(STP_ISCLK_1_D)	FM(BPFCLK_B)	FM(RIF3_CLK_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) FM(HSCK2_C) F_(0, 0) F_(0, 0)
405077365a9SGeert Uytterhoeven #define IP17_15_12	FM(USB0_OVC)		F_(0, 0)	F_(0, 0)		FM(SIM0_D_C)			F_(0, 0)	FM(TS_SDAT1_D)	FM(STP_ISD_1_D)		F_(0, 0)	FM(RIF3_SYNC_B)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) FM(HRX2_C) F_(0, 0) F_(0, 0)
406077365a9SGeert Uytterhoeven #define IP17_19_16	FM(USB1_PWEN)		F_(0, 0)	F_(0, 0)		FM(SIM0_CLK_C)			FM(SSI_SCK1_A)	FM(TS_SCK0_E)	FM(STP_ISCLK_0_E)	FM(FMCLK_B)	FM(RIF2_CLK_B)		F_(0, 0)	FM(SPEEDIN_A)	F_(0, 0)	F_(0, 0) FM(HTX2_C) F_(0, 0) F_(0, 0)
407077365a9SGeert Uytterhoeven #define IP17_23_20	FM(USB1_OVC)		F_(0, 0)	FM(MSIOF1_SS2_C)	F_(0, 0)			FM(SSI_WS1_A)	FM(TS_SDAT0_E)	FM(STP_ISD_0_E)		FM(FMIN_B)	FM(RIF2_SYNC_B)		F_(0, 0)	FM(REMOCON_B)	F_(0, 0)	F_(0, 0) FM(HCTS2_N_C) F_(0, 0) F_(0, 0)
408077365a9SGeert Uytterhoeven #define IP17_27_24	FM(USB30_PWEN)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT_B)		FM(SSI_SCK2_B)	FM(TS_SDEN1_D)	FM(STP_ISEN_1_D)	FM(STP_OPWM_0_E)FM(RIF3_D0_B)		F_(0, 0)	FM(TCLK2_B)	FM(TPU0TO0)	FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0)
409077365a9SGeert Uytterhoeven #define IP17_31_28	FM(USB30_OVC)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT1_B)		FM(SSI_WS2_B)	FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D)	FM(STP_IVCXO27_0_E)FM(RIF3_D1_B)	F_(0, 0)	FM(FSO_TOE_N)	FM(TPU0TO1)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
410077365a9SGeert Uytterhoeven #define IP18_3_0	FM(GP6_30)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT2_B)		FM(SSI_SCK9_B)	FM(TS_SDEN0_E)	FM(STP_ISEN_0_E)	F_(0, 0)	FM(RIF2_D0_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO2)	FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) F_(0, 0)
411077365a9SGeert Uytterhoeven #define IP18_7_4	FM(GP6_31)		F_(0, 0)	F_(0, 0)		FM(AUDIO_CLKOUT3_B)		FM(SSI_WS9_B)	FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E)	F_(0, 0)	FM(RIF2_D1_B)		F_(0, 0)	F_(0, 0)	FM(TPU0TO3)	FM(FMIN_C) FM(FMIN_D) F_(0, 0) F_(0, 0)
412077365a9SGeert Uytterhoeven 
413077365a9SGeert Uytterhoeven #define PINMUX_GPSR	\
414077365a9SGeert Uytterhoeven \
415077365a9SGeert Uytterhoeven 												GPSR6_31 \
416077365a9SGeert Uytterhoeven 												GPSR6_30 \
417077365a9SGeert Uytterhoeven 												GPSR6_29 \
418077365a9SGeert Uytterhoeven 		GPSR1_28									GPSR6_28 \
419077365a9SGeert Uytterhoeven 		GPSR1_27									GPSR6_27 \
420077365a9SGeert Uytterhoeven 		GPSR1_26									GPSR6_26 \
421077365a9SGeert Uytterhoeven 		GPSR1_25							GPSR5_25	GPSR6_25 \
422077365a9SGeert Uytterhoeven 		GPSR1_24							GPSR5_24	GPSR6_24 \
423077365a9SGeert Uytterhoeven 		GPSR1_23							GPSR5_23	GPSR6_23 \
424077365a9SGeert Uytterhoeven 		GPSR1_22							GPSR5_22	GPSR6_22 \
425077365a9SGeert Uytterhoeven 		GPSR1_21							GPSR5_21	GPSR6_21 \
426077365a9SGeert Uytterhoeven 		GPSR1_20							GPSR5_20	GPSR6_20 \
427077365a9SGeert Uytterhoeven 		GPSR1_19							GPSR5_19	GPSR6_19 \
428077365a9SGeert Uytterhoeven 		GPSR1_18							GPSR5_18	GPSR6_18 \
429077365a9SGeert Uytterhoeven 		GPSR1_17					GPSR4_17	GPSR5_17	GPSR6_17 \
430077365a9SGeert Uytterhoeven 		GPSR1_16					GPSR4_16	GPSR5_16	GPSR6_16 \
431077365a9SGeert Uytterhoeven GPSR0_15	GPSR1_15			GPSR3_15	GPSR4_15	GPSR5_15	GPSR6_15 \
432077365a9SGeert Uytterhoeven GPSR0_14	GPSR1_14	GPSR2_14	GPSR3_14	GPSR4_14	GPSR5_14	GPSR6_14 \
433077365a9SGeert Uytterhoeven GPSR0_13	GPSR1_13	GPSR2_13	GPSR3_13	GPSR4_13	GPSR5_13	GPSR6_13 \
434077365a9SGeert Uytterhoeven GPSR0_12	GPSR1_12	GPSR2_12	GPSR3_12	GPSR4_12	GPSR5_12	GPSR6_12 \
435077365a9SGeert Uytterhoeven GPSR0_11	GPSR1_11	GPSR2_11	GPSR3_11	GPSR4_11	GPSR5_11	GPSR6_11 \
436077365a9SGeert Uytterhoeven GPSR0_10	GPSR1_10	GPSR2_10	GPSR3_10	GPSR4_10	GPSR5_10	GPSR6_10 \
437077365a9SGeert Uytterhoeven GPSR0_9		GPSR1_9		GPSR2_9		GPSR3_9		GPSR4_9		GPSR5_9		GPSR6_9 \
438077365a9SGeert Uytterhoeven GPSR0_8		GPSR1_8		GPSR2_8		GPSR3_8		GPSR4_8		GPSR5_8		GPSR6_8 \
439077365a9SGeert Uytterhoeven GPSR0_7		GPSR1_7		GPSR2_7		GPSR3_7		GPSR4_7		GPSR5_7		GPSR6_7 \
440077365a9SGeert Uytterhoeven GPSR0_6		GPSR1_6		GPSR2_6		GPSR3_6		GPSR4_6		GPSR5_6		GPSR6_6 \
441077365a9SGeert Uytterhoeven GPSR0_5		GPSR1_5		GPSR2_5		GPSR3_5		GPSR4_5		GPSR5_5		GPSR6_5 \
442077365a9SGeert Uytterhoeven GPSR0_4		GPSR1_4		GPSR2_4		GPSR3_4		GPSR4_4		GPSR5_4		GPSR6_4 \
443077365a9SGeert Uytterhoeven GPSR0_3		GPSR1_3		GPSR2_3		GPSR3_3		GPSR4_3		GPSR5_3		GPSR6_3		GPSR7_3 \
444077365a9SGeert Uytterhoeven GPSR0_2		GPSR1_2		GPSR2_2		GPSR3_2		GPSR4_2		GPSR5_2		GPSR6_2		GPSR7_2 \
445077365a9SGeert Uytterhoeven GPSR0_1		GPSR1_1		GPSR2_1		GPSR3_1		GPSR4_1		GPSR5_1		GPSR6_1		GPSR7_1 \
446077365a9SGeert Uytterhoeven GPSR0_0		GPSR1_0		GPSR2_0		GPSR3_0		GPSR4_0		GPSR5_0		GPSR6_0		GPSR7_0
447077365a9SGeert Uytterhoeven 
448077365a9SGeert Uytterhoeven #define PINMUX_IPSR				\
449077365a9SGeert Uytterhoeven \
450077365a9SGeert Uytterhoeven FM(IP0_3_0)	IP0_3_0		FM(IP1_3_0)	IP1_3_0		FM(IP2_3_0)	IP2_3_0		FM(IP3_3_0)	IP3_3_0 \
451077365a9SGeert Uytterhoeven FM(IP0_7_4)	IP0_7_4		FM(IP1_7_4)	IP1_7_4		FM(IP2_7_4)	IP2_7_4		FM(IP3_7_4)	IP3_7_4 \
452077365a9SGeert Uytterhoeven FM(IP0_11_8)	IP0_11_8	FM(IP1_11_8)	IP1_11_8	FM(IP2_11_8)	IP2_11_8	FM(IP3_11_8)	IP3_11_8 \
453077365a9SGeert Uytterhoeven FM(IP0_15_12)	IP0_15_12	FM(IP1_15_12)	IP1_15_12	FM(IP2_15_12)	IP2_15_12	FM(IP3_15_12)	IP3_15_12 \
454077365a9SGeert Uytterhoeven FM(IP0_19_16)	IP0_19_16	FM(IP1_19_16)	IP1_19_16	FM(IP2_19_16)	IP2_19_16	FM(IP3_19_16)	IP3_19_16 \
455077365a9SGeert Uytterhoeven FM(IP0_23_20)	IP0_23_20	FM(IP1_23_20)	IP1_23_20	FM(IP2_23_20)	IP2_23_20	FM(IP3_23_20)	IP3_23_20 \
456077365a9SGeert Uytterhoeven FM(IP0_27_24)	IP0_27_24	FM(IP1_27_24)	IP1_27_24	FM(IP2_27_24)	IP2_27_24	FM(IP3_27_24)	IP3_27_24 \
457077365a9SGeert Uytterhoeven FM(IP0_31_28)	IP0_31_28	FM(IP1_31_28)	IP1_31_28	FM(IP2_31_28)	IP2_31_28	FM(IP3_31_28)	IP3_31_28 \
458077365a9SGeert Uytterhoeven \
459077365a9SGeert Uytterhoeven FM(IP4_3_0)	IP4_3_0		FM(IP5_3_0)	IP5_3_0		FM(IP6_3_0)	IP6_3_0		FM(IP7_3_0)	IP7_3_0 \
460077365a9SGeert Uytterhoeven FM(IP4_7_4)	IP4_7_4		FM(IP5_7_4)	IP5_7_4		FM(IP6_7_4)	IP6_7_4		FM(IP7_7_4)	IP7_7_4 \
461077365a9SGeert Uytterhoeven FM(IP4_11_8)	IP4_11_8	FM(IP5_11_8)	IP5_11_8	FM(IP6_11_8)	IP6_11_8	FM(IP7_11_8)	IP7_11_8 \
462077365a9SGeert Uytterhoeven FM(IP4_15_12)	IP4_15_12	FM(IP5_15_12)	IP5_15_12	FM(IP6_15_12)	IP6_15_12 \
463077365a9SGeert Uytterhoeven FM(IP4_19_16)	IP4_19_16	FM(IP5_19_16)	IP5_19_16	FM(IP6_19_16)	IP6_19_16	FM(IP7_19_16)	IP7_19_16 \
464077365a9SGeert Uytterhoeven FM(IP4_23_20)	IP4_23_20	FM(IP5_23_20)	IP5_23_20	FM(IP6_23_20)	IP6_23_20	FM(IP7_23_20)	IP7_23_20 \
465077365a9SGeert Uytterhoeven FM(IP4_27_24)	IP4_27_24	FM(IP5_27_24)	IP5_27_24	FM(IP6_27_24)	IP6_27_24	FM(IP7_27_24)	IP7_27_24 \
466077365a9SGeert Uytterhoeven FM(IP4_31_28)	IP4_31_28	FM(IP5_31_28)	IP5_31_28	FM(IP6_31_28)	IP6_31_28	FM(IP7_31_28)	IP7_31_28 \
467077365a9SGeert Uytterhoeven \
468077365a9SGeert Uytterhoeven FM(IP8_3_0)	IP8_3_0		FM(IP9_3_0)	IP9_3_0		FM(IP10_3_0)	IP10_3_0	FM(IP11_3_0)	IP11_3_0 \
469077365a9SGeert Uytterhoeven FM(IP8_7_4)	IP8_7_4		FM(IP9_7_4)	IP9_7_4		FM(IP10_7_4)	IP10_7_4	FM(IP11_7_4)	IP11_7_4 \
470077365a9SGeert Uytterhoeven FM(IP8_11_8)	IP8_11_8	FM(IP9_11_8)	IP9_11_8	FM(IP10_11_8)	IP10_11_8	FM(IP11_11_8)	IP11_11_8 \
471077365a9SGeert Uytterhoeven FM(IP8_15_12)	IP8_15_12	FM(IP9_15_12)	IP9_15_12	FM(IP10_15_12)	IP10_15_12	FM(IP11_15_12)	IP11_15_12 \
472077365a9SGeert Uytterhoeven FM(IP8_19_16)	IP8_19_16	FM(IP9_19_16)	IP9_19_16	FM(IP10_19_16)	IP10_19_16	FM(IP11_19_16)	IP11_19_16 \
473077365a9SGeert Uytterhoeven FM(IP8_23_20)	IP8_23_20	FM(IP9_23_20)	IP9_23_20	FM(IP10_23_20)	IP10_23_20	FM(IP11_23_20)	IP11_23_20 \
474077365a9SGeert Uytterhoeven FM(IP8_27_24)	IP8_27_24	FM(IP9_27_24)	IP9_27_24	FM(IP10_27_24)	IP10_27_24	FM(IP11_27_24)	IP11_27_24 \
475077365a9SGeert Uytterhoeven FM(IP8_31_28)	IP8_31_28	FM(IP9_31_28)	IP9_31_28	FM(IP10_31_28)	IP10_31_28	FM(IP11_31_28)	IP11_31_28 \
476077365a9SGeert Uytterhoeven \
477077365a9SGeert Uytterhoeven FM(IP12_3_0)	IP12_3_0	FM(IP13_3_0)	IP13_3_0	FM(IP14_3_0)	IP14_3_0	FM(IP15_3_0)	IP15_3_0 \
478077365a9SGeert Uytterhoeven FM(IP12_7_4)	IP12_7_4	FM(IP13_7_4)	IP13_7_4	FM(IP14_7_4)	IP14_7_4	FM(IP15_7_4)	IP15_7_4 \
479077365a9SGeert Uytterhoeven FM(IP12_11_8)	IP12_11_8	FM(IP13_11_8)	IP13_11_8	FM(IP14_11_8)	IP14_11_8	FM(IP15_11_8)	IP15_11_8 \
480077365a9SGeert Uytterhoeven FM(IP12_15_12)	IP12_15_12	FM(IP13_15_12)	IP13_15_12	FM(IP14_15_12)	IP14_15_12	FM(IP15_15_12)	IP15_15_12 \
481077365a9SGeert Uytterhoeven FM(IP12_19_16)	IP12_19_16	FM(IP13_19_16)	IP13_19_16	FM(IP14_19_16)	IP14_19_16	FM(IP15_19_16)	IP15_19_16 \
482077365a9SGeert Uytterhoeven FM(IP12_23_20)	IP12_23_20	FM(IP13_23_20)	IP13_23_20	FM(IP14_23_20)	IP14_23_20	FM(IP15_23_20)	IP15_23_20 \
483077365a9SGeert Uytterhoeven FM(IP12_27_24)	IP12_27_24	FM(IP13_27_24)	IP13_27_24	FM(IP14_27_24)	IP14_27_24	FM(IP15_27_24)	IP15_27_24 \
484077365a9SGeert Uytterhoeven FM(IP12_31_28)	IP12_31_28	FM(IP13_31_28)	IP13_31_28	FM(IP14_31_28)	IP14_31_28	FM(IP15_31_28)	IP15_31_28 \
485077365a9SGeert Uytterhoeven \
486077365a9SGeert Uytterhoeven FM(IP16_3_0)	IP16_3_0	FM(IP17_3_0)	IP17_3_0	FM(IP18_3_0)	IP18_3_0 \
487077365a9SGeert Uytterhoeven FM(IP16_7_4)	IP16_7_4	FM(IP17_7_4)	IP17_7_4	FM(IP18_7_4)	IP18_7_4 \
488077365a9SGeert Uytterhoeven FM(IP16_11_8)	IP16_11_8	FM(IP17_11_8)	IP17_11_8 \
489077365a9SGeert Uytterhoeven FM(IP16_15_12)	IP16_15_12	FM(IP17_15_12)	IP17_15_12 \
490077365a9SGeert Uytterhoeven FM(IP16_19_16)	IP16_19_16	FM(IP17_19_16)	IP17_19_16 \
491077365a9SGeert Uytterhoeven FM(IP16_23_20)	IP16_23_20	FM(IP17_23_20)	IP17_23_20 \
492077365a9SGeert Uytterhoeven FM(IP16_27_24)	IP16_27_24	FM(IP17_27_24)	IP17_27_24 \
493077365a9SGeert Uytterhoeven FM(IP16_31_28)	IP16_31_28	FM(IP17_31_28)	IP17_31_28
494077365a9SGeert Uytterhoeven 
495077365a9SGeert Uytterhoeven /* MOD_SEL0 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */			/* 4 */			/* 5 */			/* 6 */			/* 7 */
496077365a9SGeert Uytterhoeven #define MOD_SEL0_31_30_29	FM(SEL_MSIOF3_0)	FM(SEL_MSIOF3_1)	FM(SEL_MSIOF3_2)	FM(SEL_MSIOF3_3)	FM(SEL_MSIOF3_4)	F_(0, 0)		F_(0, 0)		F_(0, 0)
497077365a9SGeert Uytterhoeven #define MOD_SEL0_28_27		FM(SEL_MSIOF2_0)	FM(SEL_MSIOF2_1)	FM(SEL_MSIOF2_2)	FM(SEL_MSIOF2_3)
498077365a9SGeert Uytterhoeven #define MOD_SEL0_26_25_24	FM(SEL_MSIOF1_0)	FM(SEL_MSIOF1_1)	FM(SEL_MSIOF1_2)	FM(SEL_MSIOF1_3)	FM(SEL_MSIOF1_4)	FM(SEL_MSIOF1_5)	FM(SEL_MSIOF1_6)	F_(0, 0)
499077365a9SGeert Uytterhoeven #define MOD_SEL0_23		FM(SEL_LBSC_0)		FM(SEL_LBSC_1)
500077365a9SGeert Uytterhoeven #define MOD_SEL0_22		FM(SEL_IEBUS_0)		FM(SEL_IEBUS_1)
501077365a9SGeert Uytterhoeven #define MOD_SEL0_21		FM(SEL_I2C2_0)		FM(SEL_I2C2_1)
502077365a9SGeert Uytterhoeven #define MOD_SEL0_20		FM(SEL_I2C1_0)		FM(SEL_I2C1_1)
503077365a9SGeert Uytterhoeven #define MOD_SEL0_19		FM(SEL_HSCIF4_0)	FM(SEL_HSCIF4_1)
504077365a9SGeert Uytterhoeven #define MOD_SEL0_18_17		FM(SEL_HSCIF3_0)	FM(SEL_HSCIF3_1)	FM(SEL_HSCIF3_2)	FM(SEL_HSCIF3_3)
505077365a9SGeert Uytterhoeven #define MOD_SEL0_16		FM(SEL_HSCIF1_0)	FM(SEL_HSCIF1_1)
506077365a9SGeert Uytterhoeven #define MOD_SEL0_14_13		FM(SEL_HSCIF2_0)	FM(SEL_HSCIF2_1)	FM(SEL_HSCIF2_2)	F_(0, 0)
507077365a9SGeert Uytterhoeven #define MOD_SEL0_12		FM(SEL_ETHERAVB_0)	FM(SEL_ETHERAVB_1)
508077365a9SGeert Uytterhoeven #define MOD_SEL0_11		FM(SEL_DRIF3_0)		FM(SEL_DRIF3_1)
509077365a9SGeert Uytterhoeven #define MOD_SEL0_10		FM(SEL_DRIF2_0)		FM(SEL_DRIF2_1)
510077365a9SGeert Uytterhoeven #define MOD_SEL0_9_8		FM(SEL_DRIF1_0)		FM(SEL_DRIF1_1)		FM(SEL_DRIF1_2)		F_(0, 0)
511077365a9SGeert Uytterhoeven #define MOD_SEL0_7_6		FM(SEL_DRIF0_0)		FM(SEL_DRIF0_1)		FM(SEL_DRIF0_2)		F_(0, 0)
512077365a9SGeert Uytterhoeven #define MOD_SEL0_5		FM(SEL_CANFD0_0)	FM(SEL_CANFD0_1)
513077365a9SGeert Uytterhoeven #define MOD_SEL0_4_3		FM(SEL_ADGA_0)		FM(SEL_ADGA_1)		FM(SEL_ADGA_2)		FM(SEL_ADGA_3)
514077365a9SGeert Uytterhoeven 
515077365a9SGeert Uytterhoeven /* MOD_SEL1 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */			/* 4 */			/* 5 */			/* 6 */			/* 7 */
516077365a9SGeert Uytterhoeven #define MOD_SEL1_31_30		FM(SEL_TSIF1_0)		FM(SEL_TSIF1_1)		FM(SEL_TSIF1_2)		FM(SEL_TSIF1_3)
517077365a9SGeert Uytterhoeven #define MOD_SEL1_29_28_27	FM(SEL_TSIF0_0)		FM(SEL_TSIF0_1)		FM(SEL_TSIF0_2)		FM(SEL_TSIF0_3)		FM(SEL_TSIF0_4)		F_(0, 0)		F_(0, 0)		F_(0, 0)
518077365a9SGeert Uytterhoeven #define MOD_SEL1_26		FM(SEL_TIMER_TMU_0)	FM(SEL_TIMER_TMU_1)
519077365a9SGeert Uytterhoeven #define MOD_SEL1_25_24		FM(SEL_SSP1_1_0)	FM(SEL_SSP1_1_1)	FM(SEL_SSP1_1_2)	FM(SEL_SSP1_1_3)
520077365a9SGeert Uytterhoeven #define MOD_SEL1_23_22_21	FM(SEL_SSP1_0_0)	FM(SEL_SSP1_0_1)	FM(SEL_SSP1_0_2)	FM(SEL_SSP1_0_3)	FM(SEL_SSP1_0_4)	F_(0, 0)		F_(0, 0)		F_(0, 0)
521077365a9SGeert Uytterhoeven #define MOD_SEL1_20		FM(SEL_SSI1_0)		FM(SEL_SSI1_1)
522077365a9SGeert Uytterhoeven #define MOD_SEL1_19		FM(SEL_SPEED_PULSE_0)	FM(SEL_SPEED_PULSE_1)
523077365a9SGeert Uytterhoeven #define MOD_SEL1_18_17		FM(SEL_SIMCARD_0)	FM(SEL_SIMCARD_1)	FM(SEL_SIMCARD_2)	FM(SEL_SIMCARD_3)
524077365a9SGeert Uytterhoeven #define MOD_SEL1_16		FM(SEL_SDHI2_0)		FM(SEL_SDHI2_1)
525077365a9SGeert Uytterhoeven #define MOD_SEL1_15_14		FM(SEL_SCIF4_0)		FM(SEL_SCIF4_1)		FM(SEL_SCIF4_2)		F_(0, 0)
526077365a9SGeert Uytterhoeven #define MOD_SEL1_13		FM(SEL_SCIF3_0)		FM(SEL_SCIF3_1)
527077365a9SGeert Uytterhoeven #define MOD_SEL1_12		FM(SEL_SCIF2_0)		FM(SEL_SCIF2_1)
528077365a9SGeert Uytterhoeven #define MOD_SEL1_11		FM(SEL_SCIF1_0)		FM(SEL_SCIF1_1)
529077365a9SGeert Uytterhoeven #define MOD_SEL1_10		FM(SEL_SCIF_0)		FM(SEL_SCIF_1)
530077365a9SGeert Uytterhoeven #define MOD_SEL1_9		FM(SEL_REMOCON_0)	FM(SEL_REMOCON_1)
531077365a9SGeert Uytterhoeven #define MOD_SEL1_6		FM(SEL_RCAN0_0)		FM(SEL_RCAN0_1)
532077365a9SGeert Uytterhoeven #define MOD_SEL1_5		FM(SEL_PWM6_0)		FM(SEL_PWM6_1)
533077365a9SGeert Uytterhoeven #define MOD_SEL1_4		FM(SEL_PWM5_0)		FM(SEL_PWM5_1)
534077365a9SGeert Uytterhoeven #define MOD_SEL1_3		FM(SEL_PWM4_0)		FM(SEL_PWM4_1)
535077365a9SGeert Uytterhoeven #define MOD_SEL1_2		FM(SEL_PWM3_0)		FM(SEL_PWM3_1)
536077365a9SGeert Uytterhoeven #define MOD_SEL1_1		FM(SEL_PWM2_0)		FM(SEL_PWM2_1)
537077365a9SGeert Uytterhoeven #define MOD_SEL1_0		FM(SEL_PWM1_0)		FM(SEL_PWM1_1)
538077365a9SGeert Uytterhoeven 
539077365a9SGeert Uytterhoeven /* MOD_SEL2 */			/* 0 */			/* 1 */			/* 2 */			/* 3 */			/* 4 */			/* 5 */			/* 6 */			/* 7 */
540077365a9SGeert Uytterhoeven #define MOD_SEL2_31		FM(I2C_SEL_5_0)		FM(I2C_SEL_5_1)
541077365a9SGeert Uytterhoeven #define MOD_SEL2_30		FM(I2C_SEL_3_0)		FM(I2C_SEL_3_1)
542077365a9SGeert Uytterhoeven #define MOD_SEL2_29		FM(I2C_SEL_0_0)		FM(I2C_SEL_0_1)
543077365a9SGeert Uytterhoeven #define MOD_SEL2_28_27		FM(SEL_FM_0)		FM(SEL_FM_1)		FM(SEL_FM_2)		FM(SEL_FM_3)
544077365a9SGeert Uytterhoeven #define MOD_SEL2_26		FM(SEL_SCIF5_0)		FM(SEL_SCIF5_1)
545077365a9SGeert Uytterhoeven #define MOD_SEL2_25_24_23	FM(SEL_I2C6_0)		FM(SEL_I2C6_1)		FM(SEL_I2C6_2)		F_(0, 0)		F_(0, 0)		F_(0, 0)		F_(0, 0)		F_(0, 0)
546077365a9SGeert Uytterhoeven #define MOD_SEL2_22		FM(SEL_NDF_0)		FM(SEL_NDF_1)
547077365a9SGeert Uytterhoeven #define MOD_SEL2_21		FM(SEL_SSI2_0)		FM(SEL_SSI2_1)
548077365a9SGeert Uytterhoeven #define MOD_SEL2_20		FM(SEL_SSI9_0)		FM(SEL_SSI9_1)
549077365a9SGeert Uytterhoeven #define MOD_SEL2_19		FM(SEL_TIMER_TMU2_0)	FM(SEL_TIMER_TMU2_1)
550077365a9SGeert Uytterhoeven #define MOD_SEL2_18		FM(SEL_ADGB_0)		FM(SEL_ADGB_1)
551077365a9SGeert Uytterhoeven #define MOD_SEL2_17		FM(SEL_ADGC_0)		FM(SEL_ADGC_1)
552077365a9SGeert Uytterhoeven #define MOD_SEL2_0		FM(SEL_VIN4_0)		FM(SEL_VIN4_1)
553077365a9SGeert Uytterhoeven 
554077365a9SGeert Uytterhoeven #define PINMUX_MOD_SELS	\
555077365a9SGeert Uytterhoeven \
556077365a9SGeert Uytterhoeven MOD_SEL0_31_30_29	MOD_SEL1_31_30		MOD_SEL2_31 \
557077365a9SGeert Uytterhoeven 						MOD_SEL2_30 \
558077365a9SGeert Uytterhoeven 			MOD_SEL1_29_28_27	MOD_SEL2_29 \
559077365a9SGeert Uytterhoeven MOD_SEL0_28_27					MOD_SEL2_28_27 \
560077365a9SGeert Uytterhoeven MOD_SEL0_26_25_24	MOD_SEL1_26		MOD_SEL2_26 \
561077365a9SGeert Uytterhoeven 			MOD_SEL1_25_24		MOD_SEL2_25_24_23 \
562077365a9SGeert Uytterhoeven MOD_SEL0_23		MOD_SEL1_23_22_21 \
563077365a9SGeert Uytterhoeven MOD_SEL0_22					MOD_SEL2_22 \
564077365a9SGeert Uytterhoeven MOD_SEL0_21					MOD_SEL2_21 \
565077365a9SGeert Uytterhoeven MOD_SEL0_20		MOD_SEL1_20		MOD_SEL2_20 \
566077365a9SGeert Uytterhoeven MOD_SEL0_19		MOD_SEL1_19		MOD_SEL2_19 \
567077365a9SGeert Uytterhoeven MOD_SEL0_18_17		MOD_SEL1_18_17		MOD_SEL2_18 \
568077365a9SGeert Uytterhoeven 						MOD_SEL2_17 \
569077365a9SGeert Uytterhoeven MOD_SEL0_16		MOD_SEL1_16 \
570077365a9SGeert Uytterhoeven 			MOD_SEL1_15_14 \
571077365a9SGeert Uytterhoeven MOD_SEL0_14_13 \
572077365a9SGeert Uytterhoeven 			MOD_SEL1_13 \
573077365a9SGeert Uytterhoeven MOD_SEL0_12		MOD_SEL1_12 \
574077365a9SGeert Uytterhoeven MOD_SEL0_11		MOD_SEL1_11 \
575077365a9SGeert Uytterhoeven MOD_SEL0_10		MOD_SEL1_10 \
576077365a9SGeert Uytterhoeven MOD_SEL0_9_8		MOD_SEL1_9 \
577077365a9SGeert Uytterhoeven MOD_SEL0_7_6 \
578077365a9SGeert Uytterhoeven 			MOD_SEL1_6 \
579077365a9SGeert Uytterhoeven MOD_SEL0_5		MOD_SEL1_5 \
580077365a9SGeert Uytterhoeven MOD_SEL0_4_3		MOD_SEL1_4 \
581077365a9SGeert Uytterhoeven 			MOD_SEL1_3 \
582077365a9SGeert Uytterhoeven 			MOD_SEL1_2 \
583077365a9SGeert Uytterhoeven 			MOD_SEL1_1 \
584077365a9SGeert Uytterhoeven 			MOD_SEL1_0		MOD_SEL2_0
585077365a9SGeert Uytterhoeven 
586077365a9SGeert Uytterhoeven /*
587077365a9SGeert Uytterhoeven  * These pins are not able to be muxed but have other properties
588077365a9SGeert Uytterhoeven  * that can be set, such as drive-strength or pull-up/pull-down enable.
589077365a9SGeert Uytterhoeven  */
590077365a9SGeert Uytterhoeven #define PINMUX_STATIC \
591077365a9SGeert Uytterhoeven 	FM(QSPI0_SPCLK) FM(QSPI0_SSL) FM(QSPI0_MOSI_IO0) FM(QSPI0_MISO_IO1) \
592077365a9SGeert Uytterhoeven 	FM(QSPI0_IO2) FM(QSPI0_IO3) \
593077365a9SGeert Uytterhoeven 	FM(QSPI1_SPCLK) FM(QSPI1_SSL) FM(QSPI1_MOSI_IO0) FM(QSPI1_MISO_IO1) \
594077365a9SGeert Uytterhoeven 	FM(QSPI1_IO2) FM(QSPI1_IO3) \
595077365a9SGeert Uytterhoeven 	FM(RPC_INT) FM(RPC_WP) FM(RPC_RESET) \
596077365a9SGeert Uytterhoeven 	FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \
597077365a9SGeert Uytterhoeven 	FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \
598077365a9SGeert Uytterhoeven 	FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
599077365a9SGeert Uytterhoeven 	FM(PRESETOUT) \
600077365a9SGeert Uytterhoeven 	FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN3) \
601077365a9SGeert Uytterhoeven 	FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF) FM(TDI) FM(TCK) FM(TRST) FM(EXTALR)
602077365a9SGeert Uytterhoeven 
603077365a9SGeert Uytterhoeven #define PINMUX_PHYS \
604077365a9SGeert Uytterhoeven 	FM(SCL0) FM(SDA0) FM(SCL3) FM(SDA3) FM(SCL5) FM(SDA5)
605077365a9SGeert Uytterhoeven 
606077365a9SGeert Uytterhoeven enum {
607077365a9SGeert Uytterhoeven 	PINMUX_RESERVED = 0,
608077365a9SGeert Uytterhoeven 
609077365a9SGeert Uytterhoeven 	PINMUX_DATA_BEGIN,
610077365a9SGeert Uytterhoeven 	GP_ALL(DATA),
611077365a9SGeert Uytterhoeven 	PINMUX_DATA_END,
612077365a9SGeert Uytterhoeven 
613077365a9SGeert Uytterhoeven #define F_(x, y)
614077365a9SGeert Uytterhoeven #define FM(x)	FN_##x,
615077365a9SGeert Uytterhoeven 	PINMUX_FUNCTION_BEGIN,
616077365a9SGeert Uytterhoeven 	GP_ALL(FN),
617077365a9SGeert Uytterhoeven 	PINMUX_GPSR
618077365a9SGeert Uytterhoeven 	PINMUX_IPSR
619077365a9SGeert Uytterhoeven 	PINMUX_MOD_SELS
620077365a9SGeert Uytterhoeven 	PINMUX_FUNCTION_END,
621077365a9SGeert Uytterhoeven #undef F_
622077365a9SGeert Uytterhoeven #undef FM
623077365a9SGeert Uytterhoeven 
624077365a9SGeert Uytterhoeven #define F_(x, y)
625077365a9SGeert Uytterhoeven #define FM(x)	x##_MARK,
626077365a9SGeert Uytterhoeven 	PINMUX_MARK_BEGIN,
627077365a9SGeert Uytterhoeven 	PINMUX_GPSR
628077365a9SGeert Uytterhoeven 	PINMUX_IPSR
629077365a9SGeert Uytterhoeven 	PINMUX_MOD_SELS
630077365a9SGeert Uytterhoeven 	PINMUX_STATIC
631077365a9SGeert Uytterhoeven 	PINMUX_PHYS
632077365a9SGeert Uytterhoeven 	PINMUX_MARK_END,
633077365a9SGeert Uytterhoeven #undef F_
634077365a9SGeert Uytterhoeven #undef FM
635077365a9SGeert Uytterhoeven };
636077365a9SGeert Uytterhoeven 
637077365a9SGeert Uytterhoeven static const u16 pinmux_data[] = {
638077365a9SGeert Uytterhoeven 	PINMUX_DATA_GP_ALL(),
639077365a9SGeert Uytterhoeven 
640077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(AVS1),
641077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(AVS2),
642077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(CLKOUT),
643077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(GP7_03),
644077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(GP7_02),
645077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(MSIOF0_RXD),
646077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(MSIOF0_SCK),
647077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(MSIOF0_TXD),
648077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(SSI_SCK5),
649077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(SSI_SDATA5),
650077365a9SGeert Uytterhoeven 	PINMUX_SINGLE(SSI_WS5),
651077365a9SGeert Uytterhoeven 
652077365a9SGeert Uytterhoeven 	/* IPSR0 */
653077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_3_0,	AVB_MDC),
654077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_3_0,	MSIOF2_SS2_C,		SEL_MSIOF2_2),
655077365a9SGeert Uytterhoeven 
656077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_7_4,	AVB_MAGIC),
657077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_7_4,	MSIOF2_SS1_C,		SEL_MSIOF2_2),
658077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_7_4,	SCK4_A,			SEL_SCIF4_0),
659077365a9SGeert Uytterhoeven 
660077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_11_8,	AVB_PHY_INT),
661077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_11_8,	MSIOF2_SYNC_C,		SEL_MSIOF2_2),
662077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_11_8,	RX4_A,			SEL_SCIF4_0),
663077365a9SGeert Uytterhoeven 
664077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_15_12,	AVB_LINK),
665077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_15_12,	MSIOF2_SCK_C,		SEL_MSIOF2_2),
666077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_15_12,	TX4_A,			SEL_SCIF4_0),
667077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_19_16,	FSCLKST2_N_A),
668077365a9SGeert Uytterhoeven 
669077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A,	I2C_SEL_5_0,	SEL_ETHERAVB_0),
670077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C,		I2C_SEL_5_0,	SEL_MSIOF2_2),
671077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A,		I2C_SEL_5_0,	SEL_SCIF4_0),
672077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS(IP0_19_16,	SCL5,			I2C_SEL_5_1),
673077365a9SGeert Uytterhoeven 
674077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP0_23_20, AVB_AVTP_CAPTURE_A,	I2C_SEL_5_0,	SEL_ETHERAVB_0),
675077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP0_23_20, MSIOF2_TXD_C,		I2C_SEL_5_0,	SEL_MSIOF2_2),
676077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP0_23_20, RTS4_N_A,		I2C_SEL_5_0,	SEL_SCIF4_0),
677077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS(IP0_23_20,	SDA5,			I2C_SEL_5_1),
678077365a9SGeert Uytterhoeven 
679077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_27_24,	IRQ0),
680077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_27_24,	QPOLB),
681077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_27_24,	DU_CDE),
682077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_27_24,	VI4_DATA0_B,		SEL_VIN4_1),
683077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_27_24,	CAN0_TX_B,		SEL_RCAN0_1),
684077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_27_24,	CANFD0_TX_B,		SEL_CANFD0_1),
685077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_27_24,	MSIOF3_SS2_E,		SEL_MSIOF3_4),
686077365a9SGeert Uytterhoeven 
687077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_31_28,	IRQ1),
688077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_31_28,	QPOLA),
689077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP0_31_28,	DU_DISP),
690077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),
691077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),
692077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),
693077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP0_31_28,	MSIOF3_SS1_E,		SEL_MSIOF3_4),
694077365a9SGeert Uytterhoeven 
695077365a9SGeert Uytterhoeven 	/* IPSR1 */
696077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_3_0,	IRQ2),
697077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_3_0,	QCPV_QDE),
698077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_3_0,	DU_EXODDF_DU_ODDF_DISP_CDE),
699077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_3_0,	VI4_DATA2_B,		SEL_VIN4_1),
700077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_3_0,	PWM3_B,			SEL_PWM3_1),
701077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_3_0,	MSIOF3_SYNC_E,		SEL_MSIOF3_4),
702077365a9SGeert Uytterhoeven 
703077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_7_4,	IRQ3),
704077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_7_4,	QSTVB_QVE),
705077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_7_4,	DU_DOTCLKOUT1),
706077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_7_4,	VI4_DATA3_B,		SEL_VIN4_1),
707077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_7_4,	PWM4_B,			SEL_PWM4_1),
708077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_7_4,	MSIOF3_SCK_E,		SEL_MSIOF3_4),
709077365a9SGeert Uytterhoeven 
710077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_11_8,	IRQ4),
711077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_11_8,	QSTH_QHS),
712077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_11_8,	DU_EXHSYNC_DU_HSYNC),
713077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_11_8,	VI4_DATA4_B,		SEL_VIN4_1),
714077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_11_8,	PWM5_B,			SEL_PWM5_1),
715077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_11_8,	MSIOF3_RXD_E,		SEL_MSIOF3_4),
716077365a9SGeert Uytterhoeven 
717077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_15_12,	IRQ5),
718077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_15_12,	QSTB_QHE),
719077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_15_12,	DU_EXVSYNC_DU_VSYNC),
720077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_15_12,	VI4_DATA5_B,		SEL_VIN4_1),
721077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_15_12,	PWM6_B,			SEL_PWM6_1),
722077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_15_12,	FSCLKST2_N_B),
723077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_15_12,	MSIOF3_TXD_E,		SEL_MSIOF3_4),
724077365a9SGeert Uytterhoeven 
725077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_19_16,	PWM0),
726077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_19_16,	AVB_AVTP_PPS),
727077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_19_16,	VI4_DATA6_B,		SEL_VIN4_1),
728077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_19_16,	IECLK_B,		SEL_IEBUS_1),
729077365a9SGeert Uytterhoeven 
730077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP1_23_20, PWM1_A,		I2C_SEL_3_0,	SEL_PWM1_0),
731077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP1_23_20, HRX3_D,		I2C_SEL_3_0,	SEL_HSCIF3_3),
732077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP1_23_20, VI4_DATA7_B,		I2C_SEL_3_0,	SEL_VIN4_1),
733077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP1_23_20, IERX_B,		I2C_SEL_3_0,	SEL_IEBUS_1),
734077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS(IP1_23_20,	SCL3,			I2C_SEL_3_1),
735077365a9SGeert Uytterhoeven 
736077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A,		I2C_SEL_3_0,	SEL_PWM2_0),
737077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D,		I2C_SEL_3_0,	SEL_HSCIF3_3),
738077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP1_27_24, IETX_B,		I2C_SEL_3_0,	SEL_IEBUS_1),
739077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS(IP1_27_24,	SDA3,			I2C_SEL_3_1),
740077365a9SGeert Uytterhoeven 
741077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_31_28,	A0),
742077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_31_28,	LCDOUT16),
743077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_31_28,	MSIOF3_SYNC_B,		SEL_MSIOF3_1),
744077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_31_28,	VI4_DATA8),
745077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP1_31_28,	DU_DB0),
746077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP1_31_28,	PWM3_A,			SEL_PWM3_0),
747077365a9SGeert Uytterhoeven 
748077365a9SGeert Uytterhoeven 	/* IPSR2 */
749077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_3_0,	A1),
750077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_3_0,	LCDOUT17),
751077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_3_0,	MSIOF3_TXD_B,		SEL_MSIOF3_1),
752077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_3_0,	VI4_DATA9),
753077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_3_0,	DU_DB1),
754077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_3_0,	PWM4_A,			SEL_PWM4_0),
755077365a9SGeert Uytterhoeven 
756077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_7_4,	A2),
757077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_7_4,	LCDOUT18),
758077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_7_4,	MSIOF3_SCK_B,		SEL_MSIOF3_1),
759077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_7_4,	VI4_DATA10),
760077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_7_4,	DU_DB2),
761077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_7_4,	PWM5_A,			SEL_PWM5_0),
762077365a9SGeert Uytterhoeven 
763077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_11_8,	A3),
764077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_11_8,	LCDOUT19),
765077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_11_8,	MSIOF3_RXD_B,		SEL_MSIOF3_1),
766077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_11_8,	VI4_DATA11),
767077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_11_8,	DU_DB3),
768077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_11_8,	PWM6_A,			SEL_PWM6_0),
769077365a9SGeert Uytterhoeven 
770077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_15_12,	A4),
771077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_15_12,	LCDOUT20),
772077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_15_12,	MSIOF3_SS1_B,		SEL_MSIOF3_1),
773077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_15_12,	VI4_DATA12),
774077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_15_12,	VI5_DATA12),
775077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_15_12,	DU_DB4),
776077365a9SGeert Uytterhoeven 
777077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_19_16,	A5),
778077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_19_16,	LCDOUT21),
779077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_19_16,	MSIOF3_SS2_B,		SEL_MSIOF3_1),
780077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_19_16,	SCK4_B,			SEL_SCIF4_1),
781077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_19_16,	VI4_DATA13),
782077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_19_16,	VI5_DATA13),
783077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_19_16,	DU_DB5),
784077365a9SGeert Uytterhoeven 
785077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_23_20,	A6),
786077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_23_20,	LCDOUT22),
787077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_23_20,	MSIOF2_SS1_A,		SEL_MSIOF2_0),
788077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_23_20,	RX4_B,			SEL_SCIF4_1),
789077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_23_20,	VI4_DATA14),
790077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_23_20,	VI5_DATA14),
791077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_23_20,	DU_DB6),
792077365a9SGeert Uytterhoeven 
793077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_27_24,	A7),
794077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_27_24,	LCDOUT23),
795077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_27_24,	MSIOF2_SS2_A,		SEL_MSIOF2_0),
796077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_27_24,	TX4_B,			SEL_SCIF4_1),
797077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_27_24,	VI4_DATA15),
798077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_27_24,	VI5_DATA15),
799077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_27_24,	DU_DB7),
800077365a9SGeert Uytterhoeven 
801077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP2_31_28,	A8),
802077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_31_28,	RX3_B,			SEL_SCIF3_1),
803077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_31_28,	MSIOF2_SYNC_A,		SEL_MSIOF2_0),
804077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_31_28,	HRX4_B,			SEL_HSCIF4_1),
805077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_31_28,	SDA6_A,			SEL_I2C6_0),
806077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_31_28,	AVB_AVTP_MATCH_B,	SEL_ETHERAVB_1),
807077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP2_31_28,	PWM1_B,			SEL_PWM1_1),
808077365a9SGeert Uytterhoeven 
809077365a9SGeert Uytterhoeven 	/* IPSR3 */
810077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_3_0,	A9),
811077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_3_0,	MSIOF2_SCK_A,		SEL_MSIOF2_0),
812077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_3_0,	CTS4_N_B,		SEL_SCIF4_1),
813077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_3_0,	VI5_VSYNC_N),
814077365a9SGeert Uytterhoeven 
815077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_7_4,	A10),
816077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_7_4,	MSIOF2_RXD_A,		SEL_MSIOF2_0),
817077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_7_4,	RTS4_N_B,		SEL_SCIF4_1),
818077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_7_4,	VI5_HSYNC_N),
819077365a9SGeert Uytterhoeven 
820077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_11_8,	A11),
821077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_11_8,	TX3_B,			SEL_SCIF3_1),
822077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_11_8,	MSIOF2_TXD_A,		SEL_MSIOF2_0),
823077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_11_8,	HTX4_B,			SEL_HSCIF4_1),
824077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_11_8,	HSCK4),
825077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_11_8,	VI5_FIELD),
826077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_11_8,	SCL6_A,			SEL_I2C6_0),
827077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_11_8,	AVB_AVTP_CAPTURE_B,	SEL_ETHERAVB_1),
828077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_11_8,	PWM2_B,			SEL_PWM2_1),
829077365a9SGeert Uytterhoeven 
830077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_15_12,	A12),
831077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_15_12,	LCDOUT12),
832077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_15_12,	MSIOF3_SCK_C,		SEL_MSIOF3_2),
833077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_15_12,	HRX4_A,			SEL_HSCIF4_0),
834077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_15_12,	VI5_DATA8),
835077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_15_12,	DU_DG4),
836077365a9SGeert Uytterhoeven 
837077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_19_16,	A13),
838077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_19_16,	LCDOUT13),
839077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_19_16,	MSIOF3_SYNC_C,		SEL_MSIOF3_2),
840077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_19_16,	HTX4_A,			SEL_HSCIF4_0),
841077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_19_16,	VI5_DATA9),
842077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_19_16,	DU_DG5),
843077365a9SGeert Uytterhoeven 
844077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_23_20,	A14),
845077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_23_20,	LCDOUT14),
846077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_23_20,	MSIOF3_RXD_C,		SEL_MSIOF3_2),
847077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_23_20,	HCTS4_N),
848077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_23_20,	VI5_DATA10),
849077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_23_20,	DU_DG6),
850077365a9SGeert Uytterhoeven 
851077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_27_24,	A15),
852077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_27_24,	LCDOUT15),
853077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP3_27_24,	MSIOF3_TXD_C,		SEL_MSIOF3_2),
854077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_27_24,	HRTS4_N),
855077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_27_24,	VI5_DATA11),
856077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_27_24,	DU_DG7),
857077365a9SGeert Uytterhoeven 
858077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_31_28,	A16),
859077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_31_28,	LCDOUT8),
860077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_31_28,	VI4_FIELD),
861077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP3_31_28,	DU_DG0),
862077365a9SGeert Uytterhoeven 
863077365a9SGeert Uytterhoeven 	/* IPSR4 */
864077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_3_0,	A17),
865077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_3_0,	LCDOUT9),
866077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_3_0,	VI4_VSYNC_N),
867077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_3_0,	DU_DG1),
868077365a9SGeert Uytterhoeven 
869077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_7_4,	A18),
870077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_7_4,	LCDOUT10),
871077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_7_4,	VI4_HSYNC_N),
872077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_7_4,	DU_DG2),
873077365a9SGeert Uytterhoeven 
874077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_11_8,	A19),
875077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_11_8,	LCDOUT11),
876077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_11_8,	VI4_CLKENB),
877077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_11_8,	DU_DG3),
878077365a9SGeert Uytterhoeven 
879077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_15_12,	CS0_N),
880077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_15_12,	VI5_CLKENB),
881077365a9SGeert Uytterhoeven 
882077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_19_16,	CS1_N),
883077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_19_16,	VI5_CLK),
884077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_19_16,	EX_WAIT0_B,		SEL_LBSC_1),
885077365a9SGeert Uytterhoeven 
886077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_23_20,	BS_N),
887077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_23_20,	QSTVA_QVS),
888077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_23_20,	MSIOF3_SCK_D,		SEL_MSIOF3_3),
889077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_23_20,	SCK3),
890077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_23_20,	HSCK3),
891077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_23_20,	CAN1_TX),
892077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_23_20,	CANFD1_TX),
893077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_23_20,	IETX_A,			SEL_IEBUS_0),
894077365a9SGeert Uytterhoeven 
895077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_27_24,	RD_N),
896077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_27_24,	MSIOF3_SYNC_D,		SEL_MSIOF3_3),
897077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_27_24,	RX3_A,			SEL_SCIF3_0),
898077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_27_24,	HRX3_A,			SEL_HSCIF3_0),
899077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_27_24,	CAN0_TX_A,		SEL_RCAN0_0),
900077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_27_24,	CANFD0_TX_A,		SEL_CANFD0_0),
901077365a9SGeert Uytterhoeven 
902077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP4_31_28,	RD_WR_N),
903077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_31_28,	MSIOF3_RXD_D,		SEL_MSIOF3_3),
904077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_31_28,	TX3_A,			SEL_SCIF3_0),
905077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_31_28,	HTX3_A,			SEL_HSCIF3_0),
906077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_31_28,	CAN0_RX_A,		SEL_RCAN0_0),
907077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP4_31_28,	CANFD0_RX_A,		SEL_CANFD0_0),
908077365a9SGeert Uytterhoeven 
909077365a9SGeert Uytterhoeven 	/* IPSR5 */
910077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_3_0,	WE0_N),
911077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_3_0,	MSIOF3_TXD_D,		SEL_MSIOF3_3),
912077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_3_0,	CTS3_N),
913077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_3_0,	HCTS3_N),
914077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_3_0,	SCL6_B,			SEL_I2C6_1),
915077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_3_0,	CAN_CLK),
916077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_3_0,	IECLK_A,		SEL_IEBUS_0),
917077365a9SGeert Uytterhoeven 
918077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_7_4,	WE1_N),
919077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_7_4,	MSIOF3_SS1_D,		SEL_MSIOF3_3),
920077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_7_4,	RTS3_N),
921077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_7_4,	HRTS3_N),
922077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_7_4,	SDA6_B,			SEL_I2C6_1),
923077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_7_4,	CAN1_RX),
924077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_7_4,	CANFD1_RX),
925077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_7_4,	IERX_A,			SEL_IEBUS_0),
926077365a9SGeert Uytterhoeven 
927077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_11_8,	EX_WAIT0_A,		SEL_LBSC_0),
928077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_11_8,	QCLK),
929077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_11_8,	VI4_CLK),
930077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_11_8,	DU_DOTCLKOUT0),
931077365a9SGeert Uytterhoeven 
932077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_15_12,	D0),
933077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_15_12,	MSIOF2_SS1_B,		SEL_MSIOF2_1),
934077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_15_12,	MSIOF3_SCK_A,		SEL_MSIOF3_0),
935077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_15_12,	VI4_DATA16),
936077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_15_12,	VI5_DATA0),
937077365a9SGeert Uytterhoeven 
938077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_19_16,	D1),
939077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_19_16,	MSIOF2_SS2_B,		SEL_MSIOF2_1),
940077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_19_16,	MSIOF3_SYNC_A,		SEL_MSIOF3_0),
941077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_19_16,	VI4_DATA17),
942077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_19_16,	VI5_DATA1),
943077365a9SGeert Uytterhoeven 
944077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_23_20,	D2),
945077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_23_20,	MSIOF3_RXD_A,		SEL_MSIOF3_0),
946077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_23_20,	VI4_DATA18),
947077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_23_20,	VI5_DATA2),
948077365a9SGeert Uytterhoeven 
949077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_27_24,	D3),
950077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_27_24,	MSIOF3_TXD_A,		SEL_MSIOF3_0),
951077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_27_24,	VI4_DATA19),
952077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_27_24,	VI5_DATA3),
953077365a9SGeert Uytterhoeven 
954077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_31_28,	D4),
955077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP5_31_28,	MSIOF2_SCK_B,		SEL_MSIOF2_1),
956077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_31_28,	VI4_DATA20),
957077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP5_31_28,	VI5_DATA4),
958077365a9SGeert Uytterhoeven 
959077365a9SGeert Uytterhoeven 	/* IPSR6 */
960077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_3_0,	D5),
961077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_3_0,	MSIOF2_SYNC_B,		SEL_MSIOF2_1),
962077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_3_0,	VI4_DATA21),
963077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_3_0,	VI5_DATA5),
964077365a9SGeert Uytterhoeven 
965077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_7_4,	D6),
966077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_7_4,	MSIOF2_RXD_B,		SEL_MSIOF2_1),
967077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_7_4,	VI4_DATA22),
968077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_7_4,	VI5_DATA6),
969077365a9SGeert Uytterhoeven 
970077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_11_8,	D7),
971077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_11_8,	MSIOF2_TXD_B,		SEL_MSIOF2_1),
972077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_11_8,	VI4_DATA23),
973077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_11_8,	VI5_DATA7),
974077365a9SGeert Uytterhoeven 
975077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_15_12,	D8),
976077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_15_12,	LCDOUT0),
977077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_15_12,	MSIOF2_SCK_D,		SEL_MSIOF2_3),
978077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_15_12,	SCK4_C,			SEL_SCIF4_2),
979077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_15_12,	VI4_DATA0_A,		SEL_VIN4_0),
980077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_15_12,	DU_DR0),
981077365a9SGeert Uytterhoeven 
982077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_19_16,	D9),
983077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_19_16,	LCDOUT1),
984077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_19_16,	MSIOF2_SYNC_D,		SEL_MSIOF2_3),
985077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_19_16,	VI4_DATA1_A,		SEL_VIN4_0),
986077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_19_16,	DU_DR1),
987077365a9SGeert Uytterhoeven 
988077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_23_20,	D10),
989077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_23_20,	LCDOUT2),
990077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_23_20,	MSIOF2_RXD_D,		SEL_MSIOF2_3),
991077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_23_20,	HRX3_B,			SEL_HSCIF3_1),
992077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_23_20,	VI4_DATA2_A,		SEL_VIN4_0),
993077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_23_20,	CTS4_N_C,		SEL_SCIF4_2),
994077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_23_20,	DU_DR2),
995077365a9SGeert Uytterhoeven 
996077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_27_24,	D11),
997077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_27_24,	LCDOUT3),
998077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_27_24,	MSIOF2_TXD_D,		SEL_MSIOF2_3),
999077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_27_24,	HTX3_B,			SEL_HSCIF3_1),
1000077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_27_24,	VI4_DATA3_A,		SEL_VIN4_0),
1001077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_27_24,	RTS4_N_C,		SEL_SCIF4_2),
1002077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_27_24,	DU_DR3),
1003077365a9SGeert Uytterhoeven 
1004077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_31_28,	D12),
1005077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_31_28,	LCDOUT4),
1006077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_31_28,	MSIOF2_SS1_D,		SEL_MSIOF2_3),
1007077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_31_28,	RX4_C,			SEL_SCIF4_2),
1008077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP6_31_28,	VI4_DATA4_A,		SEL_VIN4_0),
1009077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP6_31_28,	DU_DR4),
1010077365a9SGeert Uytterhoeven 
1011077365a9SGeert Uytterhoeven 	/* IPSR7 */
1012077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_3_0,	D13),
1013077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_3_0,	LCDOUT5),
1014077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_3_0,	MSIOF2_SS2_D,		SEL_MSIOF2_3),
1015077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_3_0,	TX4_C,			SEL_SCIF4_2),
1016077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_3_0,	VI4_DATA5_A,		SEL_VIN4_0),
1017077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_3_0,	DU_DR5),
1018077365a9SGeert Uytterhoeven 
1019077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_7_4,	D14),
1020077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_7_4,	LCDOUT6),
1021077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_7_4,	MSIOF3_SS1_A,		SEL_MSIOF3_0),
1022077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_7_4,	HRX3_C,			SEL_HSCIF3_2),
1023077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_7_4,	VI4_DATA6_A,		SEL_VIN4_0),
1024077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_7_4,	DU_DR6),
1025077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_7_4,	SCL6_C,			SEL_I2C6_2),
1026077365a9SGeert Uytterhoeven 
1027077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_11_8,	D15),
1028077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_11_8,	LCDOUT7),
1029077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_11_8,	MSIOF3_SS2_A,		SEL_MSIOF3_0),
1030077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_11_8,	HTX3_C,			SEL_HSCIF3_2),
1031077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_11_8,	VI4_DATA7_A,		SEL_VIN4_0),
1032077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_11_8,	DU_DR7),
1033077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_11_8,	SDA6_C,			SEL_I2C6_2),
1034077365a9SGeert Uytterhoeven 
1035077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_19_16,	SD0_CLK),
1036077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_19_16,	MSIOF1_SCK_E,		SEL_MSIOF1_4),
1037077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_19_16,	STP_OPWM_0_B,		SEL_SSP1_0_1),
1038077365a9SGeert Uytterhoeven 
1039077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_23_20,	SD0_CMD),
1040077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_23_20,	MSIOF1_SYNC_E,		SEL_MSIOF1_4),
1041077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_23_20,	STP_IVCXO27_0_B,	SEL_SSP1_0_1),
1042077365a9SGeert Uytterhoeven 
1043077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_27_24,	SD0_DAT0),
1044077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_27_24,	MSIOF1_RXD_E,		SEL_MSIOF1_4),
1045077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_27_24,	TS_SCK0_B,		SEL_TSIF0_1),
1046077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_27_24,	STP_ISCLK_0_B,		SEL_SSP1_0_1),
1047077365a9SGeert Uytterhoeven 
1048077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP7_31_28,	SD0_DAT1),
1049077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_31_28,	MSIOF1_TXD_E,		SEL_MSIOF1_4),
1050077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_31_28,	TS_SPSYNC0_B,		SEL_TSIF0_1),
1051077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP7_31_28,	STP_ISSYNC_0_B,		SEL_SSP1_0_1),
1052077365a9SGeert Uytterhoeven 
1053077365a9SGeert Uytterhoeven 	/* IPSR8 */
1054077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_3_0,	SD0_DAT2),
1055077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_3_0,	MSIOF1_SS1_E,		SEL_MSIOF1_4),
1056077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_3_0,	TS_SDAT0_B,		SEL_TSIF0_1),
1057077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_3_0,	STP_ISD_0_B,		SEL_SSP1_0_1),
1058077365a9SGeert Uytterhoeven 
1059077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_7_4,	SD0_DAT3),
1060077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_7_4,	MSIOF1_SS2_E,		SEL_MSIOF1_4),
1061077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_7_4,	TS_SDEN0_B,		SEL_TSIF0_1),
1062077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_7_4,	STP_ISEN_0_B,		SEL_SSP1_0_1),
1063077365a9SGeert Uytterhoeven 
1064077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_11_8,	SD1_CLK),
1065077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_11_8,	MSIOF1_SCK_G,		SEL_MSIOF1_6),
1066077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_11_8,	SIM0_CLK_A,		SEL_SIMCARD_0),
1067077365a9SGeert Uytterhoeven 
1068077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_15_12,	SD1_CMD),
1069077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_15_12,	MSIOF1_SYNC_G,		SEL_MSIOF1_6),
1070077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_15_12,	NFCE_N_B,		SEL_NDF_1),
1071077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_15_12,	SIM0_D_A,		SEL_SIMCARD_0),
1072077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_15_12,	STP_IVCXO27_1_B,	SEL_SSP1_1_1),
1073077365a9SGeert Uytterhoeven 
1074077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_19_16,	SD1_DAT0),
1075077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_19_16,	SD2_DAT4),
1076077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_19_16,	MSIOF1_RXD_G,		SEL_MSIOF1_6),
1077077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_19_16,	NFWP_N_B,		SEL_NDF_1),
1078077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_19_16,	TS_SCK1_B,		SEL_TSIF1_1),
1079077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_19_16,	STP_ISCLK_1_B,		SEL_SSP1_1_1),
1080077365a9SGeert Uytterhoeven 
1081077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_23_20,	SD1_DAT1),
1082077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_23_20,	SD2_DAT5),
1083077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_23_20,	MSIOF1_TXD_G,		SEL_MSIOF1_6),
1084077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_23_20,	NFDATA14_B,		SEL_NDF_1),
1085077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_23_20,	TS_SPSYNC1_B,		SEL_TSIF1_1),
1086077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_23_20,	STP_ISSYNC_1_B,		SEL_SSP1_1_1),
1087077365a9SGeert Uytterhoeven 
1088077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_27_24,	SD1_DAT2),
1089077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_27_24,	SD2_DAT6),
1090077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_27_24,	MSIOF1_SS1_G,		SEL_MSIOF1_6),
1091077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_27_24,	NFDATA15_B,		SEL_NDF_1),
1092077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_27_24,	TS_SDAT1_B,		SEL_TSIF1_1),
1093077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_27_24,	STP_ISD_1_B,		SEL_SSP1_1_1),
1094077365a9SGeert Uytterhoeven 
1095077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_31_28,	SD1_DAT3),
1096077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP8_31_28,	SD2_DAT7),
1097077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_31_28,	MSIOF1_SS2_G,		SEL_MSIOF1_6),
1098077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_31_28,	NFRB_N_B,		SEL_NDF_1),
1099077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_31_28,	TS_SDEN1_B,		SEL_TSIF1_1),
1100077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP8_31_28,	STP_ISEN_1_B,		SEL_SSP1_1_1),
1101077365a9SGeert Uytterhoeven 
1102077365a9SGeert Uytterhoeven 	/* IPSR9 */
1103077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_3_0,	SD2_CLK),
1104077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_3_0,	NFDATA8),
1105077365a9SGeert Uytterhoeven 
1106077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_7_4,	SD2_CMD),
1107077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_7_4,	NFDATA9),
1108077365a9SGeert Uytterhoeven 
1109077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_11_8,	SD2_DAT0),
1110077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_11_8,	NFDATA10),
1111077365a9SGeert Uytterhoeven 
1112077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_15_12,	SD2_DAT1),
1113077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_15_12,	NFDATA11),
1114077365a9SGeert Uytterhoeven 
1115077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_19_16,	SD2_DAT2),
1116077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_19_16,	NFDATA12),
1117077365a9SGeert Uytterhoeven 
1118077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_23_20,	SD2_DAT3),
1119077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_23_20,	NFDATA13),
1120077365a9SGeert Uytterhoeven 
1121077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_27_24,	SD2_DS),
1122077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_27_24,	NFALE),
1123077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_27_24,	SATA_DEVSLP_B),
1124077365a9SGeert Uytterhoeven 
1125077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_31_28,	SD3_CLK),
1126077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP9_31_28,	NFWE_N),
1127077365a9SGeert Uytterhoeven 
1128077365a9SGeert Uytterhoeven 	/* IPSR10 */
1129077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_3_0,	SD3_CMD),
1130077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_3_0,	NFRE_N),
1131077365a9SGeert Uytterhoeven 
1132077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_7_4,	SD3_DAT0),
1133077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_7_4,	NFDATA0),
1134077365a9SGeert Uytterhoeven 
1135077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_11_8,	SD3_DAT1),
1136077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_11_8,	NFDATA1),
1137077365a9SGeert Uytterhoeven 
1138077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_15_12,	SD3_DAT2),
1139077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_15_12,	NFDATA2),
1140077365a9SGeert Uytterhoeven 
1141077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_19_16,	SD3_DAT3),
1142077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_19_16,	NFDATA3),
1143077365a9SGeert Uytterhoeven 
1144077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_23_20,	SD3_DAT4),
1145077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP10_23_20,	SD2_CD_A,		SEL_SDHI2_0),
1146077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_23_20,	NFDATA4),
1147077365a9SGeert Uytterhoeven 
1148077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_27_24,	SD3_DAT5),
1149077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP10_27_24,	SD2_WP_A,		SEL_SDHI2_0),
1150077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_27_24,	NFDATA5),
1151077365a9SGeert Uytterhoeven 
1152077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_31_28,	SD3_DAT6),
1153077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_31_28,	SD3_CD),
1154077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP10_31_28,	NFDATA6),
1155077365a9SGeert Uytterhoeven 
1156077365a9SGeert Uytterhoeven 	/* IPSR11 */
1157077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_3_0,	SD3_DAT7),
1158077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_3_0,	SD3_WP),
1159077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_3_0,	NFDATA7),
1160077365a9SGeert Uytterhoeven 
1161077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_7_4,	SD3_DS),
1162077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_7_4,	NFCLE),
1163077365a9SGeert Uytterhoeven 
1164077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_11_8,	SD0_CD),
1165077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_11_8,	NFDATA14_A,		SEL_NDF_0),
1166077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_11_8,	SCL2_B,			SEL_I2C2_1),
1167077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_11_8,	SIM0_RST_A,		SEL_SIMCARD_0),
1168077365a9SGeert Uytterhoeven 
1169077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_15_12,	SD0_WP),
1170077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_15_12,	NFDATA15_A,		SEL_NDF_0),
1171077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_15_12,	SDA2_B,			SEL_I2C2_1),
1172077365a9SGeert Uytterhoeven 
1173077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_19_16,	SD1_CD,			I2C_SEL_0_0),
1174077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP11_19_16, NFRB_N_A,		I2C_SEL_0_0,	SEL_NDF_0),
1175077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP11_19_16, SIM0_CLK_B,		I2C_SEL_0_0,	SEL_SIMCARD_1),
1176077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS(IP11_19_16,	SCL0,			I2C_SEL_0_1),
1177077365a9SGeert Uytterhoeven 
1178077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_23_20,	SD1_WP,			I2C_SEL_0_0),
1179077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP11_23_20, NFCE_N_A,		I2C_SEL_0_0,	SEL_NDF_0),
1180077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS_MSEL(IP11_23_20, SIM0_D_B,		I2C_SEL_0_0,	SEL_SIMCARD_1),
1181077365a9SGeert Uytterhoeven 	PINMUX_IPSR_PHYS(IP11_23_20,	SDA0,			I2C_SEL_0_1),
1182077365a9SGeert Uytterhoeven 
1183077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_27_24,	SCK0),
1184077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	HSCK1_B,		SEL_HSCIF1_1),
1185077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	MSIOF1_SS2_B,		SEL_MSIOF1_1),
1186077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	AUDIO_CLKC_B,		SEL_ADGC_1),
1187077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	SDA2_A,			SEL_I2C2_0),
1188077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	SIM0_RST_B,		SEL_SIMCARD_1),
1189077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	STP_OPWM_0_C,		SEL_SSP1_0_2),
1190077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	RIF0_CLK_B,		SEL_DRIF0_1),
1191077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_27_24,	ADICHS2),
1192077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_27_24,	SCK5_B,			SEL_SCIF5_1),
1193077365a9SGeert Uytterhoeven 
1194077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP11_31_28,	RX0),
1195077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_31_28,	HRX1_B,			SEL_HSCIF1_1),
1196077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_31_28,	TS_SCK0_C,		SEL_TSIF0_2),
1197077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_31_28,	STP_ISCLK_0_C,		SEL_SSP1_0_2),
1198077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP11_31_28,	RIF0_D0_B,		SEL_DRIF0_1),
1199077365a9SGeert Uytterhoeven 
1200077365a9SGeert Uytterhoeven 	/* IPSR12 */
1201077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_3_0,	TX0),
1202077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_3_0,	HTX1_B,			SEL_HSCIF1_1),
1203077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_3_0,	TS_SPSYNC0_C,		SEL_TSIF0_2),
1204077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_3_0,	STP_ISSYNC_0_C,		SEL_SSP1_0_2),
1205077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_3_0,	RIF0_D1_B,		SEL_DRIF0_1),
1206077365a9SGeert Uytterhoeven 
1207077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_7_4,	CTS0_N),
1208077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_7_4,	HCTS1_N_B,		SEL_HSCIF1_1),
1209077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_7_4,	MSIOF1_SYNC_B,		SEL_MSIOF1_1),
1210077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_7_4,	TS_SPSYNC1_C,		SEL_TSIF1_2),
1211077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_7_4,	STP_ISSYNC_1_C,		SEL_SSP1_1_2),
1212077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_7_4,	RIF1_SYNC_B,		SEL_DRIF1_1),
1213077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_7_4,	AUDIO_CLKOUT_C),
1214077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_7_4,	ADICS_SAMP),
1215077365a9SGeert Uytterhoeven 
1216077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_11_8,	RTS0_N),
1217077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_11_8,	HRTS1_N_B,		SEL_HSCIF1_1),
1218077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_11_8,	MSIOF1_SS1_B,		SEL_MSIOF1_1),
1219077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_11_8,	AUDIO_CLKA_B,		SEL_ADGA_1),
1220077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_11_8,	SCL2_A,			SEL_I2C2_0),
1221077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_11_8,	STP_IVCXO27_1_C,	SEL_SSP1_1_2),
1222077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_11_8,	RIF0_SYNC_B,		SEL_DRIF0_1),
1223077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_11_8,	ADICHS1),
1224077365a9SGeert Uytterhoeven 
1225077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_15_12,	RX1_A,			SEL_SCIF1_0),
1226077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_15_12,	HRX1_A,			SEL_HSCIF1_0),
1227077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_15_12,	TS_SDAT0_C,		SEL_TSIF0_2),
1228077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_15_12,	STP_ISD_0_C,		SEL_SSP1_0_2),
1229077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_15_12,	RIF1_CLK_C,		SEL_DRIF1_2),
1230077365a9SGeert Uytterhoeven 
1231077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_19_16,	TX1_A,			SEL_SCIF1_0),
1232077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_19_16,	HTX1_A,			SEL_HSCIF1_0),
1233077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_19_16,	TS_SDEN0_C,		SEL_TSIF0_2),
1234077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_19_16,	STP_ISEN_0_C,		SEL_SSP1_0_2),
1235077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_19_16,	RIF1_D0_C,		SEL_DRIF1_2),
1236077365a9SGeert Uytterhoeven 
1237077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_23_20,	CTS1_N),
1238077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_23_20,	HCTS1_N_A,		SEL_HSCIF1_0),
1239077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_23_20,	MSIOF1_RXD_B,		SEL_MSIOF1_1),
1240077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_23_20,	TS_SDEN1_C,		SEL_TSIF1_2),
1241077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_23_20,	STP_ISEN_1_C,		SEL_SSP1_1_2),
1242077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_23_20,	RIF1_D0_B,		SEL_DRIF1_1),
1243077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_23_20,	ADIDATA),
1244077365a9SGeert Uytterhoeven 
1245077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_27_24,	RTS1_N),
1246077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_27_24,	HRTS1_N_A,		SEL_HSCIF1_0),
1247077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_27_24,	MSIOF1_TXD_B,		SEL_MSIOF1_1),
1248077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_27_24,	TS_SDAT1_C,		SEL_TSIF1_2),
1249077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_27_24,	STP_ISD_1_C,		SEL_SSP1_1_2),
1250077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_27_24,	RIF1_D1_B,		SEL_DRIF1_1),
1251077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_27_24,	ADICHS0),
1252077365a9SGeert Uytterhoeven 
1253077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_31_28,	SCK2),
1254077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_31_28,	SCIF_CLK_B,		SEL_SCIF_1),
1255077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_31_28,	MSIOF1_SCK_B,		SEL_MSIOF1_1),
1256077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_31_28,	TS_SCK1_C,		SEL_TSIF1_2),
1257077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_31_28,	STP_ISCLK_1_C,		SEL_SSP1_1_2),
1258077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP12_31_28,	RIF1_CLK_B,		SEL_DRIF1_1),
1259077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP12_31_28,	ADICLK),
1260077365a9SGeert Uytterhoeven 
1261077365a9SGeert Uytterhoeven 	/* IPSR13 */
1262077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_3_0,	TX2_A,			SEL_SCIF2_0),
1263077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_3_0,	SD2_CD_B,		SEL_SDHI2_1),
1264077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_3_0,	SCL1_A,			SEL_I2C1_0),
1265077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_3_0,	FMCLK_A,		SEL_FM_0),
1266077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_3_0,	RIF1_D1_C,		SEL_DRIF1_2),
1267077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_3_0,	FSO_CFE_0_N),
1268077365a9SGeert Uytterhoeven 
1269077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_7_4,	RX2_A,			SEL_SCIF2_0),
1270077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_7_4,	SD2_WP_B,		SEL_SDHI2_1),
1271077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_7_4,	SDA1_A,			SEL_I2C1_0),
1272077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_7_4,	FMIN_A,			SEL_FM_0),
1273077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_7_4,	RIF1_SYNC_C,		SEL_DRIF1_2),
1274077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_7_4,	FSO_CFE_1_N),
1275077365a9SGeert Uytterhoeven 
1276077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_11_8,	HSCK0),
1277077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_11_8,	MSIOF1_SCK_D,		SEL_MSIOF1_3),
1278077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_11_8,	AUDIO_CLKB_A,		SEL_ADGB_0),
1279077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_11_8,	SSI_SDATA1_B,		SEL_SSI1_1),
1280077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_11_8,	TS_SCK0_D,		SEL_TSIF0_3),
1281077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_11_8,	STP_ISCLK_0_D,		SEL_SSP1_0_3),
1282077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_11_8,	RIF0_CLK_C,		SEL_DRIF0_2),
1283077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_11_8,	RX5_B,			SEL_SCIF5_1),
1284077365a9SGeert Uytterhoeven 
1285077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_15_12,	HRX0),
1286077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_15_12,	MSIOF1_RXD_D,		SEL_MSIOF1_3),
1287077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_15_12,	SSI_SDATA2_B,		SEL_SSI2_1),
1288077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_15_12,	TS_SDEN0_D,		SEL_TSIF0_3),
1289077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_15_12,	STP_ISEN_0_D,		SEL_SSP1_0_3),
1290077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_15_12,	RIF0_D0_C,		SEL_DRIF0_2),
1291077365a9SGeert Uytterhoeven 
1292077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_19_16,	HTX0),
1293077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_19_16,	MSIOF1_TXD_D,		SEL_MSIOF1_3),
1294077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_19_16,	SSI_SDATA9_B,		SEL_SSI9_1),
1295077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_19_16,	TS_SDAT0_D,		SEL_TSIF0_3),
1296077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_19_16,	STP_ISD_0_D,		SEL_SSP1_0_3),
1297077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_19_16,	RIF0_D1_C,		SEL_DRIF0_2),
1298077365a9SGeert Uytterhoeven 
1299077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_23_20,	HCTS0_N),
1300077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_23_20,	RX2_B,			SEL_SCIF2_1),
1301077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_23_20,	MSIOF1_SYNC_D,		SEL_MSIOF1_3),
1302077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_23_20,	SSI_SCK9_A,		SEL_SSI9_0),
1303077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_23_20,	TS_SPSYNC0_D,		SEL_TSIF0_3),
1304077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_23_20,	STP_ISSYNC_0_D,		SEL_SSP1_0_3),
1305077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_23_20,	RIF0_SYNC_C,		SEL_DRIF0_2),
1306077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_23_20,	AUDIO_CLKOUT1_A),
1307077365a9SGeert Uytterhoeven 
1308077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_27_24,	HRTS0_N),
1309077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_27_24,	TX2_B,			SEL_SCIF2_1),
1310077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_27_24,	MSIOF1_SS1_D,		SEL_MSIOF1_3),
1311077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_27_24,	SSI_WS9_A,		SEL_SSI9_0),
1312077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_27_24,	STP_IVCXO27_0_D,	SEL_SSP1_0_3),
1313077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_27_24,	BPFCLK_A,		SEL_FM_0),
1314077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_27_24,	AUDIO_CLKOUT2_A),
1315077365a9SGeert Uytterhoeven 
1316077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_31_28,	MSIOF0_SYNC),
1317077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP13_31_28,	AUDIO_CLKOUT_A),
1318077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_31_28,	TX5_B,			SEL_SCIF5_1),
1319077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP13_31_28,	BPFCLK_D,		SEL_FM_3),
1320077365a9SGeert Uytterhoeven 
1321077365a9SGeert Uytterhoeven 	/* IPSR14 */
1322077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_3_0,	MSIOF0_SS1),
1323077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_3_0,	RX5_A,			SEL_SCIF5_0),
1324077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_3_0,	NFWP_N_A,		SEL_NDF_0),
1325077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_3_0,	AUDIO_CLKA_C,		SEL_ADGA_2),
1326077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_3_0,	SSI_SCK2_A,		SEL_SSI2_0),
1327077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_3_0,	STP_IVCXO27_0_C,	SEL_SSP1_0_2),
1328077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_3_0,	AUDIO_CLKOUT3_A),
1329077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_3_0,	TCLK1_B,		SEL_TIMER_TMU_1),
1330077365a9SGeert Uytterhoeven 
1331077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_7_4,	MSIOF0_SS2),
1332077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_7_4,	TX5_A,			SEL_SCIF5_0),
1333077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_7_4,	MSIOF1_SS2_D,		SEL_MSIOF1_3),
1334077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_7_4,	AUDIO_CLKC_A,		SEL_ADGC_0),
1335077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_7_4,	SSI_WS2_A,		SEL_SSI2_0),
1336077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_7_4,	STP_OPWM_0_D,		SEL_SSP1_0_3),
1337077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_7_4,	AUDIO_CLKOUT_D),
1338077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_7_4,	SPEEDIN_B,		SEL_SPEED_PULSE_1),
1339077365a9SGeert Uytterhoeven 
1340077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_11_8,	MLB_CLK),
1341077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_11_8,	MSIOF1_SCK_F,		SEL_MSIOF1_5),
1342077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_11_8,	SCL1_B,			SEL_I2C1_1),
1343077365a9SGeert Uytterhoeven 
1344077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_15_12,	MLB_SIG),
1345077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_15_12,	RX1_B,			SEL_SCIF1_1),
1346077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_15_12,	MSIOF1_SYNC_F,		SEL_MSIOF1_5),
1347077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_15_12,	SDA1_B,			SEL_I2C1_1),
1348077365a9SGeert Uytterhoeven 
1349077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_19_16,	MLB_DAT),
1350077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_19_16,	TX1_B,			SEL_SCIF1_1),
1351077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_19_16,	MSIOF1_RXD_F,		SEL_MSIOF1_5),
1352077365a9SGeert Uytterhoeven 
1353077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_23_20,	SSI_SCK01239),
1354077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_23_20,	MSIOF1_TXD_F,		SEL_MSIOF1_5),
1355077365a9SGeert Uytterhoeven 
1356077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_27_24,	SSI_WS01239),
1357077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_27_24,	MSIOF1_SS1_F,		SEL_MSIOF1_5),
1358077365a9SGeert Uytterhoeven 
1359077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP14_31_28,	SSI_SDATA0),
1360077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP14_31_28,	MSIOF1_SS2_F,		SEL_MSIOF1_5),
1361077365a9SGeert Uytterhoeven 
1362077365a9SGeert Uytterhoeven 	/* IPSR15 */
1363077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_3_0,	SSI_SDATA1_A,		SEL_SSI1_0),
1364077365a9SGeert Uytterhoeven 
1365077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_7_4,	SSI_SDATA2_A,		SEL_SSI2_0),
1366077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_7_4,	SSI_SCK1_B,		SEL_SSI1_1),
1367077365a9SGeert Uytterhoeven 
1368077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP15_11_8,	SSI_SCK349),
1369077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_11_8,	MSIOF1_SS1_A,		SEL_MSIOF1_0),
1370077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_11_8,	STP_OPWM_0_A,		SEL_SSP1_0_0),
1371077365a9SGeert Uytterhoeven 
1372077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP15_15_12,	SSI_WS349),
1373077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_15_12,	HCTS2_N_A,		SEL_HSCIF2_0),
1374077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_15_12,	MSIOF1_SS2_A,		SEL_MSIOF1_0),
1375077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_15_12,	STP_IVCXO27_0_A,	SEL_SSP1_0_0),
1376077365a9SGeert Uytterhoeven 
1377077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP15_19_16,	SSI_SDATA3),
1378077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_19_16,	HRTS2_N_A,		SEL_HSCIF2_0),
1379077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_19_16,	MSIOF1_TXD_A,		SEL_MSIOF1_0),
1380077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_19_16,	TS_SCK0_A,		SEL_TSIF0_0),
1381077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_19_16,	STP_ISCLK_0_A,		SEL_SSP1_0_0),
1382077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_19_16,	RIF0_D1_A,		SEL_DRIF0_0),
1383077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_19_16,	RIF2_D0_A,		SEL_DRIF2_0),
1384077365a9SGeert Uytterhoeven 
1385077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP15_23_20,	SSI_SCK4),
1386077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_23_20,	HRX2_A,			SEL_HSCIF2_0),
1387077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_23_20,	MSIOF1_SCK_A,		SEL_MSIOF1_0),
1388077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_23_20,	TS_SDAT0_A,		SEL_TSIF0_0),
1389077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_23_20,	STP_ISD_0_A,		SEL_SSP1_0_0),
1390077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_23_20,	RIF0_CLK_A,		SEL_DRIF0_0),
1391077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_23_20,	RIF2_CLK_A,		SEL_DRIF2_0),
1392077365a9SGeert Uytterhoeven 
1393077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP15_27_24,	SSI_WS4),
1394077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_27_24,	HTX2_A,			SEL_HSCIF2_0),
1395077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_27_24,	MSIOF1_SYNC_A,		SEL_MSIOF1_0),
1396077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_27_24,	TS_SDEN0_A,		SEL_TSIF0_0),
1397077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_27_24,	STP_ISEN_0_A,		SEL_SSP1_0_0),
1398077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_27_24,	RIF0_SYNC_A,		SEL_DRIF0_0),
1399077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_27_24,	RIF2_SYNC_A,		SEL_DRIF2_0),
1400077365a9SGeert Uytterhoeven 
1401077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP15_31_28,	SSI_SDATA4),
1402077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_31_28,	HSCK2_A,		SEL_HSCIF2_0),
1403077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_31_28,	MSIOF1_RXD_A,		SEL_MSIOF1_0),
1404077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_31_28,	TS_SPSYNC0_A,		SEL_TSIF0_0),
1405077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_31_28,	STP_ISSYNC_0_A,		SEL_SSP1_0_0),
1406077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_31_28,	RIF0_D0_A,		SEL_DRIF0_0),
1407077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP15_31_28,	RIF2_D1_A,		SEL_DRIF2_0),
1408077365a9SGeert Uytterhoeven 
1409077365a9SGeert Uytterhoeven 	/* IPSR16 */
1410077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_3_0,	SSI_SCK6),
1411077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_3_0,	SIM0_RST_D,		SEL_SIMCARD_3),
1412077365a9SGeert Uytterhoeven 
1413077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_7_4,	SSI_WS6),
1414077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_7_4,	SIM0_D_D,		SEL_SIMCARD_3),
1415077365a9SGeert Uytterhoeven 
1416077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_11_8,	SSI_SDATA6),
1417077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_11_8,	SIM0_CLK_D,		SEL_SIMCARD_3),
1418077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_11_8,	SATA_DEVSLP_A),
1419077365a9SGeert Uytterhoeven 
1420077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_15_12,	SSI_SCK78),
1421077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_15_12,	HRX2_B,			SEL_HSCIF2_1),
1422077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_15_12,	MSIOF1_SCK_C,		SEL_MSIOF1_2),
1423077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_15_12,	TS_SCK1_A,		SEL_TSIF1_0),
1424077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_15_12,	STP_ISCLK_1_A,		SEL_SSP1_1_0),
1425077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_15_12,	RIF1_CLK_A,		SEL_DRIF1_0),
1426077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_15_12,	RIF3_CLK_A,		SEL_DRIF3_0),
1427077365a9SGeert Uytterhoeven 
1428077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_19_16,	SSI_WS78),
1429077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_19_16,	HTX2_B,			SEL_HSCIF2_1),
1430077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_19_16,	MSIOF1_SYNC_C,		SEL_MSIOF1_2),
1431077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_19_16,	TS_SDAT1_A,		SEL_TSIF1_0),
1432077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_19_16,	STP_ISD_1_A,		SEL_SSP1_1_0),
1433077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_19_16,	RIF1_SYNC_A,		SEL_DRIF1_0),
1434077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_19_16,	RIF3_SYNC_A,		SEL_DRIF3_0),
1435077365a9SGeert Uytterhoeven 
1436077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_23_20,	SSI_SDATA7),
1437077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_23_20,	HCTS2_N_B,		SEL_HSCIF2_1),
1438077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_23_20,	MSIOF1_RXD_C,		SEL_MSIOF1_2),
1439077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_23_20,	TS_SDEN1_A,		SEL_TSIF1_0),
1440077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_23_20,	STP_ISEN_1_A,		SEL_SSP1_1_0),
1441077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_23_20,	RIF1_D0_A,		SEL_DRIF1_0),
1442077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_23_20,	RIF3_D0_A,		SEL_DRIF3_0),
1443077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_23_20,	TCLK2_A,		SEL_TIMER_TMU2_0),
1444077365a9SGeert Uytterhoeven 
1445077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_27_24,	SSI_SDATA8),
1446077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_27_24,	HRTS2_N_B,		SEL_HSCIF2_1),
1447077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_27_24,	MSIOF1_TXD_C,		SEL_MSIOF1_2),
1448077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_27_24,	TS_SPSYNC1_A,		SEL_TSIF1_0),
1449077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_27_24,	STP_ISSYNC_1_A,		SEL_SSP1_1_0),
1450077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_27_24,	RIF1_D1_A,		SEL_DRIF1_0),
1451077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_27_24,	RIF3_D1_A,		SEL_DRIF3_0),
1452077365a9SGeert Uytterhoeven 
1453077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_31_28,	SSI_SDATA9_A,		SEL_SSI9_0),
1454077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_31_28,	HSCK2_B,		SEL_HSCIF2_1),
1455077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_31_28,	MSIOF1_SS1_C,		SEL_MSIOF1_2),
1456077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_31_28,	HSCK1_A,		SEL_HSCIF1_0),
1457077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_31_28,	SSI_WS1_B,		SEL_SSI1_1),
1458077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP16_31_28,	SCK1),
1459077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_31_28,	STP_IVCXO27_1_A,	SEL_SSP1_1_0),
1460077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP16_31_28,	SCK5_A,			SEL_SCIF5_0),
1461077365a9SGeert Uytterhoeven 
1462077365a9SGeert Uytterhoeven 	/* IPSR17 */
1463077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_3_0,	AUDIO_CLKA_A,		SEL_ADGA_0),
1464077365a9SGeert Uytterhoeven 
1465077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_7_4,	AUDIO_CLKB_B,		SEL_ADGB_1),
1466077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_7_4,	SCIF_CLK_A,		SEL_SCIF_0),
1467077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_7_4,	STP_IVCXO27_1_D,	SEL_SSP1_1_3),
1468077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_7_4,	REMOCON_A,		SEL_REMOCON_0),
1469077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_7_4,	TCLK1_A,		SEL_TIMER_TMU_0),
1470077365a9SGeert Uytterhoeven 
1471077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_11_8,	USB0_PWEN),
1472077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_11_8,	SIM0_RST_C,		SEL_SIMCARD_2),
1473077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_11_8,	TS_SCK1_D,		SEL_TSIF1_3),
1474077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_11_8,	STP_ISCLK_1_D,		SEL_SSP1_1_3),
1475077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_11_8,	BPFCLK_B,		SEL_FM_1),
1476077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_11_8,	RIF3_CLK_B,		SEL_DRIF3_1),
1477077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_11_8,	HSCK2_C,		SEL_HSCIF2_2),
1478077365a9SGeert Uytterhoeven 
1479077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_15_12,	USB0_OVC),
1480077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_15_12,	SIM0_D_C,		SEL_SIMCARD_2),
1481077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_15_12,	TS_SDAT1_D,		SEL_TSIF1_3),
1482077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_15_12,	STP_ISD_1_D,		SEL_SSP1_1_3),
1483077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_15_12,	RIF3_SYNC_B,		SEL_DRIF3_1),
1484077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_15_12,	HRX2_C,			SEL_HSCIF2_2),
1485077365a9SGeert Uytterhoeven 
1486077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_19_16,	USB1_PWEN),
1487077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	SIM0_CLK_C,		SEL_SIMCARD_2),
1488077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	SSI_SCK1_A,		SEL_SSI1_0),
1489077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	TS_SCK0_E,		SEL_TSIF0_4),
1490077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	STP_ISCLK_0_E,		SEL_SSP1_0_4),
1491077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	FMCLK_B,		SEL_FM_1),
1492077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	RIF2_CLK_B,		SEL_DRIF2_1),
1493077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	SPEEDIN_A,		SEL_SPEED_PULSE_0),
1494077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_19_16,	HTX2_C,			SEL_HSCIF2_2),
1495077365a9SGeert Uytterhoeven 
1496077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_23_20,	USB1_OVC),
1497077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	MSIOF1_SS2_C,		SEL_MSIOF1_2),
1498077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	SSI_WS1_A,		SEL_SSI1_0),
1499077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	TS_SDAT0_E,		SEL_TSIF0_4),
1500077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	STP_ISD_0_E,		SEL_SSP1_0_4),
1501077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	FMIN_B,			SEL_FM_1),
1502077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	RIF2_SYNC_B,		SEL_DRIF2_1),
1503077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	REMOCON_B,		SEL_REMOCON_1),
1504077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_23_20,	HCTS2_N_C,		SEL_HSCIF2_2),
1505077365a9SGeert Uytterhoeven 
1506077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_27_24,	USB30_PWEN),
1507077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_27_24,	AUDIO_CLKOUT_B),
1508077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	SSI_SCK2_B,		SEL_SSI2_1),
1509077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	TS_SDEN1_D,		SEL_TSIF1_3),
1510077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	STP_ISEN_1_D,		SEL_SSP1_1_3),
1511077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	STP_OPWM_0_E,		SEL_SSP1_0_4),
1512077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	RIF3_D0_B,		SEL_DRIF3_1),
1513077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	TCLK2_B,		SEL_TIMER_TMU2_1),
1514077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_27_24,	TPU0TO0),
1515077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	BPFCLK_C,		SEL_FM_2),
1516077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_27_24,	HRTS2_N_C,		SEL_HSCIF2_2),
1517077365a9SGeert Uytterhoeven 
1518077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_31_28,	USB30_OVC),
1519077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_31_28,	AUDIO_CLKOUT1_B),
1520077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_31_28,	SSI_WS2_B,		SEL_SSI2_1),
1521077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_31_28,	TS_SPSYNC1_D,		SEL_TSIF1_3),
1522077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_31_28,	STP_ISSYNC_1_D,		SEL_SSP1_1_3),
1523077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_31_28,	STP_IVCXO27_0_E,	SEL_SSP1_0_4),
1524077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP17_31_28,	RIF3_D1_B,		SEL_DRIF3_1),
1525077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_31_28,	FSO_TOE_N),
1526077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP17_31_28,	TPU0TO1),
1527077365a9SGeert Uytterhoeven 
1528077365a9SGeert Uytterhoeven 	/* IPSR18 */
1529077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP18_3_0,	GP6_30),
1530077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP18_3_0,	AUDIO_CLKOUT2_B),
1531077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_3_0,	SSI_SCK9_B,		SEL_SSI9_1),
1532077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_3_0,	TS_SDEN0_E,		SEL_TSIF0_4),
1533077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_3_0,	STP_ISEN_0_E,		SEL_SSP1_0_4),
1534077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_3_0,	RIF2_D0_B,		SEL_DRIF2_1),
1535077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP18_3_0,	TPU0TO2),
1536077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_3_0,	FMCLK_C,		SEL_FM_2),
1537077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_3_0,	FMCLK_D,		SEL_FM_3),
1538077365a9SGeert Uytterhoeven 
1539077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP18_7_4,	GP6_31),
1540077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP18_7_4,	AUDIO_CLKOUT3_B),
1541077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_7_4,	SSI_WS9_B,		SEL_SSI9_1),
1542077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_7_4,	TS_SPSYNC0_E,		SEL_TSIF0_4),
1543077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_7_4,	STP_ISSYNC_0_E,		SEL_SSP1_0_4),
1544077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_7_4,	RIF2_D1_B,		SEL_DRIF2_1),
1545077365a9SGeert Uytterhoeven 	PINMUX_IPSR_GPSR(IP18_7_4,	TPU0TO3),
1546077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_7_4,	FMIN_C,			SEL_FM_2),
1547077365a9SGeert Uytterhoeven 	PINMUX_IPSR_MSEL(IP18_7_4,	FMIN_D,			SEL_FM_3),
1548077365a9SGeert Uytterhoeven 
1549077365a9SGeert Uytterhoeven /*
1550077365a9SGeert Uytterhoeven  * Static pins can not be muxed between different functions but
1551077365a9SGeert Uytterhoeven  * still need mark entries in the pinmux list. Add each static
1552077365a9SGeert Uytterhoeven  * pin to the list without an associated function. The sh-pfc
1553077365a9SGeert Uytterhoeven  * core will do the right thing and skip trying to mux the pin
1554077365a9SGeert Uytterhoeven  * while still applying configuration to it.
1555077365a9SGeert Uytterhoeven  */
1556077365a9SGeert Uytterhoeven #define FM(x)	PINMUX_DATA(x##_MARK, 0),
1557077365a9SGeert Uytterhoeven 	PINMUX_STATIC
1558077365a9SGeert Uytterhoeven #undef FM
1559077365a9SGeert Uytterhoeven };
1560077365a9SGeert Uytterhoeven 
1561077365a9SGeert Uytterhoeven /*
1562077365a9SGeert Uytterhoeven  * Pins not associated with a GPIO port.
1563077365a9SGeert Uytterhoeven  */
1564077365a9SGeert Uytterhoeven enum {
1565077365a9SGeert Uytterhoeven 	GP_ASSIGN_LAST(),
1566077365a9SGeert Uytterhoeven 	NOGP_ALL(),
1567077365a9SGeert Uytterhoeven };
1568077365a9SGeert Uytterhoeven 
1569077365a9SGeert Uytterhoeven static const struct sh_pfc_pin pinmux_pins[] = {
1570077365a9SGeert Uytterhoeven 	PINMUX_GPIO_GP_ALL(),
1571077365a9SGeert Uytterhoeven 	PINMUX_NOGP_ALL(),
1572077365a9SGeert Uytterhoeven };
1573077365a9SGeert Uytterhoeven 
1574077365a9SGeert Uytterhoeven /* - AUDIO CLOCK ------------------------------------------------------------ */
1575077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_a_pins[] = {
1576077365a9SGeert Uytterhoeven 	/* CLK A */
1577077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 22),
1578077365a9SGeert Uytterhoeven };
1579077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_a_mux[] = {
1580077365a9SGeert Uytterhoeven 	AUDIO_CLKA_A_MARK,
1581077365a9SGeert Uytterhoeven };
1582077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_b_pins[] = {
1583077365a9SGeert Uytterhoeven 	/* CLK A */
1584077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 4),
1585077365a9SGeert Uytterhoeven };
1586077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_b_mux[] = {
1587077365a9SGeert Uytterhoeven 	AUDIO_CLKA_B_MARK,
1588077365a9SGeert Uytterhoeven };
1589077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_c_pins[] = {
1590077365a9SGeert Uytterhoeven 	/* CLK A */
1591077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 19),
1592077365a9SGeert Uytterhoeven };
1593077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_c_mux[] = {
1594077365a9SGeert Uytterhoeven 	AUDIO_CLKA_C_MARK,
1595077365a9SGeert Uytterhoeven };
1596077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_a_pins[] = {
1597077365a9SGeert Uytterhoeven 	/* CLK B */
1598077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 12),
1599077365a9SGeert Uytterhoeven };
1600077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_a_mux[] = {
1601077365a9SGeert Uytterhoeven 	AUDIO_CLKB_A_MARK,
1602077365a9SGeert Uytterhoeven };
1603077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_b_pins[] = {
1604077365a9SGeert Uytterhoeven 	/* CLK B */
1605077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 23),
1606077365a9SGeert Uytterhoeven };
1607077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_b_mux[] = {
1608077365a9SGeert Uytterhoeven 	AUDIO_CLKB_B_MARK,
1609077365a9SGeert Uytterhoeven };
1610077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_a_pins[] = {
1611077365a9SGeert Uytterhoeven 	/* CLK C */
1612077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 21),
1613077365a9SGeert Uytterhoeven };
1614077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_a_mux[] = {
1615077365a9SGeert Uytterhoeven 	AUDIO_CLKC_A_MARK,
1616077365a9SGeert Uytterhoeven };
1617077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_b_pins[] = {
1618077365a9SGeert Uytterhoeven 	/* CLK C */
1619077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 0),
1620077365a9SGeert Uytterhoeven };
1621077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_b_mux[] = {
1622077365a9SGeert Uytterhoeven 	AUDIO_CLKC_B_MARK,
1623077365a9SGeert Uytterhoeven };
1624077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_a_pins[] = {
1625077365a9SGeert Uytterhoeven 	/* CLKOUT */
1626077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 18),
1627077365a9SGeert Uytterhoeven };
1628077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_a_mux[] = {
1629077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT_A_MARK,
1630077365a9SGeert Uytterhoeven };
1631077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_b_pins[] = {
1632077365a9SGeert Uytterhoeven 	/* CLKOUT */
1633077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 28),
1634077365a9SGeert Uytterhoeven };
1635077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_b_mux[] = {
1636077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT_B_MARK,
1637077365a9SGeert Uytterhoeven };
1638077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_c_pins[] = {
1639077365a9SGeert Uytterhoeven 	/* CLKOUT */
1640077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 3),
1641077365a9SGeert Uytterhoeven };
1642077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_c_mux[] = {
1643077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT_C_MARK,
1644077365a9SGeert Uytterhoeven };
1645077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_d_pins[] = {
1646077365a9SGeert Uytterhoeven 	/* CLKOUT */
1647077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 21),
1648077365a9SGeert Uytterhoeven };
1649077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_d_mux[] = {
1650077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT_D_MARK,
1651077365a9SGeert Uytterhoeven };
1652077365a9SGeert Uytterhoeven static const unsigned int audio_clkout1_a_pins[] = {
1653077365a9SGeert Uytterhoeven 	/* CLKOUT1 */
1654077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 15),
1655077365a9SGeert Uytterhoeven };
1656077365a9SGeert Uytterhoeven static const unsigned int audio_clkout1_a_mux[] = {
1657077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT1_A_MARK,
1658077365a9SGeert Uytterhoeven };
1659077365a9SGeert Uytterhoeven static const unsigned int audio_clkout1_b_pins[] = {
1660077365a9SGeert Uytterhoeven 	/* CLKOUT1 */
1661077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 29),
1662077365a9SGeert Uytterhoeven };
1663077365a9SGeert Uytterhoeven static const unsigned int audio_clkout1_b_mux[] = {
1664077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT1_B_MARK,
1665077365a9SGeert Uytterhoeven };
1666077365a9SGeert Uytterhoeven static const unsigned int audio_clkout2_a_pins[] = {
1667077365a9SGeert Uytterhoeven 	/* CLKOUT2 */
1668077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 16),
1669077365a9SGeert Uytterhoeven };
1670077365a9SGeert Uytterhoeven static const unsigned int audio_clkout2_a_mux[] = {
1671077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT2_A_MARK,
1672077365a9SGeert Uytterhoeven };
1673077365a9SGeert Uytterhoeven static const unsigned int audio_clkout2_b_pins[] = {
1674077365a9SGeert Uytterhoeven 	/* CLKOUT2 */
1675077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 30),
1676077365a9SGeert Uytterhoeven };
1677077365a9SGeert Uytterhoeven static const unsigned int audio_clkout2_b_mux[] = {
1678077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT2_B_MARK,
1679077365a9SGeert Uytterhoeven };
1680077365a9SGeert Uytterhoeven 
1681077365a9SGeert Uytterhoeven static const unsigned int audio_clkout3_a_pins[] = {
1682077365a9SGeert Uytterhoeven 	/* CLKOUT3 */
1683077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 19),
1684077365a9SGeert Uytterhoeven };
1685077365a9SGeert Uytterhoeven static const unsigned int audio_clkout3_a_mux[] = {
1686077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT3_A_MARK,
1687077365a9SGeert Uytterhoeven };
1688077365a9SGeert Uytterhoeven static const unsigned int audio_clkout3_b_pins[] = {
1689077365a9SGeert Uytterhoeven 	/* CLKOUT3 */
1690077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 31),
1691077365a9SGeert Uytterhoeven };
1692077365a9SGeert Uytterhoeven static const unsigned int audio_clkout3_b_mux[] = {
1693077365a9SGeert Uytterhoeven 	AUDIO_CLKOUT3_B_MARK,
1694077365a9SGeert Uytterhoeven };
1695077365a9SGeert Uytterhoeven 
1696077365a9SGeert Uytterhoeven /* - EtherAVB --------------------------------------------------------------- */
1697077365a9SGeert Uytterhoeven static const unsigned int avb_link_pins[] = {
1698077365a9SGeert Uytterhoeven 	/* AVB_LINK */
1699077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 12),
1700077365a9SGeert Uytterhoeven };
1701077365a9SGeert Uytterhoeven static const unsigned int avb_link_mux[] = {
1702077365a9SGeert Uytterhoeven 	AVB_LINK_MARK,
1703077365a9SGeert Uytterhoeven };
1704077365a9SGeert Uytterhoeven static const unsigned int avb_magic_pins[] = {
1705077365a9SGeert Uytterhoeven 	/* AVB_MAGIC_ */
1706077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 10),
1707077365a9SGeert Uytterhoeven };
1708077365a9SGeert Uytterhoeven static const unsigned int avb_magic_mux[] = {
1709077365a9SGeert Uytterhoeven 	AVB_MAGIC_MARK,
1710077365a9SGeert Uytterhoeven };
1711077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_pins[] = {
1712077365a9SGeert Uytterhoeven 	/* AVB_PHY_INT */
1713077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 11),
1714077365a9SGeert Uytterhoeven };
1715077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_mux[] = {
1716077365a9SGeert Uytterhoeven 	AVB_PHY_INT_MARK,
1717077365a9SGeert Uytterhoeven };
1718077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_pins[] = {
1719077365a9SGeert Uytterhoeven 	/* AVB_MDC, AVB_MDIO */
1720077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 9), PIN_AVB_MDIO,
1721077365a9SGeert Uytterhoeven };
1722077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_mux[] = {
1723077365a9SGeert Uytterhoeven 	AVB_MDC_MARK, AVB_MDIO_MARK,
1724077365a9SGeert Uytterhoeven };
1725077365a9SGeert Uytterhoeven static const unsigned int avb_mii_pins[] = {
1726077365a9SGeert Uytterhoeven 	/*
1727077365a9SGeert Uytterhoeven 	 * AVB_TX_CTL, AVB_TXC, AVB_TD0,
1728077365a9SGeert Uytterhoeven 	 * AVB_TD1, AVB_TD2, AVB_TD3,
1729077365a9SGeert Uytterhoeven 	 * AVB_RX_CTL, AVB_RXC, AVB_RD0,
1730077365a9SGeert Uytterhoeven 	 * AVB_RD1, AVB_RD2, AVB_RD3,
1731077365a9SGeert Uytterhoeven 	 * AVB_TXCREFCLK
1732077365a9SGeert Uytterhoeven 	 */
1733077365a9SGeert Uytterhoeven 	PIN_AVB_TX_CTL, PIN_AVB_TXC, PIN_AVB_TD0,
1734077365a9SGeert Uytterhoeven 	PIN_AVB_TD1, PIN_AVB_TD2, PIN_AVB_TD3,
1735077365a9SGeert Uytterhoeven 	PIN_AVB_RX_CTL, PIN_AVB_RXC, PIN_AVB_RD0,
1736077365a9SGeert Uytterhoeven 	PIN_AVB_RD1, PIN_AVB_RD2, PIN_AVB_RD3,
1737077365a9SGeert Uytterhoeven 	PIN_AVB_TXCREFCLK,
1738077365a9SGeert Uytterhoeven };
1739077365a9SGeert Uytterhoeven static const unsigned int avb_mii_mux[] = {
1740077365a9SGeert Uytterhoeven 	AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
1741077365a9SGeert Uytterhoeven 	AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
1742077365a9SGeert Uytterhoeven 	AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
1743077365a9SGeert Uytterhoeven 	AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
1744077365a9SGeert Uytterhoeven 	AVB_TXCREFCLK_MARK,
1745077365a9SGeert Uytterhoeven };
1746077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_pps_pins[] = {
1747077365a9SGeert Uytterhoeven 	/* AVB_AVTP_PPS */
1748077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 6),
1749077365a9SGeert Uytterhoeven };
1750077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_pps_mux[] = {
1751077365a9SGeert Uytterhoeven 	AVB_AVTP_PPS_MARK,
1752077365a9SGeert Uytterhoeven };
1753077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_a_pins[] = {
1754077365a9SGeert Uytterhoeven 	/* AVB_AVTP_MATCH_A */
1755077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 13),
1756077365a9SGeert Uytterhoeven };
1757077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_a_mux[] = {
1758077365a9SGeert Uytterhoeven 	AVB_AVTP_MATCH_A_MARK,
1759077365a9SGeert Uytterhoeven };
1760077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_a_pins[] = {
1761077365a9SGeert Uytterhoeven 	/* AVB_AVTP_CAPTURE_A */
1762077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 14),
1763077365a9SGeert Uytterhoeven };
1764077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_a_mux[] = {
1765077365a9SGeert Uytterhoeven 	AVB_AVTP_CAPTURE_A_MARK,
1766077365a9SGeert Uytterhoeven };
1767077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_b_pins[] = {
1768077365a9SGeert Uytterhoeven 	/*  AVB_AVTP_MATCH_B */
1769077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 8),
1770077365a9SGeert Uytterhoeven };
1771077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_match_b_mux[] = {
1772077365a9SGeert Uytterhoeven 	AVB_AVTP_MATCH_B_MARK,
1773077365a9SGeert Uytterhoeven };
1774077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_b_pins[] = {
1775077365a9SGeert Uytterhoeven 	/* AVB_AVTP_CAPTURE_B */
1776077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 11),
1777077365a9SGeert Uytterhoeven };
1778077365a9SGeert Uytterhoeven static const unsigned int avb_avtp_capture_b_mux[] = {
1779077365a9SGeert Uytterhoeven 	AVB_AVTP_CAPTURE_B_MARK,
1780077365a9SGeert Uytterhoeven };
1781077365a9SGeert Uytterhoeven 
1782077365a9SGeert Uytterhoeven /* - CAN ------------------------------------------------------------------ */
1783077365a9SGeert Uytterhoeven static const unsigned int can0_data_a_pins[] = {
1784077365a9SGeert Uytterhoeven 	/* TX, RX */
1785077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 23),	RCAR_GP_PIN(1, 24),
1786077365a9SGeert Uytterhoeven };
1787077365a9SGeert Uytterhoeven 
1788077365a9SGeert Uytterhoeven static const unsigned int can0_data_a_mux[] = {
1789077365a9SGeert Uytterhoeven 	CAN0_TX_A_MARK,		CAN0_RX_A_MARK,
1790077365a9SGeert Uytterhoeven };
1791077365a9SGeert Uytterhoeven 
1792077365a9SGeert Uytterhoeven static const unsigned int can0_data_b_pins[] = {
1793077365a9SGeert Uytterhoeven 	/* TX, RX */
1794077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 0),	RCAR_GP_PIN(2, 1),
1795077365a9SGeert Uytterhoeven };
1796077365a9SGeert Uytterhoeven 
1797077365a9SGeert Uytterhoeven static const unsigned int can0_data_b_mux[] = {
1798077365a9SGeert Uytterhoeven 	CAN0_TX_B_MARK,		CAN0_RX_B_MARK,
1799077365a9SGeert Uytterhoeven };
1800077365a9SGeert Uytterhoeven 
1801077365a9SGeert Uytterhoeven static const unsigned int can1_data_pins[] = {
1802077365a9SGeert Uytterhoeven 	/* TX, RX */
1803077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 22),	RCAR_GP_PIN(1, 26),
1804077365a9SGeert Uytterhoeven };
1805077365a9SGeert Uytterhoeven 
1806077365a9SGeert Uytterhoeven static const unsigned int can1_data_mux[] = {
1807077365a9SGeert Uytterhoeven 	CAN1_TX_MARK,		CAN1_RX_MARK,
1808077365a9SGeert Uytterhoeven };
1809077365a9SGeert Uytterhoeven 
1810077365a9SGeert Uytterhoeven /* - CAN Clock -------------------------------------------------------------- */
1811077365a9SGeert Uytterhoeven static const unsigned int can_clk_pins[] = {
1812077365a9SGeert Uytterhoeven 	/* CLK */
1813077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 25),
1814077365a9SGeert Uytterhoeven };
1815077365a9SGeert Uytterhoeven 
1816077365a9SGeert Uytterhoeven static const unsigned int can_clk_mux[] = {
1817077365a9SGeert Uytterhoeven 	CAN_CLK_MARK,
1818077365a9SGeert Uytterhoeven };
1819077365a9SGeert Uytterhoeven 
1820077365a9SGeert Uytterhoeven /* - CAN FD --------------------------------------------------------------- */
1821077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_a_pins[] = {
1822077365a9SGeert Uytterhoeven 	/* TX, RX */
1823077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 23),     RCAR_GP_PIN(1, 24),
1824077365a9SGeert Uytterhoeven };
1825077365a9SGeert Uytterhoeven 
1826077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_a_mux[] = {
1827077365a9SGeert Uytterhoeven 	CANFD0_TX_A_MARK,       CANFD0_RX_A_MARK,
1828077365a9SGeert Uytterhoeven };
1829077365a9SGeert Uytterhoeven 
1830077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_b_pins[] = {
1831077365a9SGeert Uytterhoeven 	/* TX, RX */
1832077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 0),      RCAR_GP_PIN(2, 1),
1833077365a9SGeert Uytterhoeven };
1834077365a9SGeert Uytterhoeven 
1835077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_b_mux[] = {
1836077365a9SGeert Uytterhoeven 	CANFD0_TX_B_MARK,       CANFD0_RX_B_MARK,
1837077365a9SGeert Uytterhoeven };
1838077365a9SGeert Uytterhoeven 
1839077365a9SGeert Uytterhoeven static const unsigned int canfd1_data_pins[] = {
1840077365a9SGeert Uytterhoeven 	/* TX, RX */
1841077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 22),     RCAR_GP_PIN(1, 26),
1842077365a9SGeert Uytterhoeven };
1843077365a9SGeert Uytterhoeven 
1844077365a9SGeert Uytterhoeven static const unsigned int canfd1_data_mux[] = {
1845077365a9SGeert Uytterhoeven 	CANFD1_TX_MARK,         CANFD1_RX_MARK,
1846077365a9SGeert Uytterhoeven };
1847077365a9SGeert Uytterhoeven 
184874c5fdc5SBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A77965
1849077365a9SGeert Uytterhoeven /* - DRIF0 --------------------------------------------------------------- */
1850077365a9SGeert Uytterhoeven static const unsigned int drif0_ctrl_a_pins[] = {
1851077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
1852077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
1853077365a9SGeert Uytterhoeven };
1854077365a9SGeert Uytterhoeven 
1855077365a9SGeert Uytterhoeven static const unsigned int drif0_ctrl_a_mux[] = {
1856077365a9SGeert Uytterhoeven 	RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
1857077365a9SGeert Uytterhoeven };
1858077365a9SGeert Uytterhoeven 
1859077365a9SGeert Uytterhoeven static const unsigned int drif0_data0_a_pins[] = {
1860077365a9SGeert Uytterhoeven 	/* D0 */
1861077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 10),
1862077365a9SGeert Uytterhoeven };
1863077365a9SGeert Uytterhoeven 
1864077365a9SGeert Uytterhoeven static const unsigned int drif0_data0_a_mux[] = {
1865077365a9SGeert Uytterhoeven 	RIF0_D0_A_MARK,
1866077365a9SGeert Uytterhoeven };
1867077365a9SGeert Uytterhoeven 
1868077365a9SGeert Uytterhoeven static const unsigned int drif0_data1_a_pins[] = {
1869077365a9SGeert Uytterhoeven 	/* D1 */
1870077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 7),
1871077365a9SGeert Uytterhoeven };
1872077365a9SGeert Uytterhoeven 
1873077365a9SGeert Uytterhoeven static const unsigned int drif0_data1_a_mux[] = {
1874077365a9SGeert Uytterhoeven 	RIF0_D1_A_MARK,
1875077365a9SGeert Uytterhoeven };
1876077365a9SGeert Uytterhoeven 
1877077365a9SGeert Uytterhoeven static const unsigned int drif0_ctrl_b_pins[] = {
1878077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
1879077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
1880077365a9SGeert Uytterhoeven };
1881077365a9SGeert Uytterhoeven 
1882077365a9SGeert Uytterhoeven static const unsigned int drif0_ctrl_b_mux[] = {
1883077365a9SGeert Uytterhoeven 	RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
1884077365a9SGeert Uytterhoeven };
1885077365a9SGeert Uytterhoeven 
1886077365a9SGeert Uytterhoeven static const unsigned int drif0_data0_b_pins[] = {
1887077365a9SGeert Uytterhoeven 	/* D0 */
1888077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 1),
1889077365a9SGeert Uytterhoeven };
1890077365a9SGeert Uytterhoeven 
1891077365a9SGeert Uytterhoeven static const unsigned int drif0_data0_b_mux[] = {
1892077365a9SGeert Uytterhoeven 	RIF0_D0_B_MARK,
1893077365a9SGeert Uytterhoeven };
1894077365a9SGeert Uytterhoeven 
1895077365a9SGeert Uytterhoeven static const unsigned int drif0_data1_b_pins[] = {
1896077365a9SGeert Uytterhoeven 	/* D1 */
1897077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 2),
1898077365a9SGeert Uytterhoeven };
1899077365a9SGeert Uytterhoeven 
1900077365a9SGeert Uytterhoeven static const unsigned int drif0_data1_b_mux[] = {
1901077365a9SGeert Uytterhoeven 	RIF0_D1_B_MARK,
1902077365a9SGeert Uytterhoeven };
1903077365a9SGeert Uytterhoeven 
1904077365a9SGeert Uytterhoeven static const unsigned int drif0_ctrl_c_pins[] = {
1905077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
1906077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
1907077365a9SGeert Uytterhoeven };
1908077365a9SGeert Uytterhoeven 
1909077365a9SGeert Uytterhoeven static const unsigned int drif0_ctrl_c_mux[] = {
1910077365a9SGeert Uytterhoeven 	RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
1911077365a9SGeert Uytterhoeven };
1912077365a9SGeert Uytterhoeven 
1913077365a9SGeert Uytterhoeven static const unsigned int drif0_data0_c_pins[] = {
1914077365a9SGeert Uytterhoeven 	/* D0 */
1915077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 13),
1916077365a9SGeert Uytterhoeven };
1917077365a9SGeert Uytterhoeven 
1918077365a9SGeert Uytterhoeven static const unsigned int drif0_data0_c_mux[] = {
1919077365a9SGeert Uytterhoeven 	RIF0_D0_C_MARK,
1920077365a9SGeert Uytterhoeven };
1921077365a9SGeert Uytterhoeven 
1922077365a9SGeert Uytterhoeven static const unsigned int drif0_data1_c_pins[] = {
1923077365a9SGeert Uytterhoeven 	/* D1 */
1924077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 14),
1925077365a9SGeert Uytterhoeven };
1926077365a9SGeert Uytterhoeven 
1927077365a9SGeert Uytterhoeven static const unsigned int drif0_data1_c_mux[] = {
1928077365a9SGeert Uytterhoeven 	RIF0_D1_C_MARK,
1929077365a9SGeert Uytterhoeven };
1930077365a9SGeert Uytterhoeven 
1931077365a9SGeert Uytterhoeven /* - DRIF1 --------------------------------------------------------------- */
1932077365a9SGeert Uytterhoeven static const unsigned int drif1_ctrl_a_pins[] = {
1933077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
1934077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
1935077365a9SGeert Uytterhoeven };
1936077365a9SGeert Uytterhoeven 
1937077365a9SGeert Uytterhoeven static const unsigned int drif1_ctrl_a_mux[] = {
1938077365a9SGeert Uytterhoeven 	RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
1939077365a9SGeert Uytterhoeven };
1940077365a9SGeert Uytterhoeven 
1941077365a9SGeert Uytterhoeven static const unsigned int drif1_data0_a_pins[] = {
1942077365a9SGeert Uytterhoeven 	/* D0 */
1943077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 19),
1944077365a9SGeert Uytterhoeven };
1945077365a9SGeert Uytterhoeven 
1946077365a9SGeert Uytterhoeven static const unsigned int drif1_data0_a_mux[] = {
1947077365a9SGeert Uytterhoeven 	RIF1_D0_A_MARK,
1948077365a9SGeert Uytterhoeven };
1949077365a9SGeert Uytterhoeven 
1950077365a9SGeert Uytterhoeven static const unsigned int drif1_data1_a_pins[] = {
1951077365a9SGeert Uytterhoeven 	/* D1 */
1952077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 20),
1953077365a9SGeert Uytterhoeven };
1954077365a9SGeert Uytterhoeven 
1955077365a9SGeert Uytterhoeven static const unsigned int drif1_data1_a_mux[] = {
1956077365a9SGeert Uytterhoeven 	RIF1_D1_A_MARK,
1957077365a9SGeert Uytterhoeven };
1958077365a9SGeert Uytterhoeven 
1959077365a9SGeert Uytterhoeven static const unsigned int drif1_ctrl_b_pins[] = {
1960077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
1961077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
1962077365a9SGeert Uytterhoeven };
1963077365a9SGeert Uytterhoeven 
1964077365a9SGeert Uytterhoeven static const unsigned int drif1_ctrl_b_mux[] = {
1965077365a9SGeert Uytterhoeven 	RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
1966077365a9SGeert Uytterhoeven };
1967077365a9SGeert Uytterhoeven 
1968077365a9SGeert Uytterhoeven static const unsigned int drif1_data0_b_pins[] = {
1969077365a9SGeert Uytterhoeven 	/* D0 */
1970077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 7),
1971077365a9SGeert Uytterhoeven };
1972077365a9SGeert Uytterhoeven 
1973077365a9SGeert Uytterhoeven static const unsigned int drif1_data0_b_mux[] = {
1974077365a9SGeert Uytterhoeven 	RIF1_D0_B_MARK,
1975077365a9SGeert Uytterhoeven };
1976077365a9SGeert Uytterhoeven 
1977077365a9SGeert Uytterhoeven static const unsigned int drif1_data1_b_pins[] = {
1978077365a9SGeert Uytterhoeven 	/* D1 */
1979077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 8),
1980077365a9SGeert Uytterhoeven };
1981077365a9SGeert Uytterhoeven 
1982077365a9SGeert Uytterhoeven static const unsigned int drif1_data1_b_mux[] = {
1983077365a9SGeert Uytterhoeven 	RIF1_D1_B_MARK,
1984077365a9SGeert Uytterhoeven };
1985077365a9SGeert Uytterhoeven 
1986077365a9SGeert Uytterhoeven static const unsigned int drif1_ctrl_c_pins[] = {
1987077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
1988077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
1989077365a9SGeert Uytterhoeven };
1990077365a9SGeert Uytterhoeven 
1991077365a9SGeert Uytterhoeven static const unsigned int drif1_ctrl_c_mux[] = {
1992077365a9SGeert Uytterhoeven 	RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
1993077365a9SGeert Uytterhoeven };
1994077365a9SGeert Uytterhoeven 
1995077365a9SGeert Uytterhoeven static const unsigned int drif1_data0_c_pins[] = {
1996077365a9SGeert Uytterhoeven 	/* D0 */
1997077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 6),
1998077365a9SGeert Uytterhoeven };
1999077365a9SGeert Uytterhoeven 
2000077365a9SGeert Uytterhoeven static const unsigned int drif1_data0_c_mux[] = {
2001077365a9SGeert Uytterhoeven 	RIF1_D0_C_MARK,
2002077365a9SGeert Uytterhoeven };
2003077365a9SGeert Uytterhoeven 
2004077365a9SGeert Uytterhoeven static const unsigned int drif1_data1_c_pins[] = {
2005077365a9SGeert Uytterhoeven 	/* D1 */
2006077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 10),
2007077365a9SGeert Uytterhoeven };
2008077365a9SGeert Uytterhoeven 
2009077365a9SGeert Uytterhoeven static const unsigned int drif1_data1_c_mux[] = {
2010077365a9SGeert Uytterhoeven 	RIF1_D1_C_MARK,
2011077365a9SGeert Uytterhoeven };
2012077365a9SGeert Uytterhoeven 
2013077365a9SGeert Uytterhoeven /* - DRIF2 --------------------------------------------------------------- */
2014077365a9SGeert Uytterhoeven static const unsigned int drif2_ctrl_a_pins[] = {
2015077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
2016077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
2017077365a9SGeert Uytterhoeven };
2018077365a9SGeert Uytterhoeven 
2019077365a9SGeert Uytterhoeven static const unsigned int drif2_ctrl_a_mux[] = {
2020077365a9SGeert Uytterhoeven 	RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
2021077365a9SGeert Uytterhoeven };
2022077365a9SGeert Uytterhoeven 
2023077365a9SGeert Uytterhoeven static const unsigned int drif2_data0_a_pins[] = {
2024077365a9SGeert Uytterhoeven 	/* D0 */
2025077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 7),
2026077365a9SGeert Uytterhoeven };
2027077365a9SGeert Uytterhoeven 
2028077365a9SGeert Uytterhoeven static const unsigned int drif2_data0_a_mux[] = {
2029077365a9SGeert Uytterhoeven 	RIF2_D0_A_MARK,
2030077365a9SGeert Uytterhoeven };
2031077365a9SGeert Uytterhoeven 
2032077365a9SGeert Uytterhoeven static const unsigned int drif2_data1_a_pins[] = {
2033077365a9SGeert Uytterhoeven 	/* D1 */
2034077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 10),
2035077365a9SGeert Uytterhoeven };
2036077365a9SGeert Uytterhoeven 
2037077365a9SGeert Uytterhoeven static const unsigned int drif2_data1_a_mux[] = {
2038077365a9SGeert Uytterhoeven 	RIF2_D1_A_MARK,
2039077365a9SGeert Uytterhoeven };
2040077365a9SGeert Uytterhoeven 
2041077365a9SGeert Uytterhoeven static const unsigned int drif2_ctrl_b_pins[] = {
2042077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
2043077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
2044077365a9SGeert Uytterhoeven };
2045077365a9SGeert Uytterhoeven 
2046077365a9SGeert Uytterhoeven static const unsigned int drif2_ctrl_b_mux[] = {
2047077365a9SGeert Uytterhoeven 	RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
2048077365a9SGeert Uytterhoeven };
2049077365a9SGeert Uytterhoeven 
2050077365a9SGeert Uytterhoeven static const unsigned int drif2_data0_b_pins[] = {
2051077365a9SGeert Uytterhoeven 	/* D0 */
2052077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 30),
2053077365a9SGeert Uytterhoeven };
2054077365a9SGeert Uytterhoeven 
2055077365a9SGeert Uytterhoeven static const unsigned int drif2_data0_b_mux[] = {
2056077365a9SGeert Uytterhoeven 	RIF2_D0_B_MARK,
2057077365a9SGeert Uytterhoeven };
2058077365a9SGeert Uytterhoeven 
2059077365a9SGeert Uytterhoeven static const unsigned int drif2_data1_b_pins[] = {
2060077365a9SGeert Uytterhoeven 	/* D1 */
2061077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 31),
2062077365a9SGeert Uytterhoeven };
2063077365a9SGeert Uytterhoeven 
2064077365a9SGeert Uytterhoeven static const unsigned int drif2_data1_b_mux[] = {
2065077365a9SGeert Uytterhoeven 	RIF2_D1_B_MARK,
2066077365a9SGeert Uytterhoeven };
2067077365a9SGeert Uytterhoeven 
2068077365a9SGeert Uytterhoeven /* - DRIF3 --------------------------------------------------------------- */
2069077365a9SGeert Uytterhoeven static const unsigned int drif3_ctrl_a_pins[] = {
2070077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
2071077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
2072077365a9SGeert Uytterhoeven };
2073077365a9SGeert Uytterhoeven 
2074077365a9SGeert Uytterhoeven static const unsigned int drif3_ctrl_a_mux[] = {
2075077365a9SGeert Uytterhoeven 	RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
2076077365a9SGeert Uytterhoeven };
2077077365a9SGeert Uytterhoeven 
2078077365a9SGeert Uytterhoeven static const unsigned int drif3_data0_a_pins[] = {
2079077365a9SGeert Uytterhoeven 	/* D0 */
2080077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 19),
2081077365a9SGeert Uytterhoeven };
2082077365a9SGeert Uytterhoeven 
2083077365a9SGeert Uytterhoeven static const unsigned int drif3_data0_a_mux[] = {
2084077365a9SGeert Uytterhoeven 	RIF3_D0_A_MARK,
2085077365a9SGeert Uytterhoeven };
2086077365a9SGeert Uytterhoeven 
2087077365a9SGeert Uytterhoeven static const unsigned int drif3_data1_a_pins[] = {
2088077365a9SGeert Uytterhoeven 	/* D1 */
2089077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 20),
2090077365a9SGeert Uytterhoeven };
2091077365a9SGeert Uytterhoeven 
2092077365a9SGeert Uytterhoeven static const unsigned int drif3_data1_a_mux[] = {
2093077365a9SGeert Uytterhoeven 	RIF3_D1_A_MARK,
2094077365a9SGeert Uytterhoeven };
2095077365a9SGeert Uytterhoeven 
2096077365a9SGeert Uytterhoeven static const unsigned int drif3_ctrl_b_pins[] = {
2097077365a9SGeert Uytterhoeven 	/* CLK, SYNC */
2098077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
2099077365a9SGeert Uytterhoeven };
2100077365a9SGeert Uytterhoeven 
2101077365a9SGeert Uytterhoeven static const unsigned int drif3_ctrl_b_mux[] = {
2102077365a9SGeert Uytterhoeven 	RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
2103077365a9SGeert Uytterhoeven };
2104077365a9SGeert Uytterhoeven 
2105077365a9SGeert Uytterhoeven static const unsigned int drif3_data0_b_pins[] = {
2106077365a9SGeert Uytterhoeven 	/* D0 */
2107077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 28),
2108077365a9SGeert Uytterhoeven };
2109077365a9SGeert Uytterhoeven 
2110077365a9SGeert Uytterhoeven static const unsigned int drif3_data0_b_mux[] = {
2111077365a9SGeert Uytterhoeven 	RIF3_D0_B_MARK,
2112077365a9SGeert Uytterhoeven };
2113077365a9SGeert Uytterhoeven 
2114077365a9SGeert Uytterhoeven static const unsigned int drif3_data1_b_pins[] = {
2115077365a9SGeert Uytterhoeven 	/* D1 */
2116077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 29),
2117077365a9SGeert Uytterhoeven };
2118077365a9SGeert Uytterhoeven 
2119077365a9SGeert Uytterhoeven static const unsigned int drif3_data1_b_mux[] = {
2120077365a9SGeert Uytterhoeven 	RIF3_D1_B_MARK,
2121077365a9SGeert Uytterhoeven };
212274c5fdc5SBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A77965 */
2123077365a9SGeert Uytterhoeven 
2124077365a9SGeert Uytterhoeven /* - DU --------------------------------------------------------------------- */
2125077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_pins[] = {
2126077365a9SGeert Uytterhoeven 	/* R[7:2], G[7:2], B[7:2] */
2127077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
2128077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
2129077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
2130077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
2131077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
2132077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
2133077365a9SGeert Uytterhoeven };
2134077365a9SGeert Uytterhoeven 
2135077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_mux[] = {
2136077365a9SGeert Uytterhoeven 	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
2137077365a9SGeert Uytterhoeven 	DU_DR3_MARK, DU_DR2_MARK,
2138077365a9SGeert Uytterhoeven 	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
2139077365a9SGeert Uytterhoeven 	DU_DG3_MARK, DU_DG2_MARK,
2140077365a9SGeert Uytterhoeven 	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
2141077365a9SGeert Uytterhoeven 	DU_DB3_MARK, DU_DB2_MARK,
2142077365a9SGeert Uytterhoeven };
2143077365a9SGeert Uytterhoeven 
2144077365a9SGeert Uytterhoeven static const unsigned int du_rgb888_pins[] = {
2145077365a9SGeert Uytterhoeven 	/* R[7:0], G[7:0], B[7:0] */
2146077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
2147077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
2148077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 9),  RCAR_GP_PIN(0, 8),
2149077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
2150077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
2151077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
2152077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 7),  RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),
2153077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),
2154077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 1),  RCAR_GP_PIN(1, 0),
2155077365a9SGeert Uytterhoeven };
2156077365a9SGeert Uytterhoeven 
2157077365a9SGeert Uytterhoeven static const unsigned int du_rgb888_mux[] = {
2158077365a9SGeert Uytterhoeven 	DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
2159077365a9SGeert Uytterhoeven 	DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
2160077365a9SGeert Uytterhoeven 	DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
2161077365a9SGeert Uytterhoeven 	DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
2162077365a9SGeert Uytterhoeven 	DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
2163077365a9SGeert Uytterhoeven 	DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
2164077365a9SGeert Uytterhoeven };
2165077365a9SGeert Uytterhoeven 
2166077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_0_pins[] = {
2167077365a9SGeert Uytterhoeven 	/* CLKOUT */
2168077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 27),
2169077365a9SGeert Uytterhoeven };
2170077365a9SGeert Uytterhoeven 
2171077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_0_mux[] = {
2172077365a9SGeert Uytterhoeven 	DU_DOTCLKOUT0_MARK
2173077365a9SGeert Uytterhoeven };
2174077365a9SGeert Uytterhoeven 
2175077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_1_pins[] = {
2176077365a9SGeert Uytterhoeven 	/* CLKOUT */
2177077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 3),
2178077365a9SGeert Uytterhoeven };
2179077365a9SGeert Uytterhoeven 
2180077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_1_mux[] = {
2181077365a9SGeert Uytterhoeven 	DU_DOTCLKOUT1_MARK
2182077365a9SGeert Uytterhoeven };
2183077365a9SGeert Uytterhoeven 
2184077365a9SGeert Uytterhoeven static const unsigned int du_sync_pins[] = {
2185077365a9SGeert Uytterhoeven 	/* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
2186077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
2187077365a9SGeert Uytterhoeven };
2188077365a9SGeert Uytterhoeven 
2189077365a9SGeert Uytterhoeven static const unsigned int du_sync_mux[] = {
2190077365a9SGeert Uytterhoeven 	DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
2191077365a9SGeert Uytterhoeven };
2192077365a9SGeert Uytterhoeven 
2193077365a9SGeert Uytterhoeven static const unsigned int du_oddf_pins[] = {
2194077365a9SGeert Uytterhoeven 	/* EXDISP/EXODDF/EXCDE */
2195077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 2),
2196077365a9SGeert Uytterhoeven };
2197077365a9SGeert Uytterhoeven 
2198077365a9SGeert Uytterhoeven static const unsigned int du_oddf_mux[] = {
2199077365a9SGeert Uytterhoeven 	DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
2200077365a9SGeert Uytterhoeven };
2201077365a9SGeert Uytterhoeven 
2202077365a9SGeert Uytterhoeven static const unsigned int du_cde_pins[] = {
2203077365a9SGeert Uytterhoeven 	/* CDE */
2204077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 0),
2205077365a9SGeert Uytterhoeven };
2206077365a9SGeert Uytterhoeven 
2207077365a9SGeert Uytterhoeven static const unsigned int du_cde_mux[] = {
2208077365a9SGeert Uytterhoeven 	DU_CDE_MARK,
2209077365a9SGeert Uytterhoeven };
2210077365a9SGeert Uytterhoeven 
2211077365a9SGeert Uytterhoeven static const unsigned int du_disp_pins[] = {
2212077365a9SGeert Uytterhoeven 	/* DISP */
2213077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 1),
2214077365a9SGeert Uytterhoeven };
2215077365a9SGeert Uytterhoeven 
2216077365a9SGeert Uytterhoeven static const unsigned int du_disp_mux[] = {
2217077365a9SGeert Uytterhoeven 	DU_DISP_MARK,
2218077365a9SGeert Uytterhoeven };
2219077365a9SGeert Uytterhoeven 
2220077365a9SGeert Uytterhoeven /* - HSCIF0 ----------------------------------------------------------------- */
2221077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_pins[] = {
2222077365a9SGeert Uytterhoeven 	/* RX, TX */
2223077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14),
2224077365a9SGeert Uytterhoeven };
2225077365a9SGeert Uytterhoeven 
2226077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_mux[] = {
2227077365a9SGeert Uytterhoeven 	HRX0_MARK, HTX0_MARK,
2228077365a9SGeert Uytterhoeven };
2229077365a9SGeert Uytterhoeven 
2230077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_pins[] = {
2231077365a9SGeert Uytterhoeven 	/* SCK */
2232077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 12),
2233077365a9SGeert Uytterhoeven };
2234077365a9SGeert Uytterhoeven 
2235077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_mux[] = {
2236077365a9SGeert Uytterhoeven 	HSCK0_MARK,
2237077365a9SGeert Uytterhoeven };
2238077365a9SGeert Uytterhoeven 
2239077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_pins[] = {
2240077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2241077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15),
2242077365a9SGeert Uytterhoeven };
2243077365a9SGeert Uytterhoeven 
2244077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_mux[] = {
2245077365a9SGeert Uytterhoeven 	HRTS0_N_MARK, HCTS0_N_MARK,
2246077365a9SGeert Uytterhoeven };
2247077365a9SGeert Uytterhoeven 
2248077365a9SGeert Uytterhoeven /* - HSCIF1 ----------------------------------------------------------------- */
2249077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_a_pins[] = {
2250077365a9SGeert Uytterhoeven 	/* RX, TX */
2251077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
2252077365a9SGeert Uytterhoeven };
2253077365a9SGeert Uytterhoeven 
2254077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_a_mux[] = {
2255077365a9SGeert Uytterhoeven 	HRX1_A_MARK, HTX1_A_MARK,
2256077365a9SGeert Uytterhoeven };
2257077365a9SGeert Uytterhoeven 
2258077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_a_pins[] = {
2259077365a9SGeert Uytterhoeven 	/* SCK */
2260077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 21),
2261077365a9SGeert Uytterhoeven };
2262077365a9SGeert Uytterhoeven 
2263077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_a_mux[] = {
2264077365a9SGeert Uytterhoeven 	HSCK1_A_MARK,
2265077365a9SGeert Uytterhoeven };
2266077365a9SGeert Uytterhoeven 
2267077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_a_pins[] = {
2268077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2269077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
2270077365a9SGeert Uytterhoeven };
2271077365a9SGeert Uytterhoeven 
2272077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_a_mux[] = {
2273077365a9SGeert Uytterhoeven 	HRTS1_N_A_MARK, HCTS1_N_A_MARK,
2274077365a9SGeert Uytterhoeven };
2275077365a9SGeert Uytterhoeven 
2276077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_b_pins[] = {
2277077365a9SGeert Uytterhoeven 	/* RX, TX */
2278077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
2279077365a9SGeert Uytterhoeven };
2280077365a9SGeert Uytterhoeven 
2281077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_b_mux[] = {
2282077365a9SGeert Uytterhoeven 	HRX1_B_MARK, HTX1_B_MARK,
2283077365a9SGeert Uytterhoeven };
2284077365a9SGeert Uytterhoeven 
2285077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_b_pins[] = {
2286077365a9SGeert Uytterhoeven 	/* SCK */
2287077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 0),
2288077365a9SGeert Uytterhoeven };
2289077365a9SGeert Uytterhoeven 
2290077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_b_mux[] = {
2291077365a9SGeert Uytterhoeven 	HSCK1_B_MARK,
2292077365a9SGeert Uytterhoeven };
2293077365a9SGeert Uytterhoeven 
2294077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_b_pins[] = {
2295077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2296077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
2297077365a9SGeert Uytterhoeven };
2298077365a9SGeert Uytterhoeven 
2299077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_b_mux[] = {
2300077365a9SGeert Uytterhoeven 	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
2301077365a9SGeert Uytterhoeven };
2302077365a9SGeert Uytterhoeven 
2303077365a9SGeert Uytterhoeven /* - HSCIF2 ----------------------------------------------------------------- */
2304077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_a_pins[] = {
2305077365a9SGeert Uytterhoeven 	/* RX, TX */
2306077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
2307077365a9SGeert Uytterhoeven };
2308077365a9SGeert Uytterhoeven 
2309077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_a_mux[] = {
2310077365a9SGeert Uytterhoeven 	HRX2_A_MARK, HTX2_A_MARK,
2311077365a9SGeert Uytterhoeven };
2312077365a9SGeert Uytterhoeven 
2313077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_a_pins[] = {
2314077365a9SGeert Uytterhoeven 	/* SCK */
2315077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 10),
2316077365a9SGeert Uytterhoeven };
2317077365a9SGeert Uytterhoeven 
2318077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_a_mux[] = {
2319077365a9SGeert Uytterhoeven 	HSCK2_A_MARK,
2320077365a9SGeert Uytterhoeven };
2321077365a9SGeert Uytterhoeven 
2322077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_a_pins[] = {
2323077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2324077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
2325077365a9SGeert Uytterhoeven };
2326077365a9SGeert Uytterhoeven 
2327077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_a_mux[] = {
2328077365a9SGeert Uytterhoeven 	HRTS2_N_A_MARK, HCTS2_N_A_MARK,
2329077365a9SGeert Uytterhoeven };
2330077365a9SGeert Uytterhoeven 
2331077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_b_pins[] = {
2332077365a9SGeert Uytterhoeven 	/* RX, TX */
2333077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
2334077365a9SGeert Uytterhoeven };
2335077365a9SGeert Uytterhoeven 
2336077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_b_mux[] = {
2337077365a9SGeert Uytterhoeven 	HRX2_B_MARK, HTX2_B_MARK,
2338077365a9SGeert Uytterhoeven };
2339077365a9SGeert Uytterhoeven 
2340077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_b_pins[] = {
2341077365a9SGeert Uytterhoeven 	/* SCK */
2342077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 21),
2343077365a9SGeert Uytterhoeven };
2344077365a9SGeert Uytterhoeven 
2345077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_b_mux[] = {
2346077365a9SGeert Uytterhoeven 	HSCK2_B_MARK,
2347077365a9SGeert Uytterhoeven };
2348077365a9SGeert Uytterhoeven 
2349077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_b_pins[] = {
2350077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2351077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19),
2352077365a9SGeert Uytterhoeven };
2353077365a9SGeert Uytterhoeven 
2354077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_b_mux[] = {
2355077365a9SGeert Uytterhoeven 	HRTS2_N_B_MARK, HCTS2_N_B_MARK,
2356077365a9SGeert Uytterhoeven };
2357077365a9SGeert Uytterhoeven 
2358077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_c_pins[] = {
2359077365a9SGeert Uytterhoeven 	/* RX, TX */
2360077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26),
2361077365a9SGeert Uytterhoeven };
2362077365a9SGeert Uytterhoeven 
2363077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_c_mux[] = {
2364077365a9SGeert Uytterhoeven 	HRX2_C_MARK, HTX2_C_MARK,
2365077365a9SGeert Uytterhoeven };
2366077365a9SGeert Uytterhoeven 
2367077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_c_pins[] = {
2368077365a9SGeert Uytterhoeven 	/* SCK */
2369077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 24),
2370077365a9SGeert Uytterhoeven };
2371077365a9SGeert Uytterhoeven 
2372077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_c_mux[] = {
2373077365a9SGeert Uytterhoeven 	HSCK2_C_MARK,
2374077365a9SGeert Uytterhoeven };
2375077365a9SGeert Uytterhoeven 
2376077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_c_pins[] = {
2377077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2378077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 27),
2379077365a9SGeert Uytterhoeven };
2380077365a9SGeert Uytterhoeven 
2381077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_c_mux[] = {
2382077365a9SGeert Uytterhoeven 	HRTS2_N_C_MARK, HCTS2_N_C_MARK,
2383077365a9SGeert Uytterhoeven };
2384077365a9SGeert Uytterhoeven 
2385077365a9SGeert Uytterhoeven /* - HSCIF3 ----------------------------------------------------------------- */
2386077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_a_pins[] = {
2387077365a9SGeert Uytterhoeven 	/* RX, TX */
2388077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
2389077365a9SGeert Uytterhoeven };
2390077365a9SGeert Uytterhoeven 
2391077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_a_mux[] = {
2392077365a9SGeert Uytterhoeven 	HRX3_A_MARK, HTX3_A_MARK,
2393077365a9SGeert Uytterhoeven };
2394077365a9SGeert Uytterhoeven 
2395077365a9SGeert Uytterhoeven static const unsigned int hscif3_clk_pins[] = {
2396077365a9SGeert Uytterhoeven 	/* SCK */
2397077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 22),
2398077365a9SGeert Uytterhoeven };
2399077365a9SGeert Uytterhoeven 
2400077365a9SGeert Uytterhoeven static const unsigned int hscif3_clk_mux[] = {
2401077365a9SGeert Uytterhoeven 	HSCK3_MARK,
2402077365a9SGeert Uytterhoeven };
2403077365a9SGeert Uytterhoeven 
2404077365a9SGeert Uytterhoeven static const unsigned int hscif3_ctrl_pins[] = {
2405077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2406077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
2407077365a9SGeert Uytterhoeven };
2408077365a9SGeert Uytterhoeven 
2409077365a9SGeert Uytterhoeven static const unsigned int hscif3_ctrl_mux[] = {
2410077365a9SGeert Uytterhoeven 	HRTS3_N_MARK, HCTS3_N_MARK,
2411077365a9SGeert Uytterhoeven };
2412077365a9SGeert Uytterhoeven 
2413077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_b_pins[] = {
2414077365a9SGeert Uytterhoeven 	/* RX, TX */
2415077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
2416077365a9SGeert Uytterhoeven };
2417077365a9SGeert Uytterhoeven 
2418077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_b_mux[] = {
2419077365a9SGeert Uytterhoeven 	HRX3_B_MARK, HTX3_B_MARK,
2420077365a9SGeert Uytterhoeven };
2421077365a9SGeert Uytterhoeven 
2422077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_c_pins[] = {
2423077365a9SGeert Uytterhoeven 	/* RX, TX */
2424077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
2425077365a9SGeert Uytterhoeven };
2426077365a9SGeert Uytterhoeven 
2427077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_c_mux[] = {
2428077365a9SGeert Uytterhoeven 	HRX3_C_MARK, HTX3_C_MARK,
2429077365a9SGeert Uytterhoeven };
2430077365a9SGeert Uytterhoeven 
2431077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_d_pins[] = {
2432077365a9SGeert Uytterhoeven 	/* RX, TX */
2433077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
2434077365a9SGeert Uytterhoeven };
2435077365a9SGeert Uytterhoeven 
2436077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_d_mux[] = {
2437077365a9SGeert Uytterhoeven 	HRX3_D_MARK, HTX3_D_MARK,
2438077365a9SGeert Uytterhoeven };
2439077365a9SGeert Uytterhoeven 
2440077365a9SGeert Uytterhoeven /* - HSCIF4 ----------------------------------------------------------------- */
2441077365a9SGeert Uytterhoeven static const unsigned int hscif4_data_a_pins[] = {
2442077365a9SGeert Uytterhoeven 	/* RX, TX */
2443077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
2444077365a9SGeert Uytterhoeven };
2445077365a9SGeert Uytterhoeven 
2446077365a9SGeert Uytterhoeven static const unsigned int hscif4_data_a_mux[] = {
2447077365a9SGeert Uytterhoeven 	HRX4_A_MARK, HTX4_A_MARK,
2448077365a9SGeert Uytterhoeven };
2449077365a9SGeert Uytterhoeven 
2450077365a9SGeert Uytterhoeven static const unsigned int hscif4_clk_pins[] = {
2451077365a9SGeert Uytterhoeven 	/* SCK */
2452077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 11),
2453077365a9SGeert Uytterhoeven };
2454077365a9SGeert Uytterhoeven 
2455077365a9SGeert Uytterhoeven static const unsigned int hscif4_clk_mux[] = {
2456077365a9SGeert Uytterhoeven 	HSCK4_MARK,
2457077365a9SGeert Uytterhoeven };
2458077365a9SGeert Uytterhoeven 
2459077365a9SGeert Uytterhoeven static const unsigned int hscif4_ctrl_pins[] = {
2460077365a9SGeert Uytterhoeven 	/* RTS, CTS */
2461077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
2462077365a9SGeert Uytterhoeven };
2463077365a9SGeert Uytterhoeven 
2464077365a9SGeert Uytterhoeven static const unsigned int hscif4_ctrl_mux[] = {
2465077365a9SGeert Uytterhoeven 	HRTS4_N_MARK, HCTS4_N_MARK,
2466077365a9SGeert Uytterhoeven };
2467077365a9SGeert Uytterhoeven 
2468077365a9SGeert Uytterhoeven static const unsigned int hscif4_data_b_pins[] = {
2469077365a9SGeert Uytterhoeven 	/* RX, TX */
2470077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
2471077365a9SGeert Uytterhoeven };
2472077365a9SGeert Uytterhoeven 
2473077365a9SGeert Uytterhoeven static const unsigned int hscif4_data_b_mux[] = {
2474077365a9SGeert Uytterhoeven 	HRX4_B_MARK, HTX4_B_MARK,
2475077365a9SGeert Uytterhoeven };
2476077365a9SGeert Uytterhoeven 
2477077365a9SGeert Uytterhoeven /* - I2C -------------------------------------------------------------------- */
2478077365a9SGeert Uytterhoeven static const unsigned int i2c0_pins[] = {
2479077365a9SGeert Uytterhoeven 	/* SCL, SDA */
2480077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
2481077365a9SGeert Uytterhoeven };
2482077365a9SGeert Uytterhoeven 
2483077365a9SGeert Uytterhoeven static const unsigned int i2c0_mux[] = {
2484077365a9SGeert Uytterhoeven 	SCL0_MARK, SDA0_MARK,
2485077365a9SGeert Uytterhoeven };
2486077365a9SGeert Uytterhoeven 
2487077365a9SGeert Uytterhoeven static const unsigned int i2c1_a_pins[] = {
2488077365a9SGeert Uytterhoeven 	/* SDA, SCL */
2489077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
2490077365a9SGeert Uytterhoeven };
2491077365a9SGeert Uytterhoeven 
2492077365a9SGeert Uytterhoeven static const unsigned int i2c1_a_mux[] = {
2493077365a9SGeert Uytterhoeven 	SDA1_A_MARK, SCL1_A_MARK,
2494077365a9SGeert Uytterhoeven };
2495077365a9SGeert Uytterhoeven 
2496077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_pins[] = {
2497077365a9SGeert Uytterhoeven 	/* SDA, SCL */
2498077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
2499077365a9SGeert Uytterhoeven };
2500077365a9SGeert Uytterhoeven 
2501077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_mux[] = {
2502077365a9SGeert Uytterhoeven 	SDA1_B_MARK, SCL1_B_MARK,
2503077365a9SGeert Uytterhoeven };
2504077365a9SGeert Uytterhoeven 
2505077365a9SGeert Uytterhoeven static const unsigned int i2c2_a_pins[] = {
2506077365a9SGeert Uytterhoeven 	/* SDA, SCL */
2507077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
2508077365a9SGeert Uytterhoeven };
2509077365a9SGeert Uytterhoeven 
2510077365a9SGeert Uytterhoeven static const unsigned int i2c2_a_mux[] = {
2511077365a9SGeert Uytterhoeven 	SDA2_A_MARK, SCL2_A_MARK,
2512077365a9SGeert Uytterhoeven };
2513077365a9SGeert Uytterhoeven 
2514077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_pins[] = {
2515077365a9SGeert Uytterhoeven 	/* SDA, SCL */
2516077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
2517077365a9SGeert Uytterhoeven };
2518077365a9SGeert Uytterhoeven 
2519077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_mux[] = {
2520077365a9SGeert Uytterhoeven 	SDA2_B_MARK, SCL2_B_MARK,
2521077365a9SGeert Uytterhoeven };
2522077365a9SGeert Uytterhoeven 
2523077365a9SGeert Uytterhoeven static const unsigned int i2c3_pins[] = {
2524077365a9SGeert Uytterhoeven 	/* SCL, SDA */
2525077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
2526077365a9SGeert Uytterhoeven };
2527077365a9SGeert Uytterhoeven 
2528077365a9SGeert Uytterhoeven static const unsigned int i2c3_mux[] = {
2529077365a9SGeert Uytterhoeven 	SCL3_MARK, SDA3_MARK,
2530077365a9SGeert Uytterhoeven };
2531077365a9SGeert Uytterhoeven 
2532077365a9SGeert Uytterhoeven static const unsigned int i2c5_pins[] = {
2533077365a9SGeert Uytterhoeven 	/* SCL, SDA */
2534077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 14),
2535077365a9SGeert Uytterhoeven };
2536077365a9SGeert Uytterhoeven 
2537077365a9SGeert Uytterhoeven static const unsigned int i2c5_mux[] = {
2538077365a9SGeert Uytterhoeven 	SCL5_MARK, SDA5_MARK,
2539077365a9SGeert Uytterhoeven };
2540077365a9SGeert Uytterhoeven 
2541077365a9SGeert Uytterhoeven static const unsigned int i2c6_a_pins[] = {
2542077365a9SGeert Uytterhoeven 	/* SDA, SCL */
2543077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
2544077365a9SGeert Uytterhoeven };
2545077365a9SGeert Uytterhoeven 
2546077365a9SGeert Uytterhoeven static const unsigned int i2c6_a_mux[] = {
2547077365a9SGeert Uytterhoeven 	SDA6_A_MARK, SCL6_A_MARK,
2548077365a9SGeert Uytterhoeven };
2549077365a9SGeert Uytterhoeven 
2550077365a9SGeert Uytterhoeven static const unsigned int i2c6_b_pins[] = {
2551077365a9SGeert Uytterhoeven 	/* SDA, SCL */
2552077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
2553077365a9SGeert Uytterhoeven };
2554077365a9SGeert Uytterhoeven 
2555077365a9SGeert Uytterhoeven static const unsigned int i2c6_b_mux[] = {
2556077365a9SGeert Uytterhoeven 	SDA6_B_MARK, SCL6_B_MARK,
2557077365a9SGeert Uytterhoeven };
2558077365a9SGeert Uytterhoeven 
2559077365a9SGeert Uytterhoeven static const unsigned int i2c6_c_pins[] = {
2560077365a9SGeert Uytterhoeven 	/* SDA, SCL */
2561077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14),
2562077365a9SGeert Uytterhoeven };
2563077365a9SGeert Uytterhoeven 
2564077365a9SGeert Uytterhoeven static const unsigned int i2c6_c_mux[] = {
2565077365a9SGeert Uytterhoeven 	SDA6_C_MARK, SCL6_C_MARK,
2566077365a9SGeert Uytterhoeven };
2567077365a9SGeert Uytterhoeven 
2568077365a9SGeert Uytterhoeven /* - INTC-EX ---------------------------------------------------------------- */
2569077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq0_pins[] = {
2570077365a9SGeert Uytterhoeven 	/* IRQ0 */
2571077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 0),
2572077365a9SGeert Uytterhoeven };
2573077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq0_mux[] = {
2574077365a9SGeert Uytterhoeven 	IRQ0_MARK,
2575077365a9SGeert Uytterhoeven };
2576077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq1_pins[] = {
2577077365a9SGeert Uytterhoeven 	/* IRQ1 */
2578077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 1),
2579077365a9SGeert Uytterhoeven };
2580077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq1_mux[] = {
2581077365a9SGeert Uytterhoeven 	IRQ1_MARK,
2582077365a9SGeert Uytterhoeven };
2583077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq2_pins[] = {
2584077365a9SGeert Uytterhoeven 	/* IRQ2 */
2585077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 2),
2586077365a9SGeert Uytterhoeven };
2587077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq2_mux[] = {
2588077365a9SGeert Uytterhoeven 	IRQ2_MARK,
2589077365a9SGeert Uytterhoeven };
2590077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq3_pins[] = {
2591077365a9SGeert Uytterhoeven 	/* IRQ3 */
2592077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 3),
2593077365a9SGeert Uytterhoeven };
2594077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq3_mux[] = {
2595077365a9SGeert Uytterhoeven 	IRQ3_MARK,
2596077365a9SGeert Uytterhoeven };
2597077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq4_pins[] = {
2598077365a9SGeert Uytterhoeven 	/* IRQ4 */
2599077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 4),
2600077365a9SGeert Uytterhoeven };
2601077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq4_mux[] = {
2602077365a9SGeert Uytterhoeven 	IRQ4_MARK,
2603077365a9SGeert Uytterhoeven };
2604077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq5_pins[] = {
2605077365a9SGeert Uytterhoeven 	/* IRQ5 */
2606077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 5),
2607077365a9SGeert Uytterhoeven };
2608077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq5_mux[] = {
2609077365a9SGeert Uytterhoeven 	IRQ5_MARK,
2610077365a9SGeert Uytterhoeven };
2611077365a9SGeert Uytterhoeven 
2612ce34fb3cSAndrey Gusakov #ifdef CONFIG_PINCTRL_PFC_R8A77965
2613ce34fb3cSAndrey Gusakov /* - MLB+ ------------------------------------------------------------------- */
2614ce34fb3cSAndrey Gusakov static const unsigned int mlb_3pin_pins[] = {
2615ce34fb3cSAndrey Gusakov 	RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
2616ce34fb3cSAndrey Gusakov };
2617ce34fb3cSAndrey Gusakov static const unsigned int mlb_3pin_mux[] = {
2618ce34fb3cSAndrey Gusakov 	MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
2619ce34fb3cSAndrey Gusakov };
2620ce34fb3cSAndrey Gusakov #endif /* CONFIG_PINCTRL_PFC_R8A77965 */
2621ce34fb3cSAndrey Gusakov 
2622077365a9SGeert Uytterhoeven /* - MSIOF0 ----------------------------------------------------------------- */
2623077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_pins[] = {
2624077365a9SGeert Uytterhoeven 	/* SCK */
2625077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 17),
2626077365a9SGeert Uytterhoeven };
2627077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_mux[] = {
2628077365a9SGeert Uytterhoeven 	MSIOF0_SCK_MARK,
2629077365a9SGeert Uytterhoeven };
2630077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_pins[] = {
2631077365a9SGeert Uytterhoeven 	/* SYNC */
2632077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 18),
2633077365a9SGeert Uytterhoeven };
2634077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_mux[] = {
2635077365a9SGeert Uytterhoeven 	MSIOF0_SYNC_MARK,
2636077365a9SGeert Uytterhoeven };
2637077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_pins[] = {
2638077365a9SGeert Uytterhoeven 	/* SS1 */
2639077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 19),
2640077365a9SGeert Uytterhoeven };
2641077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_mux[] = {
2642077365a9SGeert Uytterhoeven 	MSIOF0_SS1_MARK,
2643077365a9SGeert Uytterhoeven };
2644077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_pins[] = {
2645077365a9SGeert Uytterhoeven 	/* SS2 */
2646077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 21),
2647077365a9SGeert Uytterhoeven };
2648077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_mux[] = {
2649077365a9SGeert Uytterhoeven 	MSIOF0_SS2_MARK,
2650077365a9SGeert Uytterhoeven };
2651077365a9SGeert Uytterhoeven static const unsigned int msiof0_txd_pins[] = {
2652077365a9SGeert Uytterhoeven 	/* TXD */
2653077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 20),
2654077365a9SGeert Uytterhoeven };
2655077365a9SGeert Uytterhoeven static const unsigned int msiof0_txd_mux[] = {
2656077365a9SGeert Uytterhoeven 	MSIOF0_TXD_MARK,
2657077365a9SGeert Uytterhoeven };
2658077365a9SGeert Uytterhoeven static const unsigned int msiof0_rxd_pins[] = {
2659077365a9SGeert Uytterhoeven 	/* RXD */
2660077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 22),
2661077365a9SGeert Uytterhoeven };
2662077365a9SGeert Uytterhoeven static const unsigned int msiof0_rxd_mux[] = {
2663077365a9SGeert Uytterhoeven 	MSIOF0_RXD_MARK,
2664077365a9SGeert Uytterhoeven };
2665077365a9SGeert Uytterhoeven /* - MSIOF1 ----------------------------------------------------------------- */
2666077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_a_pins[] = {
2667077365a9SGeert Uytterhoeven 	/* SCK */
2668077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 8),
2669077365a9SGeert Uytterhoeven };
2670077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_a_mux[] = {
2671077365a9SGeert Uytterhoeven 	MSIOF1_SCK_A_MARK,
2672077365a9SGeert Uytterhoeven };
2673077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_a_pins[] = {
2674077365a9SGeert Uytterhoeven 	/* SYNC */
2675077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 9),
2676077365a9SGeert Uytterhoeven };
2677077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_a_mux[] = {
2678077365a9SGeert Uytterhoeven 	MSIOF1_SYNC_A_MARK,
2679077365a9SGeert Uytterhoeven };
2680077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_a_pins[] = {
2681077365a9SGeert Uytterhoeven 	/* SS1 */
2682077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 5),
2683077365a9SGeert Uytterhoeven };
2684077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_a_mux[] = {
2685077365a9SGeert Uytterhoeven 	MSIOF1_SS1_A_MARK,
2686077365a9SGeert Uytterhoeven };
2687077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_a_pins[] = {
2688077365a9SGeert Uytterhoeven 	/* SS2 */
2689077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 6),
2690077365a9SGeert Uytterhoeven };
2691077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_a_mux[] = {
2692077365a9SGeert Uytterhoeven 	MSIOF1_SS2_A_MARK,
2693077365a9SGeert Uytterhoeven };
2694077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_a_pins[] = {
2695077365a9SGeert Uytterhoeven 	/* TXD */
2696077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 7),
2697077365a9SGeert Uytterhoeven };
2698077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_a_mux[] = {
2699077365a9SGeert Uytterhoeven 	MSIOF1_TXD_A_MARK,
2700077365a9SGeert Uytterhoeven };
2701077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_a_pins[] = {
2702077365a9SGeert Uytterhoeven 	/* RXD */
2703077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 10),
2704077365a9SGeert Uytterhoeven };
2705077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_a_mux[] = {
2706077365a9SGeert Uytterhoeven 	MSIOF1_RXD_A_MARK,
2707077365a9SGeert Uytterhoeven };
2708077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_b_pins[] = {
2709077365a9SGeert Uytterhoeven 	/* SCK */
2710077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 9),
2711077365a9SGeert Uytterhoeven };
2712077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_b_mux[] = {
2713077365a9SGeert Uytterhoeven 	MSIOF1_SCK_B_MARK,
2714077365a9SGeert Uytterhoeven };
2715077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_b_pins[] = {
2716077365a9SGeert Uytterhoeven 	/* SYNC */
2717077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 3),
2718077365a9SGeert Uytterhoeven };
2719077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_b_mux[] = {
2720077365a9SGeert Uytterhoeven 	MSIOF1_SYNC_B_MARK,
2721077365a9SGeert Uytterhoeven };
2722077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_b_pins[] = {
2723077365a9SGeert Uytterhoeven 	/* SS1 */
2724077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 4),
2725077365a9SGeert Uytterhoeven };
2726077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_b_mux[] = {
2727077365a9SGeert Uytterhoeven 	MSIOF1_SS1_B_MARK,
2728077365a9SGeert Uytterhoeven };
2729077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_b_pins[] = {
2730077365a9SGeert Uytterhoeven 	/* SS2 */
2731077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 0),
2732077365a9SGeert Uytterhoeven };
2733077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_b_mux[] = {
2734077365a9SGeert Uytterhoeven 	MSIOF1_SS2_B_MARK,
2735077365a9SGeert Uytterhoeven };
2736077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_b_pins[] = {
2737077365a9SGeert Uytterhoeven 	/* TXD */
2738077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 8),
2739077365a9SGeert Uytterhoeven };
2740077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_b_mux[] = {
2741077365a9SGeert Uytterhoeven 	MSIOF1_TXD_B_MARK,
2742077365a9SGeert Uytterhoeven };
2743077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_b_pins[] = {
2744077365a9SGeert Uytterhoeven 	/* RXD */
2745077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 7),
2746077365a9SGeert Uytterhoeven };
2747077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_b_mux[] = {
2748077365a9SGeert Uytterhoeven 	MSIOF1_RXD_B_MARK,
2749077365a9SGeert Uytterhoeven };
2750077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_c_pins[] = {
2751077365a9SGeert Uytterhoeven 	/* SCK */
2752077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 17),
2753077365a9SGeert Uytterhoeven };
2754077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_c_mux[] = {
2755077365a9SGeert Uytterhoeven 	MSIOF1_SCK_C_MARK,
2756077365a9SGeert Uytterhoeven };
2757077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_c_pins[] = {
2758077365a9SGeert Uytterhoeven 	/* SYNC */
2759077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 18),
2760077365a9SGeert Uytterhoeven };
2761077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_c_mux[] = {
2762077365a9SGeert Uytterhoeven 	MSIOF1_SYNC_C_MARK,
2763077365a9SGeert Uytterhoeven };
2764077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_c_pins[] = {
2765077365a9SGeert Uytterhoeven 	/* SS1 */
2766077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 21),
2767077365a9SGeert Uytterhoeven };
2768077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_c_mux[] = {
2769077365a9SGeert Uytterhoeven 	MSIOF1_SS1_C_MARK,
2770077365a9SGeert Uytterhoeven };
2771077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_c_pins[] = {
2772077365a9SGeert Uytterhoeven 	/* SS2 */
2773077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 27),
2774077365a9SGeert Uytterhoeven };
2775077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_c_mux[] = {
2776077365a9SGeert Uytterhoeven 	MSIOF1_SS2_C_MARK,
2777077365a9SGeert Uytterhoeven };
2778077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_c_pins[] = {
2779077365a9SGeert Uytterhoeven 	/* TXD */
2780077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 20),
2781077365a9SGeert Uytterhoeven };
2782077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_c_mux[] = {
2783077365a9SGeert Uytterhoeven 	MSIOF1_TXD_C_MARK,
2784077365a9SGeert Uytterhoeven };
2785077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_c_pins[] = {
2786077365a9SGeert Uytterhoeven 	/* RXD */
2787077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 19),
2788077365a9SGeert Uytterhoeven };
2789077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_c_mux[] = {
2790077365a9SGeert Uytterhoeven 	MSIOF1_RXD_C_MARK,
2791077365a9SGeert Uytterhoeven };
2792077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_d_pins[] = {
2793077365a9SGeert Uytterhoeven 	/* SCK */
2794077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 12),
2795077365a9SGeert Uytterhoeven };
2796077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_d_mux[] = {
2797077365a9SGeert Uytterhoeven 	MSIOF1_SCK_D_MARK,
2798077365a9SGeert Uytterhoeven };
2799077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_d_pins[] = {
2800077365a9SGeert Uytterhoeven 	/* SYNC */
2801077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 15),
2802077365a9SGeert Uytterhoeven };
2803077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_d_mux[] = {
2804077365a9SGeert Uytterhoeven 	MSIOF1_SYNC_D_MARK,
2805077365a9SGeert Uytterhoeven };
2806077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_d_pins[] = {
2807077365a9SGeert Uytterhoeven 	/* SS1 */
2808077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 16),
2809077365a9SGeert Uytterhoeven };
2810077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_d_mux[] = {
2811077365a9SGeert Uytterhoeven 	MSIOF1_SS1_D_MARK,
2812077365a9SGeert Uytterhoeven };
2813077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_d_pins[] = {
2814077365a9SGeert Uytterhoeven 	/* SS2 */
2815077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 21),
2816077365a9SGeert Uytterhoeven };
2817077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_d_mux[] = {
2818077365a9SGeert Uytterhoeven 	MSIOF1_SS2_D_MARK,
2819077365a9SGeert Uytterhoeven };
2820077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_d_pins[] = {
2821077365a9SGeert Uytterhoeven 	/* TXD */
2822077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 14),
2823077365a9SGeert Uytterhoeven };
2824077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_d_mux[] = {
2825077365a9SGeert Uytterhoeven 	MSIOF1_TXD_D_MARK,
2826077365a9SGeert Uytterhoeven };
2827077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_d_pins[] = {
2828077365a9SGeert Uytterhoeven 	/* RXD */
2829077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 13),
2830077365a9SGeert Uytterhoeven };
2831077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_d_mux[] = {
2832077365a9SGeert Uytterhoeven 	MSIOF1_RXD_D_MARK,
2833077365a9SGeert Uytterhoeven };
2834077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_e_pins[] = {
2835077365a9SGeert Uytterhoeven 	/* SCK */
2836077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 0),
2837077365a9SGeert Uytterhoeven };
2838077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_e_mux[] = {
2839077365a9SGeert Uytterhoeven 	MSIOF1_SCK_E_MARK,
2840077365a9SGeert Uytterhoeven };
2841077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_e_pins[] = {
2842077365a9SGeert Uytterhoeven 	/* SYNC */
2843077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 1),
2844077365a9SGeert Uytterhoeven };
2845077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_e_mux[] = {
2846077365a9SGeert Uytterhoeven 	MSIOF1_SYNC_E_MARK,
2847077365a9SGeert Uytterhoeven };
2848077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_e_pins[] = {
2849077365a9SGeert Uytterhoeven 	/* SS1 */
2850077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 4),
2851077365a9SGeert Uytterhoeven };
2852077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_e_mux[] = {
2853077365a9SGeert Uytterhoeven 	MSIOF1_SS1_E_MARK,
2854077365a9SGeert Uytterhoeven };
2855077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_e_pins[] = {
2856077365a9SGeert Uytterhoeven 	/* SS2 */
2857077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 5),
2858077365a9SGeert Uytterhoeven };
2859077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_e_mux[] = {
2860077365a9SGeert Uytterhoeven 	MSIOF1_SS2_E_MARK,
2861077365a9SGeert Uytterhoeven };
2862077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_e_pins[] = {
2863077365a9SGeert Uytterhoeven 	/* TXD */
2864077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 3),
2865077365a9SGeert Uytterhoeven };
2866077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_e_mux[] = {
2867077365a9SGeert Uytterhoeven 	MSIOF1_TXD_E_MARK,
2868077365a9SGeert Uytterhoeven };
2869077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_e_pins[] = {
2870077365a9SGeert Uytterhoeven 	/* RXD */
2871077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 2),
2872077365a9SGeert Uytterhoeven };
2873077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_e_mux[] = {
2874077365a9SGeert Uytterhoeven 	MSIOF1_RXD_E_MARK,
2875077365a9SGeert Uytterhoeven };
2876077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_f_pins[] = {
2877077365a9SGeert Uytterhoeven 	/* SCK */
2878077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 23),
2879077365a9SGeert Uytterhoeven };
2880077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_f_mux[] = {
2881077365a9SGeert Uytterhoeven 	MSIOF1_SCK_F_MARK,
2882077365a9SGeert Uytterhoeven };
2883077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_f_pins[] = {
2884077365a9SGeert Uytterhoeven 	/* SYNC */
2885077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 24),
2886077365a9SGeert Uytterhoeven };
2887077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_f_mux[] = {
2888077365a9SGeert Uytterhoeven 	MSIOF1_SYNC_F_MARK,
2889077365a9SGeert Uytterhoeven };
2890077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_f_pins[] = {
2891077365a9SGeert Uytterhoeven 	/* SS1 */
2892077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 1),
2893077365a9SGeert Uytterhoeven };
2894077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_f_mux[] = {
2895077365a9SGeert Uytterhoeven 	MSIOF1_SS1_F_MARK,
2896077365a9SGeert Uytterhoeven };
2897077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_f_pins[] = {
2898077365a9SGeert Uytterhoeven 	/* SS2 */
2899077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 2),
2900077365a9SGeert Uytterhoeven };
2901077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_f_mux[] = {
2902077365a9SGeert Uytterhoeven 	MSIOF1_SS2_F_MARK,
2903077365a9SGeert Uytterhoeven };
2904077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_f_pins[] = {
2905077365a9SGeert Uytterhoeven 	/* TXD */
2906077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 0),
2907077365a9SGeert Uytterhoeven };
2908077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_f_mux[] = {
2909077365a9SGeert Uytterhoeven 	MSIOF1_TXD_F_MARK,
2910077365a9SGeert Uytterhoeven };
2911077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_f_pins[] = {
2912077365a9SGeert Uytterhoeven 	/* RXD */
2913077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 25),
2914077365a9SGeert Uytterhoeven };
2915077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_f_mux[] = {
2916077365a9SGeert Uytterhoeven 	MSIOF1_RXD_F_MARK,
2917077365a9SGeert Uytterhoeven };
2918077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_g_pins[] = {
2919077365a9SGeert Uytterhoeven 	/* SCK */
2920077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 6),
2921077365a9SGeert Uytterhoeven };
2922077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_g_mux[] = {
2923077365a9SGeert Uytterhoeven 	MSIOF1_SCK_G_MARK,
2924077365a9SGeert Uytterhoeven };
2925077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_g_pins[] = {
2926077365a9SGeert Uytterhoeven 	/* SYNC */
2927077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 7),
2928077365a9SGeert Uytterhoeven };
2929077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_g_mux[] = {
2930077365a9SGeert Uytterhoeven 	MSIOF1_SYNC_G_MARK,
2931077365a9SGeert Uytterhoeven };
2932077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_g_pins[] = {
2933077365a9SGeert Uytterhoeven 	/* SS1 */
2934077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 10),
2935077365a9SGeert Uytterhoeven };
2936077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_g_mux[] = {
2937077365a9SGeert Uytterhoeven 	MSIOF1_SS1_G_MARK,
2938077365a9SGeert Uytterhoeven };
2939077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_g_pins[] = {
2940077365a9SGeert Uytterhoeven 	/* SS2 */
2941077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 11),
2942077365a9SGeert Uytterhoeven };
2943077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_g_mux[] = {
2944077365a9SGeert Uytterhoeven 	MSIOF1_SS2_G_MARK,
2945077365a9SGeert Uytterhoeven };
2946077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_g_pins[] = {
2947077365a9SGeert Uytterhoeven 	/* TXD */
2948077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 9),
2949077365a9SGeert Uytterhoeven };
2950077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_g_mux[] = {
2951077365a9SGeert Uytterhoeven 	MSIOF1_TXD_G_MARK,
2952077365a9SGeert Uytterhoeven };
2953077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_g_pins[] = {
2954077365a9SGeert Uytterhoeven 	/* RXD */
2955077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 8),
2956077365a9SGeert Uytterhoeven };
2957077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_g_mux[] = {
2958077365a9SGeert Uytterhoeven 	MSIOF1_RXD_G_MARK,
2959077365a9SGeert Uytterhoeven };
2960077365a9SGeert Uytterhoeven /* - MSIOF2 ----------------------------------------------------------------- */
2961077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_a_pins[] = {
2962077365a9SGeert Uytterhoeven 	/* SCK */
2963077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 9),
2964077365a9SGeert Uytterhoeven };
2965077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_a_mux[] = {
2966077365a9SGeert Uytterhoeven 	MSIOF2_SCK_A_MARK,
2967077365a9SGeert Uytterhoeven };
2968077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_a_pins[] = {
2969077365a9SGeert Uytterhoeven 	/* SYNC */
2970077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 8),
2971077365a9SGeert Uytterhoeven };
2972077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_a_mux[] = {
2973077365a9SGeert Uytterhoeven 	MSIOF2_SYNC_A_MARK,
2974077365a9SGeert Uytterhoeven };
2975077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_a_pins[] = {
2976077365a9SGeert Uytterhoeven 	/* SS1 */
2977077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 6),
2978077365a9SGeert Uytterhoeven };
2979077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_a_mux[] = {
2980077365a9SGeert Uytterhoeven 	MSIOF2_SS1_A_MARK,
2981077365a9SGeert Uytterhoeven };
2982077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_a_pins[] = {
2983077365a9SGeert Uytterhoeven 	/* SS2 */
2984077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 7),
2985077365a9SGeert Uytterhoeven };
2986077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_a_mux[] = {
2987077365a9SGeert Uytterhoeven 	MSIOF2_SS2_A_MARK,
2988077365a9SGeert Uytterhoeven };
2989077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_a_pins[] = {
2990077365a9SGeert Uytterhoeven 	/* TXD */
2991077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 11),
2992077365a9SGeert Uytterhoeven };
2993077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_a_mux[] = {
2994077365a9SGeert Uytterhoeven 	MSIOF2_TXD_A_MARK,
2995077365a9SGeert Uytterhoeven };
2996077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_a_pins[] = {
2997077365a9SGeert Uytterhoeven 	/* RXD */
2998077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 10),
2999077365a9SGeert Uytterhoeven };
3000077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_a_mux[] = {
3001077365a9SGeert Uytterhoeven 	MSIOF2_RXD_A_MARK,
3002077365a9SGeert Uytterhoeven };
3003077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_b_pins[] = {
3004077365a9SGeert Uytterhoeven 	/* SCK */
3005077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 4),
3006077365a9SGeert Uytterhoeven };
3007077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_b_mux[] = {
3008077365a9SGeert Uytterhoeven 	MSIOF2_SCK_B_MARK,
3009077365a9SGeert Uytterhoeven };
3010077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_b_pins[] = {
3011077365a9SGeert Uytterhoeven 	/* SYNC */
3012077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 5),
3013077365a9SGeert Uytterhoeven };
3014077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_b_mux[] = {
3015077365a9SGeert Uytterhoeven 	MSIOF2_SYNC_B_MARK,
3016077365a9SGeert Uytterhoeven };
3017077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_b_pins[] = {
3018077365a9SGeert Uytterhoeven 	/* SS1 */
3019077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 0),
3020077365a9SGeert Uytterhoeven };
3021077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_b_mux[] = {
3022077365a9SGeert Uytterhoeven 	MSIOF2_SS1_B_MARK,
3023077365a9SGeert Uytterhoeven };
3024077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_b_pins[] = {
3025077365a9SGeert Uytterhoeven 	/* SS2 */
3026077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 1),
3027077365a9SGeert Uytterhoeven };
3028077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_b_mux[] = {
3029077365a9SGeert Uytterhoeven 	MSIOF2_SS2_B_MARK,
3030077365a9SGeert Uytterhoeven };
3031077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_b_pins[] = {
3032077365a9SGeert Uytterhoeven 	/* TXD */
3033077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 7),
3034077365a9SGeert Uytterhoeven };
3035077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_b_mux[] = {
3036077365a9SGeert Uytterhoeven 	MSIOF2_TXD_B_MARK,
3037077365a9SGeert Uytterhoeven };
3038077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_b_pins[] = {
3039077365a9SGeert Uytterhoeven 	/* RXD */
3040077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 6),
3041077365a9SGeert Uytterhoeven };
3042077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_b_mux[] = {
3043077365a9SGeert Uytterhoeven 	MSIOF2_RXD_B_MARK,
3044077365a9SGeert Uytterhoeven };
3045077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_c_pins[] = {
3046077365a9SGeert Uytterhoeven 	/* SCK */
3047077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 12),
3048077365a9SGeert Uytterhoeven };
3049077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_c_mux[] = {
3050077365a9SGeert Uytterhoeven 	MSIOF2_SCK_C_MARK,
3051077365a9SGeert Uytterhoeven };
3052077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_c_pins[] = {
3053077365a9SGeert Uytterhoeven 	/* SYNC */
3054077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 11),
3055077365a9SGeert Uytterhoeven };
3056077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_c_mux[] = {
3057077365a9SGeert Uytterhoeven 	MSIOF2_SYNC_C_MARK,
3058077365a9SGeert Uytterhoeven };
3059077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_c_pins[] = {
3060077365a9SGeert Uytterhoeven 	/* SS1 */
3061077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 10),
3062077365a9SGeert Uytterhoeven };
3063077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_c_mux[] = {
3064077365a9SGeert Uytterhoeven 	MSIOF2_SS1_C_MARK,
3065077365a9SGeert Uytterhoeven };
3066077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_c_pins[] = {
3067077365a9SGeert Uytterhoeven 	/* SS2 */
3068077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 9),
3069077365a9SGeert Uytterhoeven };
3070077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_c_mux[] = {
3071077365a9SGeert Uytterhoeven 	MSIOF2_SS2_C_MARK,
3072077365a9SGeert Uytterhoeven };
3073077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_c_pins[] = {
3074077365a9SGeert Uytterhoeven 	/* TXD */
3075077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 14),
3076077365a9SGeert Uytterhoeven };
3077077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_c_mux[] = {
3078077365a9SGeert Uytterhoeven 	MSIOF2_TXD_C_MARK,
3079077365a9SGeert Uytterhoeven };
3080077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_c_pins[] = {
3081077365a9SGeert Uytterhoeven 	/* RXD */
3082077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 13),
3083077365a9SGeert Uytterhoeven };
3084077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_c_mux[] = {
3085077365a9SGeert Uytterhoeven 	MSIOF2_RXD_C_MARK,
3086077365a9SGeert Uytterhoeven };
3087077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_d_pins[] = {
3088077365a9SGeert Uytterhoeven 	/* SCK */
3089077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 8),
3090077365a9SGeert Uytterhoeven };
3091077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_d_mux[] = {
3092077365a9SGeert Uytterhoeven 	MSIOF2_SCK_D_MARK,
3093077365a9SGeert Uytterhoeven };
3094077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_d_pins[] = {
3095077365a9SGeert Uytterhoeven 	/* SYNC */
3096077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 9),
3097077365a9SGeert Uytterhoeven };
3098077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_d_mux[] = {
3099077365a9SGeert Uytterhoeven 	MSIOF2_SYNC_D_MARK,
3100077365a9SGeert Uytterhoeven };
3101077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_d_pins[] = {
3102077365a9SGeert Uytterhoeven 	/* SS1 */
3103077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 12),
3104077365a9SGeert Uytterhoeven };
3105077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_d_mux[] = {
3106077365a9SGeert Uytterhoeven 	MSIOF2_SS1_D_MARK,
3107077365a9SGeert Uytterhoeven };
3108077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_d_pins[] = {
3109077365a9SGeert Uytterhoeven 	/* SS2 */
3110077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 13),
3111077365a9SGeert Uytterhoeven };
3112077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_d_mux[] = {
3113077365a9SGeert Uytterhoeven 	MSIOF2_SS2_D_MARK,
3114077365a9SGeert Uytterhoeven };
3115077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_d_pins[] = {
3116077365a9SGeert Uytterhoeven 	/* TXD */
3117077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 11),
3118077365a9SGeert Uytterhoeven };
3119077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_d_mux[] = {
3120077365a9SGeert Uytterhoeven 	MSIOF2_TXD_D_MARK,
3121077365a9SGeert Uytterhoeven };
3122077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_d_pins[] = {
3123077365a9SGeert Uytterhoeven 	/* RXD */
3124077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 10),
3125077365a9SGeert Uytterhoeven };
3126077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_d_mux[] = {
3127077365a9SGeert Uytterhoeven 	MSIOF2_RXD_D_MARK,
3128077365a9SGeert Uytterhoeven };
3129077365a9SGeert Uytterhoeven /* - MSIOF3 ----------------------------------------------------------------- */
3130077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_a_pins[] = {
3131077365a9SGeert Uytterhoeven 	/* SCK */
3132077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 0),
3133077365a9SGeert Uytterhoeven };
3134077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_a_mux[] = {
3135077365a9SGeert Uytterhoeven 	MSIOF3_SCK_A_MARK,
3136077365a9SGeert Uytterhoeven };
3137077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_a_pins[] = {
3138077365a9SGeert Uytterhoeven 	/* SYNC */
3139077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 1),
3140077365a9SGeert Uytterhoeven };
3141077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_a_mux[] = {
3142077365a9SGeert Uytterhoeven 	MSIOF3_SYNC_A_MARK,
3143077365a9SGeert Uytterhoeven };
3144077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_a_pins[] = {
3145077365a9SGeert Uytterhoeven 	/* SS1 */
3146077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 14),
3147077365a9SGeert Uytterhoeven };
3148077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_a_mux[] = {
3149077365a9SGeert Uytterhoeven 	MSIOF3_SS1_A_MARK,
3150077365a9SGeert Uytterhoeven };
3151077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_a_pins[] = {
3152077365a9SGeert Uytterhoeven 	/* SS2 */
3153077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 15),
3154077365a9SGeert Uytterhoeven };
3155077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_a_mux[] = {
3156077365a9SGeert Uytterhoeven 	MSIOF3_SS2_A_MARK,
3157077365a9SGeert Uytterhoeven };
3158077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_a_pins[] = {
3159077365a9SGeert Uytterhoeven 	/* TXD */
3160077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 3),
3161077365a9SGeert Uytterhoeven };
3162077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_a_mux[] = {
3163077365a9SGeert Uytterhoeven 	MSIOF3_TXD_A_MARK,
3164077365a9SGeert Uytterhoeven };
3165077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_a_pins[] = {
3166077365a9SGeert Uytterhoeven 	/* RXD */
3167077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 2),
3168077365a9SGeert Uytterhoeven };
3169077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_a_mux[] = {
3170077365a9SGeert Uytterhoeven 	MSIOF3_RXD_A_MARK,
3171077365a9SGeert Uytterhoeven };
3172077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_b_pins[] = {
3173077365a9SGeert Uytterhoeven 	/* SCK */
3174077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 2),
3175077365a9SGeert Uytterhoeven };
3176077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_b_mux[] = {
3177077365a9SGeert Uytterhoeven 	MSIOF3_SCK_B_MARK,
3178077365a9SGeert Uytterhoeven };
3179077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_b_pins[] = {
3180077365a9SGeert Uytterhoeven 	/* SYNC */
3181077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 0),
3182077365a9SGeert Uytterhoeven };
3183077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_b_mux[] = {
3184077365a9SGeert Uytterhoeven 	MSIOF3_SYNC_B_MARK,
3185077365a9SGeert Uytterhoeven };
3186077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_b_pins[] = {
3187077365a9SGeert Uytterhoeven 	/* SS1 */
3188077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4),
3189077365a9SGeert Uytterhoeven };
3190077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_b_mux[] = {
3191077365a9SGeert Uytterhoeven 	MSIOF3_SS1_B_MARK,
3192077365a9SGeert Uytterhoeven };
3193077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_b_pins[] = {
3194077365a9SGeert Uytterhoeven 	/* SS2 */
3195077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 5),
3196077365a9SGeert Uytterhoeven };
3197077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_b_mux[] = {
3198077365a9SGeert Uytterhoeven 	MSIOF3_SS2_B_MARK,
3199077365a9SGeert Uytterhoeven };
3200077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_b_pins[] = {
3201077365a9SGeert Uytterhoeven 	/* TXD */
3202077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 1),
3203077365a9SGeert Uytterhoeven };
3204077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_b_mux[] = {
3205077365a9SGeert Uytterhoeven 	MSIOF3_TXD_B_MARK,
3206077365a9SGeert Uytterhoeven };
3207077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_b_pins[] = {
3208077365a9SGeert Uytterhoeven 	/* RXD */
3209077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 3),
3210077365a9SGeert Uytterhoeven };
3211077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_b_mux[] = {
3212077365a9SGeert Uytterhoeven 	MSIOF3_RXD_B_MARK,
3213077365a9SGeert Uytterhoeven };
3214077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_c_pins[] = {
3215077365a9SGeert Uytterhoeven 	/* SCK */
3216077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 12),
3217077365a9SGeert Uytterhoeven };
3218077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_c_mux[] = {
3219077365a9SGeert Uytterhoeven 	MSIOF3_SCK_C_MARK,
3220077365a9SGeert Uytterhoeven };
3221077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_c_pins[] = {
3222077365a9SGeert Uytterhoeven 	/* SYNC */
3223077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 13),
3224077365a9SGeert Uytterhoeven };
3225077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_c_mux[] = {
3226077365a9SGeert Uytterhoeven 	MSIOF3_SYNC_C_MARK,
3227077365a9SGeert Uytterhoeven };
3228077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_c_pins[] = {
3229077365a9SGeert Uytterhoeven 	/* TXD */
3230077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 15),
3231077365a9SGeert Uytterhoeven };
3232077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_c_mux[] = {
3233077365a9SGeert Uytterhoeven 	MSIOF3_TXD_C_MARK,
3234077365a9SGeert Uytterhoeven };
3235077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_c_pins[] = {
3236077365a9SGeert Uytterhoeven 	/* RXD */
3237077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 14),
3238077365a9SGeert Uytterhoeven };
3239077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_c_mux[] = {
3240077365a9SGeert Uytterhoeven 	MSIOF3_RXD_C_MARK,
3241077365a9SGeert Uytterhoeven };
3242077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_d_pins[] = {
3243077365a9SGeert Uytterhoeven 	/* SCK */
3244077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 22),
3245077365a9SGeert Uytterhoeven };
3246077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_d_mux[] = {
3247077365a9SGeert Uytterhoeven 	MSIOF3_SCK_D_MARK,
3248077365a9SGeert Uytterhoeven };
3249077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_d_pins[] = {
3250077365a9SGeert Uytterhoeven 	/* SYNC */
3251077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 23),
3252077365a9SGeert Uytterhoeven };
3253077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_d_mux[] = {
3254077365a9SGeert Uytterhoeven 	MSIOF3_SYNC_D_MARK,
3255077365a9SGeert Uytterhoeven };
3256077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_d_pins[] = {
3257077365a9SGeert Uytterhoeven 	/* SS1 */
3258077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 26),
3259077365a9SGeert Uytterhoeven };
3260077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_d_mux[] = {
3261077365a9SGeert Uytterhoeven 	MSIOF3_SS1_D_MARK,
3262077365a9SGeert Uytterhoeven };
3263077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_d_pins[] = {
3264077365a9SGeert Uytterhoeven 	/* TXD */
3265077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 25),
3266077365a9SGeert Uytterhoeven };
3267077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_d_mux[] = {
3268077365a9SGeert Uytterhoeven 	MSIOF3_TXD_D_MARK,
3269077365a9SGeert Uytterhoeven };
3270077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_d_pins[] = {
3271077365a9SGeert Uytterhoeven 	/* RXD */
3272077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 24),
3273077365a9SGeert Uytterhoeven };
3274077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_d_mux[] = {
3275077365a9SGeert Uytterhoeven 	MSIOF3_RXD_D_MARK,
3276077365a9SGeert Uytterhoeven };
3277077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_e_pins[] = {
3278077365a9SGeert Uytterhoeven 	/* SCK */
3279077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 3),
3280077365a9SGeert Uytterhoeven };
3281077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_e_mux[] = {
3282077365a9SGeert Uytterhoeven 	MSIOF3_SCK_E_MARK,
3283077365a9SGeert Uytterhoeven };
3284077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_e_pins[] = {
3285077365a9SGeert Uytterhoeven 	/* SYNC */
3286077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 2),
3287077365a9SGeert Uytterhoeven };
3288077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_e_mux[] = {
3289077365a9SGeert Uytterhoeven 	MSIOF3_SYNC_E_MARK,
3290077365a9SGeert Uytterhoeven };
3291077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_e_pins[] = {
3292077365a9SGeert Uytterhoeven 	/* SS1 */
3293077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 1),
3294077365a9SGeert Uytterhoeven };
3295077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_e_mux[] = {
3296077365a9SGeert Uytterhoeven 	MSIOF3_SS1_E_MARK,
3297077365a9SGeert Uytterhoeven };
3298077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_e_pins[] = {
3299077365a9SGeert Uytterhoeven 	/* SS2 */
3300077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 0),
3301077365a9SGeert Uytterhoeven };
3302077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_e_mux[] = {
3303077365a9SGeert Uytterhoeven 	MSIOF3_SS2_E_MARK,
3304077365a9SGeert Uytterhoeven };
3305077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_e_pins[] = {
3306077365a9SGeert Uytterhoeven 	/* TXD */
3307077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 5),
3308077365a9SGeert Uytterhoeven };
3309077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_e_mux[] = {
3310077365a9SGeert Uytterhoeven 	MSIOF3_TXD_E_MARK,
3311077365a9SGeert Uytterhoeven };
3312077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_e_pins[] = {
3313077365a9SGeert Uytterhoeven 	/* RXD */
3314077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 4),
3315077365a9SGeert Uytterhoeven };
3316077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_e_mux[] = {
3317077365a9SGeert Uytterhoeven 	MSIOF3_RXD_E_MARK,
3318077365a9SGeert Uytterhoeven };
3319077365a9SGeert Uytterhoeven 
3320077365a9SGeert Uytterhoeven /* - PWM0 --------------------------------------------------------------------*/
3321077365a9SGeert Uytterhoeven static const unsigned int pwm0_pins[] = {
3322077365a9SGeert Uytterhoeven 	/* PWM */
3323077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 6),
3324077365a9SGeert Uytterhoeven };
3325077365a9SGeert Uytterhoeven static const unsigned int pwm0_mux[] = {
3326077365a9SGeert Uytterhoeven 	PWM0_MARK,
3327077365a9SGeert Uytterhoeven };
3328077365a9SGeert Uytterhoeven /* - PWM1 --------------------------------------------------------------------*/
3329077365a9SGeert Uytterhoeven static const unsigned int pwm1_a_pins[] = {
3330077365a9SGeert Uytterhoeven 	/* PWM */
3331077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 7),
3332077365a9SGeert Uytterhoeven };
3333077365a9SGeert Uytterhoeven static const unsigned int pwm1_a_mux[] = {
3334077365a9SGeert Uytterhoeven 	PWM1_A_MARK,
3335077365a9SGeert Uytterhoeven };
3336077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_pins[] = {
3337077365a9SGeert Uytterhoeven 	/* PWM */
3338077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 8),
3339077365a9SGeert Uytterhoeven };
3340077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_mux[] = {
3341077365a9SGeert Uytterhoeven 	PWM1_B_MARK,
3342077365a9SGeert Uytterhoeven };
3343077365a9SGeert Uytterhoeven /* - PWM2 --------------------------------------------------------------------*/
3344077365a9SGeert Uytterhoeven static const unsigned int pwm2_a_pins[] = {
3345077365a9SGeert Uytterhoeven 	/* PWM */
3346077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 8),
3347077365a9SGeert Uytterhoeven };
3348077365a9SGeert Uytterhoeven static const unsigned int pwm2_a_mux[] = {
3349077365a9SGeert Uytterhoeven 	PWM2_A_MARK,
3350077365a9SGeert Uytterhoeven };
3351077365a9SGeert Uytterhoeven static const unsigned int pwm2_b_pins[] = {
3352077365a9SGeert Uytterhoeven 	/* PWM */
3353077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 11),
3354077365a9SGeert Uytterhoeven };
3355077365a9SGeert Uytterhoeven static const unsigned int pwm2_b_mux[] = {
3356077365a9SGeert Uytterhoeven 	PWM2_B_MARK,
3357077365a9SGeert Uytterhoeven };
3358077365a9SGeert Uytterhoeven /* - PWM3 --------------------------------------------------------------------*/
3359077365a9SGeert Uytterhoeven static const unsigned int pwm3_a_pins[] = {
3360077365a9SGeert Uytterhoeven 	/* PWM */
3361077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 0),
3362077365a9SGeert Uytterhoeven };
3363077365a9SGeert Uytterhoeven static const unsigned int pwm3_a_mux[] = {
3364077365a9SGeert Uytterhoeven 	PWM3_A_MARK,
3365077365a9SGeert Uytterhoeven };
3366077365a9SGeert Uytterhoeven static const unsigned int pwm3_b_pins[] = {
3367077365a9SGeert Uytterhoeven 	/* PWM */
3368077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 2),
3369077365a9SGeert Uytterhoeven };
3370077365a9SGeert Uytterhoeven static const unsigned int pwm3_b_mux[] = {
3371077365a9SGeert Uytterhoeven 	PWM3_B_MARK,
3372077365a9SGeert Uytterhoeven };
3373077365a9SGeert Uytterhoeven /* - PWM4 --------------------------------------------------------------------*/
3374077365a9SGeert Uytterhoeven static const unsigned int pwm4_a_pins[] = {
3375077365a9SGeert Uytterhoeven 	/* PWM */
3376077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 1),
3377077365a9SGeert Uytterhoeven };
3378077365a9SGeert Uytterhoeven static const unsigned int pwm4_a_mux[] = {
3379077365a9SGeert Uytterhoeven 	PWM4_A_MARK,
3380077365a9SGeert Uytterhoeven };
3381077365a9SGeert Uytterhoeven static const unsigned int pwm4_b_pins[] = {
3382077365a9SGeert Uytterhoeven 	/* PWM */
3383077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 3),
3384077365a9SGeert Uytterhoeven };
3385077365a9SGeert Uytterhoeven static const unsigned int pwm4_b_mux[] = {
3386077365a9SGeert Uytterhoeven 	PWM4_B_MARK,
3387077365a9SGeert Uytterhoeven };
3388077365a9SGeert Uytterhoeven /* - PWM5 --------------------------------------------------------------------*/
3389077365a9SGeert Uytterhoeven static const unsigned int pwm5_a_pins[] = {
3390077365a9SGeert Uytterhoeven 	/* PWM */
3391077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 2),
3392077365a9SGeert Uytterhoeven };
3393077365a9SGeert Uytterhoeven static const unsigned int pwm5_a_mux[] = {
3394077365a9SGeert Uytterhoeven 	PWM5_A_MARK,
3395077365a9SGeert Uytterhoeven };
3396077365a9SGeert Uytterhoeven static const unsigned int pwm5_b_pins[] = {
3397077365a9SGeert Uytterhoeven 	/* PWM */
3398077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 4),
3399077365a9SGeert Uytterhoeven };
3400077365a9SGeert Uytterhoeven static const unsigned int pwm5_b_mux[] = {
3401077365a9SGeert Uytterhoeven 	PWM5_B_MARK,
3402077365a9SGeert Uytterhoeven };
3403077365a9SGeert Uytterhoeven /* - PWM6 --------------------------------------------------------------------*/
3404077365a9SGeert Uytterhoeven static const unsigned int pwm6_a_pins[] = {
3405077365a9SGeert Uytterhoeven 	/* PWM */
3406077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 3),
3407077365a9SGeert Uytterhoeven };
3408077365a9SGeert Uytterhoeven static const unsigned int pwm6_a_mux[] = {
3409077365a9SGeert Uytterhoeven 	PWM6_A_MARK,
3410077365a9SGeert Uytterhoeven };
3411077365a9SGeert Uytterhoeven static const unsigned int pwm6_b_pins[] = {
3412077365a9SGeert Uytterhoeven 	/* PWM */
3413077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 5),
3414077365a9SGeert Uytterhoeven };
3415077365a9SGeert Uytterhoeven static const unsigned int pwm6_b_mux[] = {
3416077365a9SGeert Uytterhoeven 	PWM6_B_MARK,
3417077365a9SGeert Uytterhoeven };
3418077365a9SGeert Uytterhoeven 
3419ffcd7f81SLad Prabhakar /* - QSPI0 ------------------------------------------------------------------ */
3420ffcd7f81SLad Prabhakar static const unsigned int qspi0_ctrl_pins[] = {
3421ffcd7f81SLad Prabhakar 	/* QSPI0_SPCLK, QSPI0_SSL */
3422ffcd7f81SLad Prabhakar 	PIN_QSPI0_SPCLK, PIN_QSPI0_SSL,
3423ffcd7f81SLad Prabhakar };
3424ffcd7f81SLad Prabhakar static const unsigned int qspi0_ctrl_mux[] = {
3425ffcd7f81SLad Prabhakar 	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
3426ffcd7f81SLad Prabhakar };
34274664b96dSGeert Uytterhoeven static const unsigned int qspi0_data_pins[] = {
3428ffcd7f81SLad Prabhakar 	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
3429ffcd7f81SLad Prabhakar 	PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
3430ffcd7f81SLad Prabhakar 	/* QSPI0_IO2, QSPI0_IO3 */
3431ffcd7f81SLad Prabhakar 	PIN_QSPI0_IO2, PIN_QSPI0_IO3,
3432ffcd7f81SLad Prabhakar };
34334664b96dSGeert Uytterhoeven static const unsigned int qspi0_data_mux[] = {
3434ffcd7f81SLad Prabhakar 	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
3435ffcd7f81SLad Prabhakar 	QSPI0_IO2_MARK, QSPI0_IO3_MARK,
3436ffcd7f81SLad Prabhakar };
3437ffcd7f81SLad Prabhakar /* - QSPI1 ------------------------------------------------------------------ */
3438ffcd7f81SLad Prabhakar static const unsigned int qspi1_ctrl_pins[] = {
3439ffcd7f81SLad Prabhakar 	/* QSPI1_SPCLK, QSPI1_SSL */
3440ffcd7f81SLad Prabhakar 	PIN_QSPI1_SPCLK, PIN_QSPI1_SSL,
3441ffcd7f81SLad Prabhakar };
3442ffcd7f81SLad Prabhakar static const unsigned int qspi1_ctrl_mux[] = {
3443ffcd7f81SLad Prabhakar 	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
3444ffcd7f81SLad Prabhakar };
34454664b96dSGeert Uytterhoeven static const unsigned int qspi1_data_pins[] = {
3446ffcd7f81SLad Prabhakar 	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
3447ffcd7f81SLad Prabhakar 	PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
3448ffcd7f81SLad Prabhakar 	/* QSPI1_IO2, QSPI1_IO3 */
3449ffcd7f81SLad Prabhakar 	PIN_QSPI1_IO2, PIN_QSPI1_IO3,
3450ffcd7f81SLad Prabhakar };
34514664b96dSGeert Uytterhoeven static const unsigned int qspi1_data_mux[] = {
3452ffcd7f81SLad Prabhakar 	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
3453ffcd7f81SLad Prabhakar 	QSPI1_IO2_MARK, QSPI1_IO3_MARK,
3454ffcd7f81SLad Prabhakar };
3455ffcd7f81SLad Prabhakar 
3456077365a9SGeert Uytterhoeven /* - SATA --------------------------------------------------------------------*/
3457077365a9SGeert Uytterhoeven static const unsigned int sata0_devslp_a_pins[] = {
3458077365a9SGeert Uytterhoeven 	/* DEVSLP */
3459077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 16),
3460077365a9SGeert Uytterhoeven };
3461077365a9SGeert Uytterhoeven 
3462077365a9SGeert Uytterhoeven static const unsigned int sata0_devslp_a_mux[] = {
3463077365a9SGeert Uytterhoeven 	SATA_DEVSLP_A_MARK,
3464077365a9SGeert Uytterhoeven };
3465077365a9SGeert Uytterhoeven 
3466077365a9SGeert Uytterhoeven static const unsigned int sata0_devslp_b_pins[] = {
3467077365a9SGeert Uytterhoeven 	/* DEVSLP */
3468077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 6),
3469077365a9SGeert Uytterhoeven };
3470077365a9SGeert Uytterhoeven 
3471077365a9SGeert Uytterhoeven static const unsigned int sata0_devslp_b_mux[] = {
3472077365a9SGeert Uytterhoeven 	SATA_DEVSLP_B_MARK,
3473077365a9SGeert Uytterhoeven };
3474077365a9SGeert Uytterhoeven 
3475077365a9SGeert Uytterhoeven /* - SCIF0 ------------------------------------------------------------------ */
3476077365a9SGeert Uytterhoeven static const unsigned int scif0_data_pins[] = {
3477077365a9SGeert Uytterhoeven 	/* RX, TX */
3478077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
3479077365a9SGeert Uytterhoeven };
3480077365a9SGeert Uytterhoeven static const unsigned int scif0_data_mux[] = {
3481077365a9SGeert Uytterhoeven 	RX0_MARK, TX0_MARK,
3482077365a9SGeert Uytterhoeven };
3483077365a9SGeert Uytterhoeven static const unsigned int scif0_clk_pins[] = {
3484077365a9SGeert Uytterhoeven 	/* SCK */
3485077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 0),
3486077365a9SGeert Uytterhoeven };
3487077365a9SGeert Uytterhoeven static const unsigned int scif0_clk_mux[] = {
3488077365a9SGeert Uytterhoeven 	SCK0_MARK,
3489077365a9SGeert Uytterhoeven };
3490077365a9SGeert Uytterhoeven static const unsigned int scif0_ctrl_pins[] = {
3491077365a9SGeert Uytterhoeven 	/* RTS, CTS */
3492077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
3493077365a9SGeert Uytterhoeven };
3494077365a9SGeert Uytterhoeven static const unsigned int scif0_ctrl_mux[] = {
3495077365a9SGeert Uytterhoeven 	RTS0_N_MARK, CTS0_N_MARK,
3496077365a9SGeert Uytterhoeven };
3497077365a9SGeert Uytterhoeven /* - SCIF1 ------------------------------------------------------------------ */
3498077365a9SGeert Uytterhoeven static const unsigned int scif1_data_a_pins[] = {
3499077365a9SGeert Uytterhoeven 	/* RX, TX */
3500077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
3501077365a9SGeert Uytterhoeven };
3502077365a9SGeert Uytterhoeven static const unsigned int scif1_data_a_mux[] = {
3503077365a9SGeert Uytterhoeven 	RX1_A_MARK, TX1_A_MARK,
3504077365a9SGeert Uytterhoeven };
3505077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_pins[] = {
3506077365a9SGeert Uytterhoeven 	/* SCK */
3507077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 21),
3508077365a9SGeert Uytterhoeven };
3509077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_mux[] = {
3510077365a9SGeert Uytterhoeven 	SCK1_MARK,
3511077365a9SGeert Uytterhoeven };
3512077365a9SGeert Uytterhoeven static const unsigned int scif1_ctrl_pins[] = {
3513077365a9SGeert Uytterhoeven 	/* RTS, CTS */
3514077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
3515077365a9SGeert Uytterhoeven };
3516077365a9SGeert Uytterhoeven static const unsigned int scif1_ctrl_mux[] = {
3517077365a9SGeert Uytterhoeven 	RTS1_N_MARK, CTS1_N_MARK,
3518077365a9SGeert Uytterhoeven };
3519077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_pins[] = {
3520077365a9SGeert Uytterhoeven 	/* RX, TX */
3521077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
3522077365a9SGeert Uytterhoeven };
3523077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_mux[] = {
3524077365a9SGeert Uytterhoeven 	RX1_B_MARK, TX1_B_MARK,
3525077365a9SGeert Uytterhoeven };
3526077365a9SGeert Uytterhoeven /* - SCIF2 ------------------------------------------------------------------ */
3527077365a9SGeert Uytterhoeven static const unsigned int scif2_data_a_pins[] = {
3528077365a9SGeert Uytterhoeven 	/* RX, TX */
3529077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
3530077365a9SGeert Uytterhoeven };
3531077365a9SGeert Uytterhoeven static const unsigned int scif2_data_a_mux[] = {
3532077365a9SGeert Uytterhoeven 	RX2_A_MARK, TX2_A_MARK,
3533077365a9SGeert Uytterhoeven };
3534077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_pins[] = {
3535077365a9SGeert Uytterhoeven 	/* SCK */
3536077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 9),
3537077365a9SGeert Uytterhoeven };
3538077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_mux[] = {
3539077365a9SGeert Uytterhoeven 	SCK2_MARK,
3540077365a9SGeert Uytterhoeven };
3541077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_pins[] = {
3542077365a9SGeert Uytterhoeven 	/* RX, TX */
3543077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
3544077365a9SGeert Uytterhoeven };
3545077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_mux[] = {
3546077365a9SGeert Uytterhoeven 	RX2_B_MARK, TX2_B_MARK,
3547077365a9SGeert Uytterhoeven };
3548077365a9SGeert Uytterhoeven /* - SCIF3 ------------------------------------------------------------------ */
3549077365a9SGeert Uytterhoeven static const unsigned int scif3_data_a_pins[] = {
3550077365a9SGeert Uytterhoeven 	/* RX, TX */
3551077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
3552077365a9SGeert Uytterhoeven };
3553077365a9SGeert Uytterhoeven static const unsigned int scif3_data_a_mux[] = {
3554077365a9SGeert Uytterhoeven 	RX3_A_MARK, TX3_A_MARK,
3555077365a9SGeert Uytterhoeven };
3556077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_pins[] = {
3557077365a9SGeert Uytterhoeven 	/* SCK */
3558077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 22),
3559077365a9SGeert Uytterhoeven };
3560077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_mux[] = {
3561077365a9SGeert Uytterhoeven 	SCK3_MARK,
3562077365a9SGeert Uytterhoeven };
3563077365a9SGeert Uytterhoeven static const unsigned int scif3_ctrl_pins[] = {
3564077365a9SGeert Uytterhoeven 	/* RTS, CTS */
3565077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
3566077365a9SGeert Uytterhoeven };
3567077365a9SGeert Uytterhoeven static const unsigned int scif3_ctrl_mux[] = {
3568077365a9SGeert Uytterhoeven 	RTS3_N_MARK, CTS3_N_MARK,
3569077365a9SGeert Uytterhoeven };
3570077365a9SGeert Uytterhoeven static const unsigned int scif3_data_b_pins[] = {
3571077365a9SGeert Uytterhoeven 	/* RX, TX */
3572077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
3573077365a9SGeert Uytterhoeven };
3574077365a9SGeert Uytterhoeven static const unsigned int scif3_data_b_mux[] = {
3575077365a9SGeert Uytterhoeven 	RX3_B_MARK, TX3_B_MARK,
3576077365a9SGeert Uytterhoeven };
3577077365a9SGeert Uytterhoeven /* - SCIF4 ------------------------------------------------------------------ */
3578077365a9SGeert Uytterhoeven static const unsigned int scif4_data_a_pins[] = {
3579077365a9SGeert Uytterhoeven 	/* RX, TX */
3580077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
3581077365a9SGeert Uytterhoeven };
3582077365a9SGeert Uytterhoeven static const unsigned int scif4_data_a_mux[] = {
3583077365a9SGeert Uytterhoeven 	RX4_A_MARK, TX4_A_MARK,
3584077365a9SGeert Uytterhoeven };
3585077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_a_pins[] = {
3586077365a9SGeert Uytterhoeven 	/* SCK */
3587077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 10),
3588077365a9SGeert Uytterhoeven };
3589077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_a_mux[] = {
3590077365a9SGeert Uytterhoeven 	SCK4_A_MARK,
3591077365a9SGeert Uytterhoeven };
3592077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_a_pins[] = {
3593077365a9SGeert Uytterhoeven 	/* RTS, CTS */
3594077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
3595077365a9SGeert Uytterhoeven };
3596077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_a_mux[] = {
3597077365a9SGeert Uytterhoeven 	RTS4_N_A_MARK, CTS4_N_A_MARK,
3598077365a9SGeert Uytterhoeven };
3599077365a9SGeert Uytterhoeven static const unsigned int scif4_data_b_pins[] = {
3600077365a9SGeert Uytterhoeven 	/* RX, TX */
3601077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
3602077365a9SGeert Uytterhoeven };
3603077365a9SGeert Uytterhoeven static const unsigned int scif4_data_b_mux[] = {
3604077365a9SGeert Uytterhoeven 	RX4_B_MARK, TX4_B_MARK,
3605077365a9SGeert Uytterhoeven };
3606077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_b_pins[] = {
3607077365a9SGeert Uytterhoeven 	/* SCK */
3608077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 5),
3609077365a9SGeert Uytterhoeven };
3610077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_b_mux[] = {
3611077365a9SGeert Uytterhoeven 	SCK4_B_MARK,
3612077365a9SGeert Uytterhoeven };
3613077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_b_pins[] = {
3614077365a9SGeert Uytterhoeven 	/* RTS, CTS */
3615077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
3616077365a9SGeert Uytterhoeven };
3617077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_b_mux[] = {
3618077365a9SGeert Uytterhoeven 	RTS4_N_B_MARK, CTS4_N_B_MARK,
3619077365a9SGeert Uytterhoeven };
3620077365a9SGeert Uytterhoeven static const unsigned int scif4_data_c_pins[] = {
3621077365a9SGeert Uytterhoeven 	/* RX, TX */
3622077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
3623077365a9SGeert Uytterhoeven };
3624077365a9SGeert Uytterhoeven static const unsigned int scif4_data_c_mux[] = {
3625077365a9SGeert Uytterhoeven 	RX4_C_MARK, TX4_C_MARK,
3626077365a9SGeert Uytterhoeven };
3627077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_c_pins[] = {
3628077365a9SGeert Uytterhoeven 	/* SCK */
3629077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 8),
3630077365a9SGeert Uytterhoeven };
3631077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_c_mux[] = {
3632077365a9SGeert Uytterhoeven 	SCK4_C_MARK,
3633077365a9SGeert Uytterhoeven };
3634077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_c_pins[] = {
3635077365a9SGeert Uytterhoeven 	/* RTS, CTS */
3636077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
3637077365a9SGeert Uytterhoeven };
3638077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_c_mux[] = {
3639077365a9SGeert Uytterhoeven 	RTS4_N_C_MARK, CTS4_N_C_MARK,
3640077365a9SGeert Uytterhoeven };
3641077365a9SGeert Uytterhoeven /* - SCIF5 ------------------------------------------------------------------ */
3642077365a9SGeert Uytterhoeven static const unsigned int scif5_data_a_pins[] = {
3643077365a9SGeert Uytterhoeven 	/* RX, TX */
3644077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
3645077365a9SGeert Uytterhoeven };
3646077365a9SGeert Uytterhoeven static const unsigned int scif5_data_a_mux[] = {
3647077365a9SGeert Uytterhoeven 	RX5_A_MARK, TX5_A_MARK,
3648077365a9SGeert Uytterhoeven };
3649077365a9SGeert Uytterhoeven static const unsigned int scif5_clk_a_pins[] = {
3650077365a9SGeert Uytterhoeven 	/* SCK */
3651077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 21),
3652077365a9SGeert Uytterhoeven };
3653077365a9SGeert Uytterhoeven static const unsigned int scif5_clk_a_mux[] = {
3654077365a9SGeert Uytterhoeven 	SCK5_A_MARK,
3655077365a9SGeert Uytterhoeven };
3656077365a9SGeert Uytterhoeven static const unsigned int scif5_data_b_pins[] = {
3657077365a9SGeert Uytterhoeven 	/* RX, TX */
3658077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 18),
3659077365a9SGeert Uytterhoeven };
3660077365a9SGeert Uytterhoeven static const unsigned int scif5_data_b_mux[] = {
3661077365a9SGeert Uytterhoeven 	RX5_B_MARK, TX5_B_MARK,
3662077365a9SGeert Uytterhoeven };
3663077365a9SGeert Uytterhoeven static const unsigned int scif5_clk_b_pins[] = {
3664077365a9SGeert Uytterhoeven 	/* SCK */
3665077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 0),
3666077365a9SGeert Uytterhoeven };
3667077365a9SGeert Uytterhoeven static const unsigned int scif5_clk_b_mux[] = {
3668077365a9SGeert Uytterhoeven 	SCK5_B_MARK,
3669077365a9SGeert Uytterhoeven };
3670077365a9SGeert Uytterhoeven /* - SCIF Clock ------------------------------------------------------------- */
3671077365a9SGeert Uytterhoeven static const unsigned int scif_clk_a_pins[] = {
3672077365a9SGeert Uytterhoeven 	/* SCIF_CLK */
3673077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 23),
3674077365a9SGeert Uytterhoeven };
3675077365a9SGeert Uytterhoeven static const unsigned int scif_clk_a_mux[] = {
3676077365a9SGeert Uytterhoeven 	SCIF_CLK_A_MARK,
3677077365a9SGeert Uytterhoeven };
3678077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_pins[] = {
3679077365a9SGeert Uytterhoeven 	/* SCIF_CLK */
3680077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 9),
3681077365a9SGeert Uytterhoeven };
3682077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_mux[] = {
3683077365a9SGeert Uytterhoeven 	SCIF_CLK_B_MARK,
3684077365a9SGeert Uytterhoeven };
3685077365a9SGeert Uytterhoeven 
3686077365a9SGeert Uytterhoeven /* - SDHI0 ------------------------------------------------------------------ */
3687b79813f4SGeert Uytterhoeven static const unsigned int sdhi0_data_pins[] = {
3688077365a9SGeert Uytterhoeven 	/* D[0:3] */
3689077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
3690077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
3691077365a9SGeert Uytterhoeven };
3692077365a9SGeert Uytterhoeven 
3693b79813f4SGeert Uytterhoeven static const unsigned int sdhi0_data_mux[] = {
3694077365a9SGeert Uytterhoeven 	SD0_DAT0_MARK, SD0_DAT1_MARK,
3695077365a9SGeert Uytterhoeven 	SD0_DAT2_MARK, SD0_DAT3_MARK,
3696077365a9SGeert Uytterhoeven };
3697077365a9SGeert Uytterhoeven 
3698077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_pins[] = {
3699077365a9SGeert Uytterhoeven 	/* CLK, CMD */
3700077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
3701077365a9SGeert Uytterhoeven };
3702077365a9SGeert Uytterhoeven 
3703077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_mux[] = {
3704077365a9SGeert Uytterhoeven 	SD0_CLK_MARK, SD0_CMD_MARK,
3705077365a9SGeert Uytterhoeven };
3706077365a9SGeert Uytterhoeven 
3707077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_pins[] = {
3708077365a9SGeert Uytterhoeven 	/* CD */
3709077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 12),
3710077365a9SGeert Uytterhoeven };
3711077365a9SGeert Uytterhoeven 
3712077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_mux[] = {
3713077365a9SGeert Uytterhoeven 	SD0_CD_MARK,
3714077365a9SGeert Uytterhoeven };
3715077365a9SGeert Uytterhoeven 
3716077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_pins[] = {
3717077365a9SGeert Uytterhoeven 	/* WP */
3718077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 13),
3719077365a9SGeert Uytterhoeven };
3720077365a9SGeert Uytterhoeven 
3721077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_mux[] = {
3722077365a9SGeert Uytterhoeven 	SD0_WP_MARK,
3723077365a9SGeert Uytterhoeven };
3724077365a9SGeert Uytterhoeven 
3725077365a9SGeert Uytterhoeven /* - SDHI1 ------------------------------------------------------------------ */
3726b79813f4SGeert Uytterhoeven static const unsigned int sdhi1_data_pins[] = {
3727077365a9SGeert Uytterhoeven 	/* D[0:3] */
3728077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 8),  RCAR_GP_PIN(3, 9),
3729077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
3730077365a9SGeert Uytterhoeven };
3731077365a9SGeert Uytterhoeven 
3732b79813f4SGeert Uytterhoeven static const unsigned int sdhi1_data_mux[] = {
3733077365a9SGeert Uytterhoeven 	SD1_DAT0_MARK, SD1_DAT1_MARK,
3734077365a9SGeert Uytterhoeven 	SD1_DAT2_MARK, SD1_DAT3_MARK,
3735077365a9SGeert Uytterhoeven };
3736077365a9SGeert Uytterhoeven 
3737077365a9SGeert Uytterhoeven static const unsigned int sdhi1_ctrl_pins[] = {
3738077365a9SGeert Uytterhoeven 	/* CLK, CMD */
3739077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
3740077365a9SGeert Uytterhoeven };
3741077365a9SGeert Uytterhoeven 
3742077365a9SGeert Uytterhoeven static const unsigned int sdhi1_ctrl_mux[] = {
3743077365a9SGeert Uytterhoeven 	SD1_CLK_MARK, SD1_CMD_MARK,
3744077365a9SGeert Uytterhoeven };
3745077365a9SGeert Uytterhoeven 
3746077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_pins[] = {
3747077365a9SGeert Uytterhoeven 	/* CD */
3748077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 14),
3749077365a9SGeert Uytterhoeven };
3750077365a9SGeert Uytterhoeven 
3751077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_mux[] = {
3752077365a9SGeert Uytterhoeven 	SD1_CD_MARK,
3753077365a9SGeert Uytterhoeven };
3754077365a9SGeert Uytterhoeven 
3755077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_pins[] = {
3756077365a9SGeert Uytterhoeven 	/* WP */
3757077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 15),
3758077365a9SGeert Uytterhoeven };
3759077365a9SGeert Uytterhoeven 
3760077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_mux[] = {
3761077365a9SGeert Uytterhoeven 	SD1_WP_MARK,
3762077365a9SGeert Uytterhoeven };
3763077365a9SGeert Uytterhoeven 
3764077365a9SGeert Uytterhoeven /* - SDHI2 ------------------------------------------------------------------ */
3765b79813f4SGeert Uytterhoeven static const unsigned int sdhi2_data_pins[] = {
3766077365a9SGeert Uytterhoeven 	/* D[0:7] */
3767077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 2),  RCAR_GP_PIN(4, 3),
3768077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 4),  RCAR_GP_PIN(4, 5),
3769077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 8),  RCAR_GP_PIN(3, 9),
3770077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
3771077365a9SGeert Uytterhoeven };
3772077365a9SGeert Uytterhoeven 
3773b79813f4SGeert Uytterhoeven static const unsigned int sdhi2_data_mux[] = {
3774077365a9SGeert Uytterhoeven 	SD2_DAT0_MARK, SD2_DAT1_MARK,
3775077365a9SGeert Uytterhoeven 	SD2_DAT2_MARK, SD2_DAT3_MARK,
3776077365a9SGeert Uytterhoeven 	SD2_DAT4_MARK, SD2_DAT5_MARK,
3777077365a9SGeert Uytterhoeven 	SD2_DAT6_MARK, SD2_DAT7_MARK,
3778077365a9SGeert Uytterhoeven };
3779077365a9SGeert Uytterhoeven 
3780077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_pins[] = {
3781077365a9SGeert Uytterhoeven 	/* CLK, CMD */
3782077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
3783077365a9SGeert Uytterhoeven };
3784077365a9SGeert Uytterhoeven 
3785077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_mux[] = {
3786077365a9SGeert Uytterhoeven 	SD2_CLK_MARK, SD2_CMD_MARK,
3787077365a9SGeert Uytterhoeven };
3788077365a9SGeert Uytterhoeven 
3789077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_a_pins[] = {
3790077365a9SGeert Uytterhoeven 	/* CD */
3791077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 13),
3792077365a9SGeert Uytterhoeven };
3793077365a9SGeert Uytterhoeven 
3794077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_a_mux[] = {
3795077365a9SGeert Uytterhoeven 	SD2_CD_A_MARK,
3796077365a9SGeert Uytterhoeven };
3797077365a9SGeert Uytterhoeven 
3798077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_b_pins[] = {
3799077365a9SGeert Uytterhoeven 	/* CD */
3800077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 10),
3801077365a9SGeert Uytterhoeven };
3802077365a9SGeert Uytterhoeven 
3803077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_b_mux[] = {
3804077365a9SGeert Uytterhoeven 	SD2_CD_B_MARK,
3805077365a9SGeert Uytterhoeven };
3806077365a9SGeert Uytterhoeven 
3807077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_a_pins[] = {
3808077365a9SGeert Uytterhoeven 	/* WP */
3809077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 14),
3810077365a9SGeert Uytterhoeven };
3811077365a9SGeert Uytterhoeven 
3812077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_a_mux[] = {
3813077365a9SGeert Uytterhoeven 	SD2_WP_A_MARK,
3814077365a9SGeert Uytterhoeven };
3815077365a9SGeert Uytterhoeven 
3816077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_b_pins[] = {
3817077365a9SGeert Uytterhoeven 	/* WP */
3818077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 11),
3819077365a9SGeert Uytterhoeven };
3820077365a9SGeert Uytterhoeven 
3821077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_b_mux[] = {
3822077365a9SGeert Uytterhoeven 	SD2_WP_B_MARK,
3823077365a9SGeert Uytterhoeven };
3824077365a9SGeert Uytterhoeven 
3825077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ds_pins[] = {
3826077365a9SGeert Uytterhoeven 	/* DS */
3827077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 6),
3828077365a9SGeert Uytterhoeven };
3829077365a9SGeert Uytterhoeven 
3830077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ds_mux[] = {
3831077365a9SGeert Uytterhoeven 	SD2_DS_MARK,
3832077365a9SGeert Uytterhoeven };
3833077365a9SGeert Uytterhoeven 
3834077365a9SGeert Uytterhoeven /* - SDHI3 ------------------------------------------------------------------ */
3835b79813f4SGeert Uytterhoeven static const unsigned int sdhi3_data_pins[] = {
3836077365a9SGeert Uytterhoeven 	/* D[0:7] */
3837077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 9),  RCAR_GP_PIN(4, 10),
3838077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
3839077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14),
3840077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16),
3841077365a9SGeert Uytterhoeven };
3842077365a9SGeert Uytterhoeven 
3843b79813f4SGeert Uytterhoeven static const unsigned int sdhi3_data_mux[] = {
3844077365a9SGeert Uytterhoeven 	SD3_DAT0_MARK, SD3_DAT1_MARK,
3845077365a9SGeert Uytterhoeven 	SD3_DAT2_MARK, SD3_DAT3_MARK,
3846077365a9SGeert Uytterhoeven 	SD3_DAT4_MARK, SD3_DAT5_MARK,
3847077365a9SGeert Uytterhoeven 	SD3_DAT6_MARK, SD3_DAT7_MARK,
3848077365a9SGeert Uytterhoeven };
3849077365a9SGeert Uytterhoeven 
3850077365a9SGeert Uytterhoeven static const unsigned int sdhi3_ctrl_pins[] = {
3851077365a9SGeert Uytterhoeven 	/* CLK, CMD */
3852077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8),
3853077365a9SGeert Uytterhoeven };
3854077365a9SGeert Uytterhoeven 
3855077365a9SGeert Uytterhoeven static const unsigned int sdhi3_ctrl_mux[] = {
3856077365a9SGeert Uytterhoeven 	SD3_CLK_MARK, SD3_CMD_MARK,
3857077365a9SGeert Uytterhoeven };
3858077365a9SGeert Uytterhoeven 
3859077365a9SGeert Uytterhoeven static const unsigned int sdhi3_cd_pins[] = {
3860077365a9SGeert Uytterhoeven 	/* CD */
3861077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 15),
3862077365a9SGeert Uytterhoeven };
3863077365a9SGeert Uytterhoeven 
3864077365a9SGeert Uytterhoeven static const unsigned int sdhi3_cd_mux[] = {
3865077365a9SGeert Uytterhoeven 	SD3_CD_MARK,
3866077365a9SGeert Uytterhoeven };
3867077365a9SGeert Uytterhoeven 
3868077365a9SGeert Uytterhoeven static const unsigned int sdhi3_wp_pins[] = {
3869077365a9SGeert Uytterhoeven 	/* WP */
3870077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 16),
3871077365a9SGeert Uytterhoeven };
3872077365a9SGeert Uytterhoeven 
3873077365a9SGeert Uytterhoeven static const unsigned int sdhi3_wp_mux[] = {
3874077365a9SGeert Uytterhoeven 	SD3_WP_MARK,
3875077365a9SGeert Uytterhoeven };
3876077365a9SGeert Uytterhoeven 
3877077365a9SGeert Uytterhoeven static const unsigned int sdhi3_ds_pins[] = {
3878077365a9SGeert Uytterhoeven 	/* DS */
3879077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(4, 17),
3880077365a9SGeert Uytterhoeven };
3881077365a9SGeert Uytterhoeven 
3882077365a9SGeert Uytterhoeven static const unsigned int sdhi3_ds_mux[] = {
3883077365a9SGeert Uytterhoeven 	SD3_DS_MARK,
3884077365a9SGeert Uytterhoeven };
3885077365a9SGeert Uytterhoeven 
3886077365a9SGeert Uytterhoeven /* - SSI -------------------------------------------------------------------- */
3887077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_pins[] = {
3888077365a9SGeert Uytterhoeven 	/* SDATA */
3889077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 2),
3890077365a9SGeert Uytterhoeven };
3891077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_mux[] = {
3892077365a9SGeert Uytterhoeven 	SSI_SDATA0_MARK,
3893077365a9SGeert Uytterhoeven };
3894077365a9SGeert Uytterhoeven static const unsigned int ssi01239_ctrl_pins[] = {
3895077365a9SGeert Uytterhoeven 	/* SCK, WS */
3896077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
3897077365a9SGeert Uytterhoeven };
3898077365a9SGeert Uytterhoeven static const unsigned int ssi01239_ctrl_mux[] = {
3899077365a9SGeert Uytterhoeven 	SSI_SCK01239_MARK, SSI_WS01239_MARK,
3900077365a9SGeert Uytterhoeven };
3901077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_a_pins[] = {
3902077365a9SGeert Uytterhoeven 	/* SDATA */
3903077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 3),
3904077365a9SGeert Uytterhoeven };
3905077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_a_mux[] = {
3906077365a9SGeert Uytterhoeven 	SSI_SDATA1_A_MARK,
3907077365a9SGeert Uytterhoeven };
3908077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_b_pins[] = {
3909077365a9SGeert Uytterhoeven 	/* SDATA */
3910077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 12),
3911077365a9SGeert Uytterhoeven };
3912077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_b_mux[] = {
3913077365a9SGeert Uytterhoeven 	SSI_SDATA1_B_MARK,
3914077365a9SGeert Uytterhoeven };
3915077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_a_pins[] = {
3916077365a9SGeert Uytterhoeven 	/* SCK, WS */
3917077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
3918077365a9SGeert Uytterhoeven };
3919077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_a_mux[] = {
3920077365a9SGeert Uytterhoeven 	SSI_SCK1_A_MARK, SSI_WS1_A_MARK,
3921077365a9SGeert Uytterhoeven };
3922077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_b_pins[] = {
3923077365a9SGeert Uytterhoeven 	/* SCK, WS */
3924077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 21),
3925077365a9SGeert Uytterhoeven };
3926077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_b_mux[] = {
3927077365a9SGeert Uytterhoeven 	SSI_SCK1_B_MARK, SSI_WS1_B_MARK,
3928077365a9SGeert Uytterhoeven };
3929077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_a_pins[] = {
3930077365a9SGeert Uytterhoeven 	/* SDATA */
3931077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 4),
3932077365a9SGeert Uytterhoeven };
3933077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_a_mux[] = {
3934077365a9SGeert Uytterhoeven 	SSI_SDATA2_A_MARK,
3935077365a9SGeert Uytterhoeven };
3936077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_b_pins[] = {
3937077365a9SGeert Uytterhoeven 	/* SDATA */
3938077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 13),
3939077365a9SGeert Uytterhoeven };
3940077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_b_mux[] = {
3941077365a9SGeert Uytterhoeven 	SSI_SDATA2_B_MARK,
3942077365a9SGeert Uytterhoeven };
3943077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_a_pins[] = {
3944077365a9SGeert Uytterhoeven 	/* SCK, WS */
3945077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21),
3946077365a9SGeert Uytterhoeven };
3947077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_a_mux[] = {
3948077365a9SGeert Uytterhoeven 	SSI_SCK2_A_MARK, SSI_WS2_A_MARK,
3949077365a9SGeert Uytterhoeven };
3950077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_b_pins[] = {
3951077365a9SGeert Uytterhoeven 	/* SCK, WS */
3952077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
3953077365a9SGeert Uytterhoeven };
3954077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_b_mux[] = {
3955077365a9SGeert Uytterhoeven 	SSI_SCK2_B_MARK, SSI_WS2_B_MARK,
3956077365a9SGeert Uytterhoeven };
3957077365a9SGeert Uytterhoeven static const unsigned int ssi3_data_pins[] = {
3958077365a9SGeert Uytterhoeven 	/* SDATA */
3959077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 7),
3960077365a9SGeert Uytterhoeven };
3961077365a9SGeert Uytterhoeven static const unsigned int ssi3_data_mux[] = {
3962077365a9SGeert Uytterhoeven 	SSI_SDATA3_MARK,
3963077365a9SGeert Uytterhoeven };
3964077365a9SGeert Uytterhoeven static const unsigned int ssi349_ctrl_pins[] = {
3965077365a9SGeert Uytterhoeven 	/* SCK, WS */
3966077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6),
3967077365a9SGeert Uytterhoeven };
3968077365a9SGeert Uytterhoeven static const unsigned int ssi349_ctrl_mux[] = {
3969077365a9SGeert Uytterhoeven 	SSI_SCK349_MARK, SSI_WS349_MARK,
3970077365a9SGeert Uytterhoeven };
3971077365a9SGeert Uytterhoeven static const unsigned int ssi4_data_pins[] = {
3972077365a9SGeert Uytterhoeven 	/* SDATA */
3973077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 10),
3974077365a9SGeert Uytterhoeven };
3975077365a9SGeert Uytterhoeven static const unsigned int ssi4_data_mux[] = {
3976077365a9SGeert Uytterhoeven 	SSI_SDATA4_MARK,
3977077365a9SGeert Uytterhoeven };
3978077365a9SGeert Uytterhoeven static const unsigned int ssi4_ctrl_pins[] = {
3979077365a9SGeert Uytterhoeven 	/* SCK, WS */
3980077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
3981077365a9SGeert Uytterhoeven };
3982077365a9SGeert Uytterhoeven static const unsigned int ssi4_ctrl_mux[] = {
3983077365a9SGeert Uytterhoeven 	SSI_SCK4_MARK, SSI_WS4_MARK,
3984077365a9SGeert Uytterhoeven };
3985077365a9SGeert Uytterhoeven static const unsigned int ssi5_data_pins[] = {
3986077365a9SGeert Uytterhoeven 	/* SDATA */
3987077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 13),
3988077365a9SGeert Uytterhoeven };
3989077365a9SGeert Uytterhoeven static const unsigned int ssi5_data_mux[] = {
3990077365a9SGeert Uytterhoeven 	SSI_SDATA5_MARK,
3991077365a9SGeert Uytterhoeven };
3992077365a9SGeert Uytterhoeven static const unsigned int ssi5_ctrl_pins[] = {
3993077365a9SGeert Uytterhoeven 	/* SCK, WS */
3994077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 11), RCAR_GP_PIN(6, 12),
3995077365a9SGeert Uytterhoeven };
3996077365a9SGeert Uytterhoeven static const unsigned int ssi5_ctrl_mux[] = {
3997077365a9SGeert Uytterhoeven 	SSI_SCK5_MARK, SSI_WS5_MARK,
3998077365a9SGeert Uytterhoeven };
3999077365a9SGeert Uytterhoeven static const unsigned int ssi6_data_pins[] = {
4000077365a9SGeert Uytterhoeven 	/* SDATA */
4001077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 16),
4002077365a9SGeert Uytterhoeven };
4003077365a9SGeert Uytterhoeven static const unsigned int ssi6_data_mux[] = {
4004077365a9SGeert Uytterhoeven 	SSI_SDATA6_MARK,
4005077365a9SGeert Uytterhoeven };
4006077365a9SGeert Uytterhoeven static const unsigned int ssi6_ctrl_pins[] = {
4007077365a9SGeert Uytterhoeven 	/* SCK, WS */
4008077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15),
4009077365a9SGeert Uytterhoeven };
4010077365a9SGeert Uytterhoeven static const unsigned int ssi6_ctrl_mux[] = {
4011077365a9SGeert Uytterhoeven 	SSI_SCK6_MARK, SSI_WS6_MARK,
4012077365a9SGeert Uytterhoeven };
4013077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_pins[] = {
4014077365a9SGeert Uytterhoeven 	/* SDATA */
4015077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 19),
4016077365a9SGeert Uytterhoeven };
4017077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_mux[] = {
4018077365a9SGeert Uytterhoeven 	SSI_SDATA7_MARK,
4019077365a9SGeert Uytterhoeven };
4020077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_pins[] = {
4021077365a9SGeert Uytterhoeven 	/* SCK, WS */
4022077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
4023077365a9SGeert Uytterhoeven };
4024077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_mux[] = {
4025077365a9SGeert Uytterhoeven 	SSI_SCK78_MARK, SSI_WS78_MARK,
4026077365a9SGeert Uytterhoeven };
4027077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_pins[] = {
4028077365a9SGeert Uytterhoeven 	/* SDATA */
4029077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 20),
4030077365a9SGeert Uytterhoeven };
4031077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_mux[] = {
4032077365a9SGeert Uytterhoeven 	SSI_SDATA8_MARK,
4033077365a9SGeert Uytterhoeven };
4034077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_a_pins[] = {
4035077365a9SGeert Uytterhoeven 	/* SDATA */
4036077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 21),
4037077365a9SGeert Uytterhoeven };
4038077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_a_mux[] = {
4039077365a9SGeert Uytterhoeven 	SSI_SDATA9_A_MARK,
4040077365a9SGeert Uytterhoeven };
4041077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_b_pins[] = {
4042077365a9SGeert Uytterhoeven 	/* SDATA */
4043077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 14),
4044077365a9SGeert Uytterhoeven };
4045077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_b_mux[] = {
4046077365a9SGeert Uytterhoeven 	SSI_SDATA9_B_MARK,
4047077365a9SGeert Uytterhoeven };
4048077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_a_pins[] = {
4049077365a9SGeert Uytterhoeven 	/* SCK, WS */
4050077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16),
4051077365a9SGeert Uytterhoeven };
4052077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_a_mux[] = {
4053077365a9SGeert Uytterhoeven 	SSI_SCK9_A_MARK, SSI_WS9_A_MARK,
4054077365a9SGeert Uytterhoeven };
4055077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_b_pins[] = {
4056077365a9SGeert Uytterhoeven 	/* SCK, WS */
4057077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
4058077365a9SGeert Uytterhoeven };
4059077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_b_mux[] = {
4060077365a9SGeert Uytterhoeven 	SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
4061077365a9SGeert Uytterhoeven };
4062077365a9SGeert Uytterhoeven 
4063077365a9SGeert Uytterhoeven /* - TMU -------------------------------------------------------------------- */
4064077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_a_pins[] = {
4065077365a9SGeert Uytterhoeven 	/* TCLK */
4066077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 23),
4067077365a9SGeert Uytterhoeven };
4068077365a9SGeert Uytterhoeven 
4069077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_a_mux[] = {
4070077365a9SGeert Uytterhoeven 	TCLK1_A_MARK,
4071077365a9SGeert Uytterhoeven };
4072077365a9SGeert Uytterhoeven 
4073077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_b_pins[] = {
4074077365a9SGeert Uytterhoeven 	/* TCLK */
4075077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(5, 19),
4076077365a9SGeert Uytterhoeven };
4077077365a9SGeert Uytterhoeven 
4078077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_b_mux[] = {
4079077365a9SGeert Uytterhoeven 	TCLK1_B_MARK,
4080077365a9SGeert Uytterhoeven };
4081077365a9SGeert Uytterhoeven 
4082077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_a_pins[] = {
4083077365a9SGeert Uytterhoeven 	/* TCLK */
4084077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 19),
4085077365a9SGeert Uytterhoeven };
4086077365a9SGeert Uytterhoeven 
4087077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_a_mux[] = {
4088077365a9SGeert Uytterhoeven 	TCLK2_A_MARK,
4089077365a9SGeert Uytterhoeven };
4090077365a9SGeert Uytterhoeven 
4091077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_b_pins[] = {
4092077365a9SGeert Uytterhoeven 	/* TCLK */
4093077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 28),
4094077365a9SGeert Uytterhoeven };
4095077365a9SGeert Uytterhoeven 
4096077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_b_mux[] = {
4097077365a9SGeert Uytterhoeven 	TCLK2_B_MARK,
4098077365a9SGeert Uytterhoeven };
4099077365a9SGeert Uytterhoeven 
4100077365a9SGeert Uytterhoeven /* - TPU ------------------------------------------------------------------- */
4101077365a9SGeert Uytterhoeven static const unsigned int tpu_to0_pins[] = {
4102077365a9SGeert Uytterhoeven 	/* TPU0TO0 */
4103077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 28),
4104077365a9SGeert Uytterhoeven };
4105077365a9SGeert Uytterhoeven static const unsigned int tpu_to0_mux[] = {
4106077365a9SGeert Uytterhoeven 	TPU0TO0_MARK,
4107077365a9SGeert Uytterhoeven };
4108077365a9SGeert Uytterhoeven static const unsigned int tpu_to1_pins[] = {
4109077365a9SGeert Uytterhoeven 	/* TPU0TO1 */
4110077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 29),
4111077365a9SGeert Uytterhoeven };
4112077365a9SGeert Uytterhoeven static const unsigned int tpu_to1_mux[] = {
4113077365a9SGeert Uytterhoeven 	TPU0TO1_MARK,
4114077365a9SGeert Uytterhoeven };
4115077365a9SGeert Uytterhoeven static const unsigned int tpu_to2_pins[] = {
4116077365a9SGeert Uytterhoeven 	/* TPU0TO2 */
4117077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 30),
4118077365a9SGeert Uytterhoeven };
4119077365a9SGeert Uytterhoeven static const unsigned int tpu_to2_mux[] = {
4120077365a9SGeert Uytterhoeven 	TPU0TO2_MARK,
4121077365a9SGeert Uytterhoeven };
4122077365a9SGeert Uytterhoeven static const unsigned int tpu_to3_pins[] = {
4123077365a9SGeert Uytterhoeven 	/* TPU0TO3 */
4124077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 31),
4125077365a9SGeert Uytterhoeven };
4126077365a9SGeert Uytterhoeven static const unsigned int tpu_to3_mux[] = {
4127077365a9SGeert Uytterhoeven 	TPU0TO3_MARK,
4128077365a9SGeert Uytterhoeven };
4129077365a9SGeert Uytterhoeven 
4130077365a9SGeert Uytterhoeven /* - USB0 ------------------------------------------------------------------- */
4131077365a9SGeert Uytterhoeven static const unsigned int usb0_pins[] = {
4132077365a9SGeert Uytterhoeven 	/* PWEN, OVC */
4133077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
4134077365a9SGeert Uytterhoeven };
4135077365a9SGeert Uytterhoeven 
4136077365a9SGeert Uytterhoeven static const unsigned int usb0_mux[] = {
4137077365a9SGeert Uytterhoeven 	USB0_PWEN_MARK, USB0_OVC_MARK,
4138077365a9SGeert Uytterhoeven };
4139077365a9SGeert Uytterhoeven 
4140077365a9SGeert Uytterhoeven /* - USB1 ------------------------------------------------------------------- */
4141077365a9SGeert Uytterhoeven static const unsigned int usb1_pins[] = {
4142077365a9SGeert Uytterhoeven 	/* PWEN, OVC */
4143077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
4144077365a9SGeert Uytterhoeven };
4145077365a9SGeert Uytterhoeven 
4146077365a9SGeert Uytterhoeven static const unsigned int usb1_mux[] = {
4147077365a9SGeert Uytterhoeven 	USB1_PWEN_MARK, USB1_OVC_MARK,
4148077365a9SGeert Uytterhoeven };
4149077365a9SGeert Uytterhoeven 
4150077365a9SGeert Uytterhoeven /* - USB30 ------------------------------------------------------------------ */
4151077365a9SGeert Uytterhoeven static const unsigned int usb30_pins[] = {
4152077365a9SGeert Uytterhoeven 	/* PWEN, OVC */
4153077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
4154077365a9SGeert Uytterhoeven };
4155077365a9SGeert Uytterhoeven 
4156077365a9SGeert Uytterhoeven static const unsigned int usb30_mux[] = {
4157077365a9SGeert Uytterhoeven 	USB30_PWEN_MARK, USB30_OVC_MARK,
4158077365a9SGeert Uytterhoeven };
4159077365a9SGeert Uytterhoeven 
4160077365a9SGeert Uytterhoeven /* - VIN4 ------------------------------------------------------------------- */
4161077365a9SGeert Uytterhoeven static const unsigned int vin4_data18_a_pins[] = {
4162077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
4163077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
4164077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
4165077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
4166077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
4167077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
4168077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
4169077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
4170077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
4171077365a9SGeert Uytterhoeven };
4172077365a9SGeert Uytterhoeven 
4173077365a9SGeert Uytterhoeven static const unsigned int vin4_data18_a_mux[] = {
4174077365a9SGeert Uytterhoeven 	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
4175077365a9SGeert Uytterhoeven 	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
4176077365a9SGeert Uytterhoeven 	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
4177077365a9SGeert Uytterhoeven 	VI4_DATA10_MARK, VI4_DATA11_MARK,
4178077365a9SGeert Uytterhoeven 	VI4_DATA12_MARK, VI4_DATA13_MARK,
4179077365a9SGeert Uytterhoeven 	VI4_DATA14_MARK, VI4_DATA15_MARK,
4180077365a9SGeert Uytterhoeven 	VI4_DATA18_MARK, VI4_DATA19_MARK,
4181077365a9SGeert Uytterhoeven 	VI4_DATA20_MARK, VI4_DATA21_MARK,
4182077365a9SGeert Uytterhoeven 	VI4_DATA22_MARK, VI4_DATA23_MARK,
4183077365a9SGeert Uytterhoeven };
4184077365a9SGeert Uytterhoeven 
4185496da100SGeert Uytterhoeven static const unsigned int vin4_data_a_pins[] = {
4186077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 8),  RCAR_GP_PIN(0, 9),
4187077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
4188077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
4189077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
4190077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 0),  RCAR_GP_PIN(1, 1),
4191077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 2),  RCAR_GP_PIN(1, 3),
4192077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
4193077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
4194077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 0),  RCAR_GP_PIN(0, 1),
4195077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 2),  RCAR_GP_PIN(0, 3),
4196077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 4),  RCAR_GP_PIN(0, 5),
4197077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 6),  RCAR_GP_PIN(0, 7),
4198077365a9SGeert Uytterhoeven };
4199077365a9SGeert Uytterhoeven 
4200496da100SGeert Uytterhoeven static const unsigned int vin4_data_a_mux[] = {
4201077365a9SGeert Uytterhoeven 	VI4_DATA0_A_MARK, VI4_DATA1_A_MARK,
4202077365a9SGeert Uytterhoeven 	VI4_DATA2_A_MARK, VI4_DATA3_A_MARK,
4203077365a9SGeert Uytterhoeven 	VI4_DATA4_A_MARK, VI4_DATA5_A_MARK,
4204077365a9SGeert Uytterhoeven 	VI4_DATA6_A_MARK, VI4_DATA7_A_MARK,
4205077365a9SGeert Uytterhoeven 	VI4_DATA8_MARK,   VI4_DATA9_MARK,
4206077365a9SGeert Uytterhoeven 	VI4_DATA10_MARK,  VI4_DATA11_MARK,
4207077365a9SGeert Uytterhoeven 	VI4_DATA12_MARK,  VI4_DATA13_MARK,
4208077365a9SGeert Uytterhoeven 	VI4_DATA14_MARK,  VI4_DATA15_MARK,
4209077365a9SGeert Uytterhoeven 	VI4_DATA16_MARK,  VI4_DATA17_MARK,
4210077365a9SGeert Uytterhoeven 	VI4_DATA18_MARK,  VI4_DATA19_MARK,
4211077365a9SGeert Uytterhoeven 	VI4_DATA20_MARK,  VI4_DATA21_MARK,
4212077365a9SGeert Uytterhoeven 	VI4_DATA22_MARK,  VI4_DATA23_MARK,
4213077365a9SGeert Uytterhoeven };
4214077365a9SGeert Uytterhoeven 
4215077365a9SGeert Uytterhoeven static const unsigned int vin4_data18_b_pins[] = {
4216077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
4217077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
4218077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
4219077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
4220077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
4221077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
4222077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
4223077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
4224077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
4225077365a9SGeert Uytterhoeven };
4226077365a9SGeert Uytterhoeven 
4227077365a9SGeert Uytterhoeven static const unsigned int vin4_data18_b_mux[] = {
4228077365a9SGeert Uytterhoeven 	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
4229077365a9SGeert Uytterhoeven 	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
4230077365a9SGeert Uytterhoeven 	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
4231077365a9SGeert Uytterhoeven 	VI4_DATA10_MARK, VI4_DATA11_MARK,
4232077365a9SGeert Uytterhoeven 	VI4_DATA12_MARK, VI4_DATA13_MARK,
4233077365a9SGeert Uytterhoeven 	VI4_DATA14_MARK, VI4_DATA15_MARK,
4234077365a9SGeert Uytterhoeven 	VI4_DATA18_MARK, VI4_DATA19_MARK,
4235077365a9SGeert Uytterhoeven 	VI4_DATA20_MARK, VI4_DATA21_MARK,
4236077365a9SGeert Uytterhoeven 	VI4_DATA22_MARK, VI4_DATA23_MARK,
4237077365a9SGeert Uytterhoeven };
4238077365a9SGeert Uytterhoeven 
4239496da100SGeert Uytterhoeven static const unsigned int vin4_data_b_pins[] = {
4240077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
4241077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
4242077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
4243077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
4244077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 1),
4245077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
4246077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
4247077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
4248077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
4249077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
4250077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
4251077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
4252077365a9SGeert Uytterhoeven };
4253077365a9SGeert Uytterhoeven 
4254496da100SGeert Uytterhoeven static const unsigned int vin4_data_b_mux[] = {
4255077365a9SGeert Uytterhoeven 	VI4_DATA0_B_MARK, VI4_DATA1_B_MARK,
4256077365a9SGeert Uytterhoeven 	VI4_DATA2_B_MARK, VI4_DATA3_B_MARK,
4257077365a9SGeert Uytterhoeven 	VI4_DATA4_B_MARK, VI4_DATA5_B_MARK,
4258077365a9SGeert Uytterhoeven 	VI4_DATA6_B_MARK, VI4_DATA7_B_MARK,
4259077365a9SGeert Uytterhoeven 	VI4_DATA8_MARK,   VI4_DATA9_MARK,
4260077365a9SGeert Uytterhoeven 	VI4_DATA10_MARK,  VI4_DATA11_MARK,
4261077365a9SGeert Uytterhoeven 	VI4_DATA12_MARK,  VI4_DATA13_MARK,
4262077365a9SGeert Uytterhoeven 	VI4_DATA14_MARK,  VI4_DATA15_MARK,
4263077365a9SGeert Uytterhoeven 	VI4_DATA16_MARK,  VI4_DATA17_MARK,
4264077365a9SGeert Uytterhoeven 	VI4_DATA18_MARK,  VI4_DATA19_MARK,
4265077365a9SGeert Uytterhoeven 	VI4_DATA20_MARK,  VI4_DATA21_MARK,
4266077365a9SGeert Uytterhoeven 	VI4_DATA22_MARK,  VI4_DATA23_MARK,
4267077365a9SGeert Uytterhoeven };
4268077365a9SGeert Uytterhoeven 
4269077365a9SGeert Uytterhoeven static const unsigned int vin4_sync_pins[] = {
4270077365a9SGeert Uytterhoeven 	/* VSYNC_N, HSYNC_N */
4271077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18),
4272077365a9SGeert Uytterhoeven };
4273077365a9SGeert Uytterhoeven 
4274077365a9SGeert Uytterhoeven static const unsigned int vin4_sync_mux[] = {
4275077365a9SGeert Uytterhoeven 	VI4_HSYNC_N_MARK, VI4_VSYNC_N_MARK,
4276077365a9SGeert Uytterhoeven };
4277077365a9SGeert Uytterhoeven 
4278077365a9SGeert Uytterhoeven static const unsigned int vin4_field_pins[] = {
4279077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 16),
4280077365a9SGeert Uytterhoeven };
4281077365a9SGeert Uytterhoeven 
4282077365a9SGeert Uytterhoeven static const unsigned int vin4_field_mux[] = {
4283077365a9SGeert Uytterhoeven 	VI4_FIELD_MARK,
4284077365a9SGeert Uytterhoeven };
4285077365a9SGeert Uytterhoeven 
4286077365a9SGeert Uytterhoeven static const unsigned int vin4_clkenb_pins[] = {
4287077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 19),
4288077365a9SGeert Uytterhoeven };
4289077365a9SGeert Uytterhoeven 
4290077365a9SGeert Uytterhoeven static const unsigned int vin4_clkenb_mux[] = {
4291077365a9SGeert Uytterhoeven 	VI4_CLKENB_MARK,
4292077365a9SGeert Uytterhoeven };
4293077365a9SGeert Uytterhoeven 
4294077365a9SGeert Uytterhoeven static const unsigned int vin4_clk_pins[] = {
4295077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 27),
4296077365a9SGeert Uytterhoeven };
4297077365a9SGeert Uytterhoeven 
4298077365a9SGeert Uytterhoeven static const unsigned int vin4_clk_mux[] = {
4299077365a9SGeert Uytterhoeven 	VI4_CLK_MARK,
4300077365a9SGeert Uytterhoeven };
4301077365a9SGeert Uytterhoeven 
4302077365a9SGeert Uytterhoeven /* - VIN5 ------------------------------------------------------------------- */
4303496da100SGeert Uytterhoeven static const unsigned int vin5_data_pins[] = {
4304077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
4305077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
4306077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
4307077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
4308077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
4309077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
4310077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 4),  RCAR_GP_PIN(1, 5),
4311077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 7),
4312077365a9SGeert Uytterhoeven };
4313077365a9SGeert Uytterhoeven 
4314496da100SGeert Uytterhoeven static const unsigned int vin5_data_mux[] = {
4315077365a9SGeert Uytterhoeven 	VI5_DATA0_MARK, VI5_DATA1_MARK,
4316077365a9SGeert Uytterhoeven 	VI5_DATA2_MARK, VI5_DATA3_MARK,
4317077365a9SGeert Uytterhoeven 	VI5_DATA4_MARK, VI5_DATA5_MARK,
4318077365a9SGeert Uytterhoeven 	VI5_DATA6_MARK, VI5_DATA7_MARK,
4319077365a9SGeert Uytterhoeven 	VI5_DATA8_MARK,  VI5_DATA9_MARK,
4320077365a9SGeert Uytterhoeven 	VI5_DATA10_MARK, VI5_DATA11_MARK,
4321077365a9SGeert Uytterhoeven 	VI5_DATA12_MARK, VI5_DATA13_MARK,
4322077365a9SGeert Uytterhoeven 	VI5_DATA14_MARK, VI5_DATA15_MARK,
4323077365a9SGeert Uytterhoeven };
4324077365a9SGeert Uytterhoeven 
4325077365a9SGeert Uytterhoeven static const unsigned int vin5_sync_pins[] = {
4326077365a9SGeert Uytterhoeven 	/* VSYNC_N, HSYNC_N */
4327077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 10),
4328077365a9SGeert Uytterhoeven };
4329077365a9SGeert Uytterhoeven 
4330077365a9SGeert Uytterhoeven static const unsigned int vin5_sync_mux[] = {
4331077365a9SGeert Uytterhoeven 	VI5_HSYNC_N_MARK, VI5_VSYNC_N_MARK,
4332077365a9SGeert Uytterhoeven };
4333077365a9SGeert Uytterhoeven 
4334077365a9SGeert Uytterhoeven static const unsigned int vin5_field_pins[] = {
4335077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 11),
4336077365a9SGeert Uytterhoeven };
4337077365a9SGeert Uytterhoeven 
4338077365a9SGeert Uytterhoeven static const unsigned int vin5_field_mux[] = {
4339077365a9SGeert Uytterhoeven 	VI5_FIELD_MARK,
4340077365a9SGeert Uytterhoeven };
4341077365a9SGeert Uytterhoeven 
4342077365a9SGeert Uytterhoeven static const unsigned int vin5_clkenb_pins[] = {
4343077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 20),
4344077365a9SGeert Uytterhoeven };
4345077365a9SGeert Uytterhoeven 
4346077365a9SGeert Uytterhoeven static const unsigned int vin5_clkenb_mux[] = {
4347077365a9SGeert Uytterhoeven 	VI5_CLKENB_MARK,
4348077365a9SGeert Uytterhoeven };
4349077365a9SGeert Uytterhoeven 
4350077365a9SGeert Uytterhoeven static const unsigned int vin5_clk_pins[] = {
4351077365a9SGeert Uytterhoeven 	RCAR_GP_PIN(1, 21),
4352077365a9SGeert Uytterhoeven };
4353077365a9SGeert Uytterhoeven 
4354077365a9SGeert Uytterhoeven static const unsigned int vin5_clk_mux[] = {
4355077365a9SGeert Uytterhoeven 	VI5_CLK_MARK,
4356077365a9SGeert Uytterhoeven };
4357077365a9SGeert Uytterhoeven 
4358077365a9SGeert Uytterhoeven static const struct {
4359f7adcca2SNiklas Söderlund 	struct sh_pfc_pin_group common[326];
436074c5fdc5SBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A77965
4361ce34fb3cSAndrey Gusakov 	struct sh_pfc_pin_group automotive[31];
436274c5fdc5SBiju Das #endif
4363077365a9SGeert Uytterhoeven } pinmux_groups = {
4364077365a9SGeert Uytterhoeven 	.common = {
4365077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clk_a_a),
4366077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clk_a_b),
4367077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clk_a_c),
4368077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clk_b_a),
4369077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clk_b_b),
4370077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clk_c_a),
4371077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clk_c_b),
4372077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout_a),
4373077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout_b),
4374077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout_c),
4375077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout_d),
4376077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout1_a),
4377077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout1_b),
4378077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout2_a),
4379077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout2_b),
4380077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout3_a),
4381077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(audio_clkout3_b),
4382077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_link),
4383077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_magic),
4384077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_phy_int),
4385077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP_ALIAS(avb_mdc, avb_mdio),	/* Deprecated */
4386077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_mdio),
4387077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_mii),
4388077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_avtp_pps),
4389077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_avtp_match_a),
4390077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_avtp_capture_a),
4391077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_avtp_match_b),
4392077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(avb_avtp_capture_b),
4393077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(can0_data_a),
4394077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(can0_data_b),
4395077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(can1_data),
4396077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(can_clk),
4397077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(canfd0_data_a),
4398077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(canfd0_data_b),
4399077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(canfd1_data),
4400077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_rgb666),
4401077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_rgb888),
4402077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_clk_out_0),
4403077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_clk_out_1),
4404077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_sync),
4405077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_oddf),
4406077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_cde),
4407077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(du_disp),
4408077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif0_data),
4409077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif0_clk),
4410077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif0_ctrl),
4411077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif1_data_a),
4412077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif1_clk_a),
4413077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif1_ctrl_a),
4414077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif1_data_b),
4415077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif1_clk_b),
4416077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif1_ctrl_b),
4417077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_data_a),
4418077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_clk_a),
4419077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_ctrl_a),
4420077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_data_b),
4421077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_clk_b),
4422077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_ctrl_b),
4423077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_data_c),
4424077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_clk_c),
4425077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif2_ctrl_c),
4426077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif3_data_a),
4427077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif3_clk),
4428077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif3_ctrl),
4429077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif3_data_b),
4430077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif3_data_c),
4431077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif3_data_d),
4432077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif4_data_a),
4433077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif4_clk),
4434077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif4_ctrl),
4435077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(hscif4_data_b),
4436077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c0),
4437077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c1_a),
4438077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c1_b),
4439077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c2_a),
4440077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c2_b),
4441077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c3),
4442077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c5),
4443077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c6_a),
4444077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c6_b),
4445077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(i2c6_c),
4446077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(intc_ex_irq0),
4447077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(intc_ex_irq1),
4448077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(intc_ex_irq2),
4449077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(intc_ex_irq3),
4450077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(intc_ex_irq4),
4451077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(intc_ex_irq5),
4452077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof0_clk),
4453077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof0_sync),
4454077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof0_ss1),
4455077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof0_ss2),
4456077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof0_txd),
4457077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof0_rxd),
4458077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_clk_a),
4459077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_sync_a),
4460077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss1_a),
4461077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss2_a),
4462077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_txd_a),
4463077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_rxd_a),
4464077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_clk_b),
4465077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_sync_b),
4466077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss1_b),
4467077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss2_b),
4468077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_txd_b),
4469077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_rxd_b),
4470077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_clk_c),
4471077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_sync_c),
4472077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss1_c),
4473077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss2_c),
4474077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_txd_c),
4475077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_rxd_c),
4476077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_clk_d),
4477077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_sync_d),
4478077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss1_d),
4479077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss2_d),
4480077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_txd_d),
4481077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_rxd_d),
4482077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_clk_e),
4483077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_sync_e),
4484077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss1_e),
4485077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss2_e),
4486077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_txd_e),
4487077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_rxd_e),
4488077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_clk_f),
4489077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_sync_f),
4490077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss1_f),
4491077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss2_f),
4492077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_txd_f),
4493077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_rxd_f),
4494077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_clk_g),
4495077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_sync_g),
4496077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss1_g),
4497077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_ss2_g),
4498077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_txd_g),
4499077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof1_rxd_g),
4500077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_clk_a),
4501077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_sync_a),
4502077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss1_a),
4503077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss2_a),
4504077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_txd_a),
4505077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_rxd_a),
4506077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_clk_b),
4507077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_sync_b),
4508077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss1_b),
4509077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss2_b),
4510077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_txd_b),
4511077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_rxd_b),
4512077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_clk_c),
4513077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_sync_c),
4514077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss1_c),
4515077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss2_c),
4516077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_txd_c),
4517077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_rxd_c),
4518077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_clk_d),
4519077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_sync_d),
4520077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss1_d),
4521077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_ss2_d),
4522077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_txd_d),
4523077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof2_rxd_d),
4524077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_clk_a),
4525077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_sync_a),
4526077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_ss1_a),
4527077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_ss2_a),
4528077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_txd_a),
4529077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_rxd_a),
4530077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_clk_b),
4531077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_sync_b),
4532077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_ss1_b),
4533077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_ss2_b),
4534077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_txd_b),
4535077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_rxd_b),
4536077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_clk_c),
4537077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_sync_c),
4538077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_txd_c),
4539077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_rxd_c),
4540077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_clk_d),
4541077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_sync_d),
4542077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_ss1_d),
4543077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_txd_d),
4544077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_rxd_d),
4545077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_clk_e),
4546077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_sync_e),
4547077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_ss1_e),
4548077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_ss2_e),
4549077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_txd_e),
4550077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(msiof3_rxd_e),
4551077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm0),
4552077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm1_a),
4553077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm1_b),
4554077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm2_a),
4555077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm2_b),
4556077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm3_a),
4557077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm3_b),
4558077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm4_a),
4559077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm4_b),
4560077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm5_a),
4561077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm5_b),
4562077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm6_a),
4563077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(pwm6_b),
4564ffcd7f81SLad Prabhakar 		SH_PFC_PIN_GROUP(qspi0_ctrl),
45654664b96dSGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(qspi0_data, 2),
45664664b96dSGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(qspi0_data, 4),
4567ffcd7f81SLad Prabhakar 		SH_PFC_PIN_GROUP(qspi1_ctrl),
45684664b96dSGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(qspi1_data, 2),
45694664b96dSGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(qspi1_data, 4),
4570077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sata0_devslp_a),
4571077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sata0_devslp_b),
4572077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif0_data),
4573077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif0_clk),
4574077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif0_ctrl),
4575077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif1_data_a),
4576077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif1_clk),
4577077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif1_ctrl),
4578077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif1_data_b),
4579077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif2_data_a),
4580077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif2_clk),
4581077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif2_data_b),
4582077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif3_data_a),
4583077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif3_clk),
4584077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif3_ctrl),
4585077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif3_data_b),
4586077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_data_a),
4587077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_clk_a),
4588077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_ctrl_a),
4589077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_data_b),
4590077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_clk_b),
4591077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_ctrl_b),
4592077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_data_c),
4593077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_clk_c),
4594077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif4_ctrl_c),
4595077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif5_data_a),
4596077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif5_clk_a),
4597077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif5_data_b),
4598077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif5_clk_b),
4599077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif_clk_a),
4600077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(scif_clk_b),
4601b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi0_data, 1),
4602b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi0_data, 4),
4603077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi0_ctrl),
4604077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi0_cd),
4605077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi0_wp),
4606b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi1_data, 1),
4607b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi1_data, 4),
4608077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi1_ctrl),
4609077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi1_cd),
4610077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi1_wp),
4611b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi2_data, 1),
4612b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi2_data, 4),
4613b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi2_data, 8),
4614077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi2_ctrl),
4615077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi2_cd_a),
4616077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi2_wp_a),
4617077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi2_cd_b),
4618077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi2_wp_b),
4619077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi2_ds),
4620b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi3_data, 1),
4621b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi3_data, 4),
4622b79813f4SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(sdhi3_data, 8),
4623077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi3_ctrl),
4624077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi3_cd),
4625077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi3_wp),
4626077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(sdhi3_ds),
4627077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi0_data),
4628077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi01239_ctrl),
4629077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi1_data_a),
4630077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi1_data_b),
4631077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi1_ctrl_a),
4632077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi1_ctrl_b),
4633077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi2_data_a),
4634077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi2_data_b),
4635077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi2_ctrl_a),
4636077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi2_ctrl_b),
4637077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi3_data),
4638077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi349_ctrl),
4639077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi4_data),
4640077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi4_ctrl),
4641077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi5_data),
4642077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi5_ctrl),
4643077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi6_data),
4644077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi6_ctrl),
4645077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi7_data),
4646077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi78_ctrl),
4647077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi8_data),
4648077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi9_data_a),
4649077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi9_data_b),
4650077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi9_ctrl_a),
4651077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(ssi9_ctrl_b),
4652077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tmu_tclk1_a),
4653077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tmu_tclk1_b),
4654077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tmu_tclk2_a),
4655077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tmu_tclk2_b),
4656077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tpu_to0),
4657077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tpu_to1),
4658077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tpu_to2),
4659077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(tpu_to3),
4660077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(usb0),
4661077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(usb1),
4662077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(usb30),
4663496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 8, _a),
4664496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 10, _a),
4665496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 12, _a),
4666496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 16, _a),
4667077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin4_data18_a),
4668496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 20, _a),
4669496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 24, _a),
4670496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 8, _b),
4671496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 10, _b),
4672496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 12, _b),
4673496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 16, _b),
4674077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin4_data18_b),
4675496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 20, _b),
4676496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin4_data, 24, _b),
4677ed92143aSGeert Uytterhoeven 		SH_PFC_PIN_GROUP_SUBSET(vin4_g8, vin4_data_a, 8, 8),
4678077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin4_sync),
4679077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin4_field),
4680077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin4_clkenb),
4681077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin4_clk),
4682496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin5_data, 8),
4683496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin5_data, 10),
4684496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin5_data, 12),
4685496da100SGeert Uytterhoeven 		BUS_DATA_PIN_GROUP(vin5_data, 16),
4686ed92143aSGeert Uytterhoeven 		SH_PFC_PIN_GROUP_SUBSET(vin5_high8, vin5_data, 8, 8),
4687077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin5_sync),
4688077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin5_field),
4689077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin5_clkenb),
4690077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(vin5_clk),
4691077365a9SGeert Uytterhoeven 	},
469274c5fdc5SBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A77965
4693077365a9SGeert Uytterhoeven 	.automotive = {
4694077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_ctrl_a),
4695077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_data0_a),
4696077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_data1_a),
4697077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_ctrl_b),
4698077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_data0_b),
4699077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_data1_b),
4700077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_ctrl_c),
4701077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_data0_c),
4702077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif0_data1_c),
4703077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_ctrl_a),
4704077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_data0_a),
4705077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_data1_a),
4706077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_ctrl_b),
4707077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_data0_b),
4708077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_data1_b),
4709077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_ctrl_c),
4710077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_data0_c),
4711077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif1_data1_c),
4712077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif2_ctrl_a),
4713077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif2_data0_a),
4714077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif2_data1_a),
4715077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif2_ctrl_b),
4716077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif2_data0_b),
4717077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif2_data1_b),
4718077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif3_ctrl_a),
4719077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif3_data0_a),
4720077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif3_data1_a),
4721077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif3_ctrl_b),
4722077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif3_data0_b),
4723077365a9SGeert Uytterhoeven 		SH_PFC_PIN_GROUP(drif3_data1_b),
4724ce34fb3cSAndrey Gusakov 		SH_PFC_PIN_GROUP(mlb_3pin),
4725077365a9SGeert Uytterhoeven 	}
472674c5fdc5SBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A77965 */
4727077365a9SGeert Uytterhoeven };
4728077365a9SGeert Uytterhoeven 
4729077365a9SGeert Uytterhoeven static const char * const audio_clk_groups[] = {
4730077365a9SGeert Uytterhoeven 	"audio_clk_a_a",
4731077365a9SGeert Uytterhoeven 	"audio_clk_a_b",
4732077365a9SGeert Uytterhoeven 	"audio_clk_a_c",
4733077365a9SGeert Uytterhoeven 	"audio_clk_b_a",
4734077365a9SGeert Uytterhoeven 	"audio_clk_b_b",
4735077365a9SGeert Uytterhoeven 	"audio_clk_c_a",
4736077365a9SGeert Uytterhoeven 	"audio_clk_c_b",
4737077365a9SGeert Uytterhoeven 	"audio_clkout_a",
4738077365a9SGeert Uytterhoeven 	"audio_clkout_b",
4739077365a9SGeert Uytterhoeven 	"audio_clkout_c",
4740077365a9SGeert Uytterhoeven 	"audio_clkout_d",
4741077365a9SGeert Uytterhoeven 	"audio_clkout1_a",
4742077365a9SGeert Uytterhoeven 	"audio_clkout1_b",
4743077365a9SGeert Uytterhoeven 	"audio_clkout2_a",
4744077365a9SGeert Uytterhoeven 	"audio_clkout2_b",
4745077365a9SGeert Uytterhoeven 	"audio_clkout3_a",
4746077365a9SGeert Uytterhoeven 	"audio_clkout3_b",
4747077365a9SGeert Uytterhoeven };
4748077365a9SGeert Uytterhoeven 
4749077365a9SGeert Uytterhoeven static const char * const avb_groups[] = {
4750077365a9SGeert Uytterhoeven 	"avb_link",
4751077365a9SGeert Uytterhoeven 	"avb_magic",
4752077365a9SGeert Uytterhoeven 	"avb_phy_int",
4753077365a9SGeert Uytterhoeven 	"avb_mdc",	/* Deprecated, please use "avb_mdio" instead */
4754077365a9SGeert Uytterhoeven 	"avb_mdio",
4755077365a9SGeert Uytterhoeven 	"avb_mii",
4756077365a9SGeert Uytterhoeven 	"avb_avtp_pps",
4757077365a9SGeert Uytterhoeven 	"avb_avtp_match_a",
4758077365a9SGeert Uytterhoeven 	"avb_avtp_capture_a",
4759077365a9SGeert Uytterhoeven 	"avb_avtp_match_b",
4760077365a9SGeert Uytterhoeven 	"avb_avtp_capture_b",
4761077365a9SGeert Uytterhoeven };
4762077365a9SGeert Uytterhoeven 
4763077365a9SGeert Uytterhoeven static const char * const can0_groups[] = {
4764077365a9SGeert Uytterhoeven 	"can0_data_a",
4765077365a9SGeert Uytterhoeven 	"can0_data_b",
4766077365a9SGeert Uytterhoeven };
4767077365a9SGeert Uytterhoeven 
4768077365a9SGeert Uytterhoeven static const char * const can1_groups[] = {
4769077365a9SGeert Uytterhoeven 	"can1_data",
4770077365a9SGeert Uytterhoeven };
4771077365a9SGeert Uytterhoeven 
4772077365a9SGeert Uytterhoeven static const char * const can_clk_groups[] = {
4773077365a9SGeert Uytterhoeven 	"can_clk",
4774077365a9SGeert Uytterhoeven };
4775077365a9SGeert Uytterhoeven 
4776077365a9SGeert Uytterhoeven static const char * const canfd0_groups[] = {
4777077365a9SGeert Uytterhoeven 	"canfd0_data_a",
4778077365a9SGeert Uytterhoeven 	"canfd0_data_b",
4779077365a9SGeert Uytterhoeven };
4780077365a9SGeert Uytterhoeven 
4781077365a9SGeert Uytterhoeven static const char * const canfd1_groups[] = {
4782077365a9SGeert Uytterhoeven 	"canfd1_data",
4783077365a9SGeert Uytterhoeven };
4784077365a9SGeert Uytterhoeven 
478574c5fdc5SBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A77965
4786077365a9SGeert Uytterhoeven static const char * const drif0_groups[] = {
4787077365a9SGeert Uytterhoeven 	"drif0_ctrl_a",
4788077365a9SGeert Uytterhoeven 	"drif0_data0_a",
4789077365a9SGeert Uytterhoeven 	"drif0_data1_a",
4790077365a9SGeert Uytterhoeven 	"drif0_ctrl_b",
4791077365a9SGeert Uytterhoeven 	"drif0_data0_b",
4792077365a9SGeert Uytterhoeven 	"drif0_data1_b",
4793077365a9SGeert Uytterhoeven 	"drif0_ctrl_c",
4794077365a9SGeert Uytterhoeven 	"drif0_data0_c",
4795077365a9SGeert Uytterhoeven 	"drif0_data1_c",
4796077365a9SGeert Uytterhoeven };
4797077365a9SGeert Uytterhoeven 
4798077365a9SGeert Uytterhoeven static const char * const drif1_groups[] = {
4799077365a9SGeert Uytterhoeven 	"drif1_ctrl_a",
4800077365a9SGeert Uytterhoeven 	"drif1_data0_a",
4801077365a9SGeert Uytterhoeven 	"drif1_data1_a",
4802077365a9SGeert Uytterhoeven 	"drif1_ctrl_b",
4803077365a9SGeert Uytterhoeven 	"drif1_data0_b",
4804077365a9SGeert Uytterhoeven 	"drif1_data1_b",
4805077365a9SGeert Uytterhoeven 	"drif1_ctrl_c",
4806077365a9SGeert Uytterhoeven 	"drif1_data0_c",
4807077365a9SGeert Uytterhoeven 	"drif1_data1_c",
4808077365a9SGeert Uytterhoeven };
4809077365a9SGeert Uytterhoeven 
4810077365a9SGeert Uytterhoeven static const char * const drif2_groups[] = {
4811077365a9SGeert Uytterhoeven 	"drif2_ctrl_a",
4812077365a9SGeert Uytterhoeven 	"drif2_data0_a",
4813077365a9SGeert Uytterhoeven 	"drif2_data1_a",
4814077365a9SGeert Uytterhoeven 	"drif2_ctrl_b",
4815077365a9SGeert Uytterhoeven 	"drif2_data0_b",
4816077365a9SGeert Uytterhoeven 	"drif2_data1_b",
4817077365a9SGeert Uytterhoeven };
4818077365a9SGeert Uytterhoeven 
4819077365a9SGeert Uytterhoeven static const char * const drif3_groups[] = {
4820077365a9SGeert Uytterhoeven 	"drif3_ctrl_a",
4821077365a9SGeert Uytterhoeven 	"drif3_data0_a",
4822077365a9SGeert Uytterhoeven 	"drif3_data1_a",
4823077365a9SGeert Uytterhoeven 	"drif3_ctrl_b",
4824077365a9SGeert Uytterhoeven 	"drif3_data0_b",
4825077365a9SGeert Uytterhoeven 	"drif3_data1_b",
4826077365a9SGeert Uytterhoeven };
482774c5fdc5SBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A77965 */
4828077365a9SGeert Uytterhoeven 
4829077365a9SGeert Uytterhoeven static const char * const du_groups[] = {
4830077365a9SGeert Uytterhoeven 	"du_rgb666",
4831077365a9SGeert Uytterhoeven 	"du_rgb888",
4832077365a9SGeert Uytterhoeven 	"du_clk_out_0",
4833077365a9SGeert Uytterhoeven 	"du_clk_out_1",
4834077365a9SGeert Uytterhoeven 	"du_sync",
4835077365a9SGeert Uytterhoeven 	"du_oddf",
4836077365a9SGeert Uytterhoeven 	"du_cde",
4837077365a9SGeert Uytterhoeven 	"du_disp",
4838077365a9SGeert Uytterhoeven };
4839077365a9SGeert Uytterhoeven 
4840077365a9SGeert Uytterhoeven static const char * const hscif0_groups[] = {
4841077365a9SGeert Uytterhoeven 	"hscif0_data",
4842077365a9SGeert Uytterhoeven 	"hscif0_clk",
4843077365a9SGeert Uytterhoeven 	"hscif0_ctrl",
4844077365a9SGeert Uytterhoeven };
4845077365a9SGeert Uytterhoeven 
4846077365a9SGeert Uytterhoeven static const char * const hscif1_groups[] = {
4847077365a9SGeert Uytterhoeven 	"hscif1_data_a",
4848077365a9SGeert Uytterhoeven 	"hscif1_clk_a",
4849077365a9SGeert Uytterhoeven 	"hscif1_ctrl_a",
4850077365a9SGeert Uytterhoeven 	"hscif1_data_b",
4851077365a9SGeert Uytterhoeven 	"hscif1_clk_b",
4852077365a9SGeert Uytterhoeven 	"hscif1_ctrl_b",
4853077365a9SGeert Uytterhoeven };
4854077365a9SGeert Uytterhoeven 
4855077365a9SGeert Uytterhoeven static const char * const hscif2_groups[] = {
4856077365a9SGeert Uytterhoeven 	"hscif2_data_a",
4857077365a9SGeert Uytterhoeven 	"hscif2_clk_a",
4858077365a9SGeert Uytterhoeven 	"hscif2_ctrl_a",
4859077365a9SGeert Uytterhoeven 	"hscif2_data_b",
4860077365a9SGeert Uytterhoeven 	"hscif2_clk_b",
4861077365a9SGeert Uytterhoeven 	"hscif2_ctrl_b",
4862077365a9SGeert Uytterhoeven 	"hscif2_data_c",
4863077365a9SGeert Uytterhoeven 	"hscif2_clk_c",
4864077365a9SGeert Uytterhoeven 	"hscif2_ctrl_c",
4865077365a9SGeert Uytterhoeven };
4866077365a9SGeert Uytterhoeven 
4867077365a9SGeert Uytterhoeven static const char * const hscif3_groups[] = {
4868077365a9SGeert Uytterhoeven 	"hscif3_data_a",
4869077365a9SGeert Uytterhoeven 	"hscif3_clk",
4870077365a9SGeert Uytterhoeven 	"hscif3_ctrl",
4871077365a9SGeert Uytterhoeven 	"hscif3_data_b",
4872077365a9SGeert Uytterhoeven 	"hscif3_data_c",
4873077365a9SGeert Uytterhoeven 	"hscif3_data_d",
4874077365a9SGeert Uytterhoeven };
4875077365a9SGeert Uytterhoeven 
4876077365a9SGeert Uytterhoeven static const char * const hscif4_groups[] = {
4877077365a9SGeert Uytterhoeven 	"hscif4_data_a",
4878077365a9SGeert Uytterhoeven 	"hscif4_clk",
4879077365a9SGeert Uytterhoeven 	"hscif4_ctrl",
4880077365a9SGeert Uytterhoeven 	"hscif4_data_b",
4881077365a9SGeert Uytterhoeven };
4882077365a9SGeert Uytterhoeven 
4883077365a9SGeert Uytterhoeven static const char * const i2c0_groups[] = {
4884077365a9SGeert Uytterhoeven 	"i2c0",
4885077365a9SGeert Uytterhoeven };
4886077365a9SGeert Uytterhoeven 
4887077365a9SGeert Uytterhoeven static const char * const i2c1_groups[] = {
4888077365a9SGeert Uytterhoeven 	"i2c1_a",
4889077365a9SGeert Uytterhoeven 	"i2c1_b",
4890077365a9SGeert Uytterhoeven };
4891077365a9SGeert Uytterhoeven 
4892077365a9SGeert Uytterhoeven static const char * const i2c2_groups[] = {
4893077365a9SGeert Uytterhoeven 	"i2c2_a",
4894077365a9SGeert Uytterhoeven 	"i2c2_b",
4895077365a9SGeert Uytterhoeven };
4896077365a9SGeert Uytterhoeven 
4897077365a9SGeert Uytterhoeven static const char * const i2c3_groups[] = {
4898077365a9SGeert Uytterhoeven 	"i2c3",
4899077365a9SGeert Uytterhoeven };
4900077365a9SGeert Uytterhoeven 
4901077365a9SGeert Uytterhoeven static const char * const i2c5_groups[] = {
4902077365a9SGeert Uytterhoeven 	"i2c5",
4903077365a9SGeert Uytterhoeven };
4904077365a9SGeert Uytterhoeven 
4905077365a9SGeert Uytterhoeven static const char * const i2c6_groups[] = {
4906077365a9SGeert Uytterhoeven 	"i2c6_a",
4907077365a9SGeert Uytterhoeven 	"i2c6_b",
4908077365a9SGeert Uytterhoeven 	"i2c6_c",
4909077365a9SGeert Uytterhoeven };
4910077365a9SGeert Uytterhoeven 
4911077365a9SGeert Uytterhoeven static const char * const intc_ex_groups[] = {
4912077365a9SGeert Uytterhoeven 	"intc_ex_irq0",
4913077365a9SGeert Uytterhoeven 	"intc_ex_irq1",
4914077365a9SGeert Uytterhoeven 	"intc_ex_irq2",
4915077365a9SGeert Uytterhoeven 	"intc_ex_irq3",
4916077365a9SGeert Uytterhoeven 	"intc_ex_irq4",
4917077365a9SGeert Uytterhoeven 	"intc_ex_irq5",
4918077365a9SGeert Uytterhoeven };
4919077365a9SGeert Uytterhoeven 
4920ce34fb3cSAndrey Gusakov #ifdef CONFIG_PINCTRL_PFC_R8A77965
4921ce34fb3cSAndrey Gusakov static const char * const mlb_3pin_groups[] = {
4922ce34fb3cSAndrey Gusakov 	"mlb_3pin",
4923ce34fb3cSAndrey Gusakov };
4924ce34fb3cSAndrey Gusakov #endif /* CONFIG_PINCTRL_PFC_R8A77965 */
4925ce34fb3cSAndrey Gusakov 
4926077365a9SGeert Uytterhoeven static const char * const msiof0_groups[] = {
4927077365a9SGeert Uytterhoeven 	"msiof0_clk",
4928077365a9SGeert Uytterhoeven 	"msiof0_sync",
4929077365a9SGeert Uytterhoeven 	"msiof0_ss1",
4930077365a9SGeert Uytterhoeven 	"msiof0_ss2",
4931077365a9SGeert Uytterhoeven 	"msiof0_txd",
4932077365a9SGeert Uytterhoeven 	"msiof0_rxd",
4933077365a9SGeert Uytterhoeven };
4934077365a9SGeert Uytterhoeven 
4935077365a9SGeert Uytterhoeven static const char * const msiof1_groups[] = {
4936077365a9SGeert Uytterhoeven 	"msiof1_clk_a",
4937077365a9SGeert Uytterhoeven 	"msiof1_sync_a",
4938077365a9SGeert Uytterhoeven 	"msiof1_ss1_a",
4939077365a9SGeert Uytterhoeven 	"msiof1_ss2_a",
4940077365a9SGeert Uytterhoeven 	"msiof1_txd_a",
4941077365a9SGeert Uytterhoeven 	"msiof1_rxd_a",
4942077365a9SGeert Uytterhoeven 	"msiof1_clk_b",
4943077365a9SGeert Uytterhoeven 	"msiof1_sync_b",
4944077365a9SGeert Uytterhoeven 	"msiof1_ss1_b",
4945077365a9SGeert Uytterhoeven 	"msiof1_ss2_b",
4946077365a9SGeert Uytterhoeven 	"msiof1_txd_b",
4947077365a9SGeert Uytterhoeven 	"msiof1_rxd_b",
4948077365a9SGeert Uytterhoeven 	"msiof1_clk_c",
4949077365a9SGeert Uytterhoeven 	"msiof1_sync_c",
4950077365a9SGeert Uytterhoeven 	"msiof1_ss1_c",
4951077365a9SGeert Uytterhoeven 	"msiof1_ss2_c",
4952077365a9SGeert Uytterhoeven 	"msiof1_txd_c",
4953077365a9SGeert Uytterhoeven 	"msiof1_rxd_c",
4954077365a9SGeert Uytterhoeven 	"msiof1_clk_d",
4955077365a9SGeert Uytterhoeven 	"msiof1_sync_d",
4956077365a9SGeert Uytterhoeven 	"msiof1_ss1_d",
4957077365a9SGeert Uytterhoeven 	"msiof1_ss2_d",
4958077365a9SGeert Uytterhoeven 	"msiof1_txd_d",
4959077365a9SGeert Uytterhoeven 	"msiof1_rxd_d",
4960077365a9SGeert Uytterhoeven 	"msiof1_clk_e",
4961077365a9SGeert Uytterhoeven 	"msiof1_sync_e",
4962077365a9SGeert Uytterhoeven 	"msiof1_ss1_e",
4963077365a9SGeert Uytterhoeven 	"msiof1_ss2_e",
4964077365a9SGeert Uytterhoeven 	"msiof1_txd_e",
4965077365a9SGeert Uytterhoeven 	"msiof1_rxd_e",
4966077365a9SGeert Uytterhoeven 	"msiof1_clk_f",
4967077365a9SGeert Uytterhoeven 	"msiof1_sync_f",
4968077365a9SGeert Uytterhoeven 	"msiof1_ss1_f",
4969077365a9SGeert Uytterhoeven 	"msiof1_ss2_f",
4970077365a9SGeert Uytterhoeven 	"msiof1_txd_f",
4971077365a9SGeert Uytterhoeven 	"msiof1_rxd_f",
4972077365a9SGeert Uytterhoeven 	"msiof1_clk_g",
4973077365a9SGeert Uytterhoeven 	"msiof1_sync_g",
4974077365a9SGeert Uytterhoeven 	"msiof1_ss1_g",
4975077365a9SGeert Uytterhoeven 	"msiof1_ss2_g",
4976077365a9SGeert Uytterhoeven 	"msiof1_txd_g",
4977077365a9SGeert Uytterhoeven 	"msiof1_rxd_g",
4978077365a9SGeert Uytterhoeven };
4979077365a9SGeert Uytterhoeven 
4980077365a9SGeert Uytterhoeven static const char * const msiof2_groups[] = {
4981077365a9SGeert Uytterhoeven 	"msiof2_clk_a",
4982077365a9SGeert Uytterhoeven 	"msiof2_sync_a",
4983077365a9SGeert Uytterhoeven 	"msiof2_ss1_a",
4984077365a9SGeert Uytterhoeven 	"msiof2_ss2_a",
4985077365a9SGeert Uytterhoeven 	"msiof2_txd_a",
4986077365a9SGeert Uytterhoeven 	"msiof2_rxd_a",
4987077365a9SGeert Uytterhoeven 	"msiof2_clk_b",
4988077365a9SGeert Uytterhoeven 	"msiof2_sync_b",
4989077365a9SGeert Uytterhoeven 	"msiof2_ss1_b",
4990077365a9SGeert Uytterhoeven 	"msiof2_ss2_b",
4991077365a9SGeert Uytterhoeven 	"msiof2_txd_b",
4992077365a9SGeert Uytterhoeven 	"msiof2_rxd_b",
4993077365a9SGeert Uytterhoeven 	"msiof2_clk_c",
4994077365a9SGeert Uytterhoeven 	"msiof2_sync_c",
4995077365a9SGeert Uytterhoeven 	"msiof2_ss1_c",
4996077365a9SGeert Uytterhoeven 	"msiof2_ss2_c",
4997077365a9SGeert Uytterhoeven 	"msiof2_txd_c",
4998077365a9SGeert Uytterhoeven 	"msiof2_rxd_c",
4999077365a9SGeert Uytterhoeven 	"msiof2_clk_d",
5000077365a9SGeert Uytterhoeven 	"msiof2_sync_d",
5001077365a9SGeert Uytterhoeven 	"msiof2_ss1_d",
5002077365a9SGeert Uytterhoeven 	"msiof2_ss2_d",
5003077365a9SGeert Uytterhoeven 	"msiof2_txd_d",
5004077365a9SGeert Uytterhoeven 	"msiof2_rxd_d",
5005077365a9SGeert Uytterhoeven };
5006077365a9SGeert Uytterhoeven 
5007077365a9SGeert Uytterhoeven static const char * const msiof3_groups[] = {
5008077365a9SGeert Uytterhoeven 	"msiof3_clk_a",
5009077365a9SGeert Uytterhoeven 	"msiof3_sync_a",
5010077365a9SGeert Uytterhoeven 	"msiof3_ss1_a",
5011077365a9SGeert Uytterhoeven 	"msiof3_ss2_a",
5012077365a9SGeert Uytterhoeven 	"msiof3_txd_a",
5013077365a9SGeert Uytterhoeven 	"msiof3_rxd_a",
5014077365a9SGeert Uytterhoeven 	"msiof3_clk_b",
5015077365a9SGeert Uytterhoeven 	"msiof3_sync_b",
5016077365a9SGeert Uytterhoeven 	"msiof3_ss1_b",
5017077365a9SGeert Uytterhoeven 	"msiof3_ss2_b",
5018077365a9SGeert Uytterhoeven 	"msiof3_txd_b",
5019077365a9SGeert Uytterhoeven 	"msiof3_rxd_b",
5020077365a9SGeert Uytterhoeven 	"msiof3_clk_c",
5021077365a9SGeert Uytterhoeven 	"msiof3_sync_c",
5022077365a9SGeert Uytterhoeven 	"msiof3_txd_c",
5023077365a9SGeert Uytterhoeven 	"msiof3_rxd_c",
5024077365a9SGeert Uytterhoeven 	"msiof3_clk_d",
5025077365a9SGeert Uytterhoeven 	"msiof3_sync_d",
5026077365a9SGeert Uytterhoeven 	"msiof3_ss1_d",
5027077365a9SGeert Uytterhoeven 	"msiof3_txd_d",
5028077365a9SGeert Uytterhoeven 	"msiof3_rxd_d",
5029077365a9SGeert Uytterhoeven 	"msiof3_clk_e",
5030077365a9SGeert Uytterhoeven 	"msiof3_sync_e",
5031077365a9SGeert Uytterhoeven 	"msiof3_ss1_e",
5032077365a9SGeert Uytterhoeven 	"msiof3_ss2_e",
5033077365a9SGeert Uytterhoeven 	"msiof3_txd_e",
5034077365a9SGeert Uytterhoeven 	"msiof3_rxd_e",
5035077365a9SGeert Uytterhoeven };
5036077365a9SGeert Uytterhoeven 
5037077365a9SGeert Uytterhoeven static const char * const pwm0_groups[] = {
5038077365a9SGeert Uytterhoeven 	"pwm0",
5039077365a9SGeert Uytterhoeven };
5040077365a9SGeert Uytterhoeven 
5041077365a9SGeert Uytterhoeven static const char * const pwm1_groups[] = {
5042077365a9SGeert Uytterhoeven 	"pwm1_a",
5043077365a9SGeert Uytterhoeven 	"pwm1_b",
5044077365a9SGeert Uytterhoeven };
5045077365a9SGeert Uytterhoeven 
5046077365a9SGeert Uytterhoeven static const char * const pwm2_groups[] = {
5047077365a9SGeert Uytterhoeven 	"pwm2_a",
5048077365a9SGeert Uytterhoeven 	"pwm2_b",
5049077365a9SGeert Uytterhoeven };
5050077365a9SGeert Uytterhoeven 
5051077365a9SGeert Uytterhoeven static const char * const pwm3_groups[] = {
5052077365a9SGeert Uytterhoeven 	"pwm3_a",
5053077365a9SGeert Uytterhoeven 	"pwm3_b",
5054077365a9SGeert Uytterhoeven };
5055077365a9SGeert Uytterhoeven 
5056077365a9SGeert Uytterhoeven static const char * const pwm4_groups[] = {
5057077365a9SGeert Uytterhoeven 	"pwm4_a",
5058077365a9SGeert Uytterhoeven 	"pwm4_b",
5059077365a9SGeert Uytterhoeven };
5060077365a9SGeert Uytterhoeven 
5061077365a9SGeert Uytterhoeven static const char * const pwm5_groups[] = {
5062077365a9SGeert Uytterhoeven 	"pwm5_a",
5063077365a9SGeert Uytterhoeven 	"pwm5_b",
5064077365a9SGeert Uytterhoeven };
5065077365a9SGeert Uytterhoeven 
5066077365a9SGeert Uytterhoeven static const char * const pwm6_groups[] = {
5067077365a9SGeert Uytterhoeven 	"pwm6_a",
5068077365a9SGeert Uytterhoeven 	"pwm6_b",
5069077365a9SGeert Uytterhoeven };
5070077365a9SGeert Uytterhoeven 
5071ffcd7f81SLad Prabhakar static const char * const qspi0_groups[] = {
5072ffcd7f81SLad Prabhakar 	"qspi0_ctrl",
5073ffcd7f81SLad Prabhakar 	"qspi0_data2",
5074ffcd7f81SLad Prabhakar 	"qspi0_data4",
5075ffcd7f81SLad Prabhakar };
5076ffcd7f81SLad Prabhakar 
5077ffcd7f81SLad Prabhakar static const char * const qspi1_groups[] = {
5078ffcd7f81SLad Prabhakar 	"qspi1_ctrl",
5079ffcd7f81SLad Prabhakar 	"qspi1_data2",
5080ffcd7f81SLad Prabhakar 	"qspi1_data4",
5081ffcd7f81SLad Prabhakar };
5082ffcd7f81SLad Prabhakar 
5083077365a9SGeert Uytterhoeven static const char * const sata0_groups[] = {
5084077365a9SGeert Uytterhoeven 	"sata0_devslp_a",
5085077365a9SGeert Uytterhoeven 	"sata0_devslp_b",
5086077365a9SGeert Uytterhoeven };
5087077365a9SGeert Uytterhoeven 
5088077365a9SGeert Uytterhoeven static const char * const scif0_groups[] = {
5089077365a9SGeert Uytterhoeven 	"scif0_data",
5090077365a9SGeert Uytterhoeven 	"scif0_clk",
5091077365a9SGeert Uytterhoeven 	"scif0_ctrl",
5092077365a9SGeert Uytterhoeven };
5093077365a9SGeert Uytterhoeven 
5094077365a9SGeert Uytterhoeven static const char * const scif1_groups[] = {
5095077365a9SGeert Uytterhoeven 	"scif1_data_a",
5096077365a9SGeert Uytterhoeven 	"scif1_clk",
5097077365a9SGeert Uytterhoeven 	"scif1_ctrl",
5098077365a9SGeert Uytterhoeven 	"scif1_data_b",
5099077365a9SGeert Uytterhoeven };
5100077365a9SGeert Uytterhoeven static const char * const scif2_groups[] = {
5101077365a9SGeert Uytterhoeven 	"scif2_data_a",
5102077365a9SGeert Uytterhoeven 	"scif2_clk",
5103077365a9SGeert Uytterhoeven 	"scif2_data_b",
5104077365a9SGeert Uytterhoeven };
5105077365a9SGeert Uytterhoeven 
5106077365a9SGeert Uytterhoeven static const char * const scif3_groups[] = {
5107077365a9SGeert Uytterhoeven 	"scif3_data_a",
5108077365a9SGeert Uytterhoeven 	"scif3_clk",
5109077365a9SGeert Uytterhoeven 	"scif3_ctrl",
5110077365a9SGeert Uytterhoeven 	"scif3_data_b",
5111077365a9SGeert Uytterhoeven };
5112077365a9SGeert Uytterhoeven 
5113077365a9SGeert Uytterhoeven static const char * const scif4_groups[] = {
5114077365a9SGeert Uytterhoeven 	"scif4_data_a",
5115077365a9SGeert Uytterhoeven 	"scif4_clk_a",
5116077365a9SGeert Uytterhoeven 	"scif4_ctrl_a",
5117077365a9SGeert Uytterhoeven 	"scif4_data_b",
5118077365a9SGeert Uytterhoeven 	"scif4_clk_b",
5119077365a9SGeert Uytterhoeven 	"scif4_ctrl_b",
5120077365a9SGeert Uytterhoeven 	"scif4_data_c",
5121077365a9SGeert Uytterhoeven 	"scif4_clk_c",
5122077365a9SGeert Uytterhoeven 	"scif4_ctrl_c",
5123077365a9SGeert Uytterhoeven };
5124077365a9SGeert Uytterhoeven 
5125077365a9SGeert Uytterhoeven static const char * const scif5_groups[] = {
5126077365a9SGeert Uytterhoeven 	"scif5_data_a",
5127077365a9SGeert Uytterhoeven 	"scif5_clk_a",
5128077365a9SGeert Uytterhoeven 	"scif5_data_b",
5129077365a9SGeert Uytterhoeven 	"scif5_clk_b",
5130077365a9SGeert Uytterhoeven };
5131077365a9SGeert Uytterhoeven 
5132077365a9SGeert Uytterhoeven static const char * const scif_clk_groups[] = {
5133077365a9SGeert Uytterhoeven 	"scif_clk_a",
5134077365a9SGeert Uytterhoeven 	"scif_clk_b",
5135077365a9SGeert Uytterhoeven };
5136077365a9SGeert Uytterhoeven 
5137077365a9SGeert Uytterhoeven static const char * const sdhi0_groups[] = {
5138077365a9SGeert Uytterhoeven 	"sdhi0_data1",
5139077365a9SGeert Uytterhoeven 	"sdhi0_data4",
5140077365a9SGeert Uytterhoeven 	"sdhi0_ctrl",
5141077365a9SGeert Uytterhoeven 	"sdhi0_cd",
5142077365a9SGeert Uytterhoeven 	"sdhi0_wp",
5143077365a9SGeert Uytterhoeven };
5144077365a9SGeert Uytterhoeven 
5145077365a9SGeert Uytterhoeven static const char * const sdhi1_groups[] = {
5146077365a9SGeert Uytterhoeven 	"sdhi1_data1",
5147077365a9SGeert Uytterhoeven 	"sdhi1_data4",
5148077365a9SGeert Uytterhoeven 	"sdhi1_ctrl",
5149077365a9SGeert Uytterhoeven 	"sdhi1_cd",
5150077365a9SGeert Uytterhoeven 	"sdhi1_wp",
5151077365a9SGeert Uytterhoeven };
5152077365a9SGeert Uytterhoeven 
5153077365a9SGeert Uytterhoeven static const char * const sdhi2_groups[] = {
5154077365a9SGeert Uytterhoeven 	"sdhi2_data1",
5155077365a9SGeert Uytterhoeven 	"sdhi2_data4",
5156077365a9SGeert Uytterhoeven 	"sdhi2_data8",
5157077365a9SGeert Uytterhoeven 	"sdhi2_ctrl",
5158077365a9SGeert Uytterhoeven 	"sdhi2_cd_a",
5159077365a9SGeert Uytterhoeven 	"sdhi2_wp_a",
5160077365a9SGeert Uytterhoeven 	"sdhi2_cd_b",
5161077365a9SGeert Uytterhoeven 	"sdhi2_wp_b",
5162077365a9SGeert Uytterhoeven 	"sdhi2_ds",
5163077365a9SGeert Uytterhoeven };
5164077365a9SGeert Uytterhoeven 
5165077365a9SGeert Uytterhoeven static const char * const sdhi3_groups[] = {
5166077365a9SGeert Uytterhoeven 	"sdhi3_data1",
5167077365a9SGeert Uytterhoeven 	"sdhi3_data4",
5168077365a9SGeert Uytterhoeven 	"sdhi3_data8",
5169077365a9SGeert Uytterhoeven 	"sdhi3_ctrl",
5170077365a9SGeert Uytterhoeven 	"sdhi3_cd",
5171077365a9SGeert Uytterhoeven 	"sdhi3_wp",
5172077365a9SGeert Uytterhoeven 	"sdhi3_ds",
5173077365a9SGeert Uytterhoeven };
5174077365a9SGeert Uytterhoeven 
5175077365a9SGeert Uytterhoeven static const char * const ssi_groups[] = {
5176077365a9SGeert Uytterhoeven 	"ssi0_data",
5177077365a9SGeert Uytterhoeven 	"ssi01239_ctrl",
5178077365a9SGeert Uytterhoeven 	"ssi1_data_a",
5179077365a9SGeert Uytterhoeven 	"ssi1_data_b",
5180077365a9SGeert Uytterhoeven 	"ssi1_ctrl_a",
5181077365a9SGeert Uytterhoeven 	"ssi1_ctrl_b",
5182077365a9SGeert Uytterhoeven 	"ssi2_data_a",
5183077365a9SGeert Uytterhoeven 	"ssi2_data_b",
5184077365a9SGeert Uytterhoeven 	"ssi2_ctrl_a",
5185077365a9SGeert Uytterhoeven 	"ssi2_ctrl_b",
5186077365a9SGeert Uytterhoeven 	"ssi3_data",
5187077365a9SGeert Uytterhoeven 	"ssi349_ctrl",
5188077365a9SGeert Uytterhoeven 	"ssi4_data",
5189077365a9SGeert Uytterhoeven 	"ssi4_ctrl",
5190077365a9SGeert Uytterhoeven 	"ssi5_data",
5191077365a9SGeert Uytterhoeven 	"ssi5_ctrl",
5192077365a9SGeert Uytterhoeven 	"ssi6_data",
5193077365a9SGeert Uytterhoeven 	"ssi6_ctrl",
5194077365a9SGeert Uytterhoeven 	"ssi7_data",
5195077365a9SGeert Uytterhoeven 	"ssi78_ctrl",
5196077365a9SGeert Uytterhoeven 	"ssi8_data",
5197077365a9SGeert Uytterhoeven 	"ssi9_data_a",
5198077365a9SGeert Uytterhoeven 	"ssi9_data_b",
5199077365a9SGeert Uytterhoeven 	"ssi9_ctrl_a",
5200077365a9SGeert Uytterhoeven 	"ssi9_ctrl_b",
5201077365a9SGeert Uytterhoeven };
5202077365a9SGeert Uytterhoeven 
5203077365a9SGeert Uytterhoeven static const char * const tmu_groups[] = {
5204077365a9SGeert Uytterhoeven 	"tmu_tclk1_a",
5205077365a9SGeert Uytterhoeven 	"tmu_tclk1_b",
5206077365a9SGeert Uytterhoeven 	"tmu_tclk2_a",
5207077365a9SGeert Uytterhoeven 	"tmu_tclk2_b",
5208077365a9SGeert Uytterhoeven };
5209077365a9SGeert Uytterhoeven 
5210077365a9SGeert Uytterhoeven static const char * const tpu_groups[] = {
5211077365a9SGeert Uytterhoeven 	"tpu_to0",
5212077365a9SGeert Uytterhoeven 	"tpu_to1",
5213077365a9SGeert Uytterhoeven 	"tpu_to2",
5214077365a9SGeert Uytterhoeven 	"tpu_to3",
5215077365a9SGeert Uytterhoeven };
5216077365a9SGeert Uytterhoeven 
5217077365a9SGeert Uytterhoeven static const char * const usb0_groups[] = {
5218077365a9SGeert Uytterhoeven 	"usb0",
5219077365a9SGeert Uytterhoeven };
5220077365a9SGeert Uytterhoeven 
5221077365a9SGeert Uytterhoeven static const char * const usb1_groups[] = {
5222077365a9SGeert Uytterhoeven 	"usb1",
5223077365a9SGeert Uytterhoeven };
5224077365a9SGeert Uytterhoeven 
5225077365a9SGeert Uytterhoeven static const char * const usb30_groups[] = {
5226077365a9SGeert Uytterhoeven 	"usb30",
5227077365a9SGeert Uytterhoeven };
5228077365a9SGeert Uytterhoeven 
5229077365a9SGeert Uytterhoeven static const char * const vin4_groups[] = {
5230077365a9SGeert Uytterhoeven 	"vin4_data8_a",
5231077365a9SGeert Uytterhoeven 	"vin4_data10_a",
5232077365a9SGeert Uytterhoeven 	"vin4_data12_a",
5233077365a9SGeert Uytterhoeven 	"vin4_data16_a",
5234077365a9SGeert Uytterhoeven 	"vin4_data18_a",
5235077365a9SGeert Uytterhoeven 	"vin4_data20_a",
5236077365a9SGeert Uytterhoeven 	"vin4_data24_a",
5237077365a9SGeert Uytterhoeven 	"vin4_data8_b",
5238077365a9SGeert Uytterhoeven 	"vin4_data10_b",
5239077365a9SGeert Uytterhoeven 	"vin4_data12_b",
5240077365a9SGeert Uytterhoeven 	"vin4_data16_b",
5241077365a9SGeert Uytterhoeven 	"vin4_data18_b",
5242077365a9SGeert Uytterhoeven 	"vin4_data20_b",
5243077365a9SGeert Uytterhoeven 	"vin4_data24_b",
5244f7adcca2SNiklas Söderlund 	"vin4_g8",
5245077365a9SGeert Uytterhoeven 	"vin4_sync",
5246077365a9SGeert Uytterhoeven 	"vin4_field",
5247077365a9SGeert Uytterhoeven 	"vin4_clkenb",
5248077365a9SGeert Uytterhoeven 	"vin4_clk",
5249077365a9SGeert Uytterhoeven };
5250077365a9SGeert Uytterhoeven 
5251077365a9SGeert Uytterhoeven static const char * const vin5_groups[] = {
5252077365a9SGeert Uytterhoeven 	"vin5_data8",
5253077365a9SGeert Uytterhoeven 	"vin5_data10",
5254077365a9SGeert Uytterhoeven 	"vin5_data12",
5255077365a9SGeert Uytterhoeven 	"vin5_data16",
5256f7adcca2SNiklas Söderlund 	"vin5_high8",
5257077365a9SGeert Uytterhoeven 	"vin5_sync",
5258077365a9SGeert Uytterhoeven 	"vin5_field",
5259077365a9SGeert Uytterhoeven 	"vin5_clkenb",
5260077365a9SGeert Uytterhoeven 	"vin5_clk",
5261077365a9SGeert Uytterhoeven };
5262077365a9SGeert Uytterhoeven 
5263077365a9SGeert Uytterhoeven static const struct {
5264ffcd7f81SLad Prabhakar 	struct sh_pfc_function common[53];
526574c5fdc5SBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A77965
5266ce34fb3cSAndrey Gusakov 	struct sh_pfc_function automotive[5];
526774c5fdc5SBiju Das #endif
5268077365a9SGeert Uytterhoeven } pinmux_functions = {
5269077365a9SGeert Uytterhoeven 	.common = {
5270077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(audio_clk),
5271077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(avb),
5272077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(can0),
5273077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(can1),
5274077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(can_clk),
5275077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(canfd0),
5276077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(canfd1),
5277077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(du),
5278077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(hscif0),
5279077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(hscif1),
5280077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(hscif2),
5281077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(hscif3),
5282077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(hscif4),
5283077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(i2c0),
5284077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(i2c1),
5285077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(i2c2),
5286077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(i2c3),
5287077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(i2c5),
5288077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(i2c6),
5289077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(intc_ex),
5290077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(msiof0),
5291077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(msiof1),
5292077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(msiof2),
5293077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(msiof3),
5294077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(pwm0),
5295077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(pwm1),
5296077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(pwm2),
5297077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(pwm3),
5298077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(pwm4),
5299077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(pwm5),
5300077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(pwm6),
5301ffcd7f81SLad Prabhakar 		SH_PFC_FUNCTION(qspi0),
5302ffcd7f81SLad Prabhakar 		SH_PFC_FUNCTION(qspi1),
5303077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(sata0),
5304077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(scif0),
5305077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(scif1),
5306077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(scif2),
5307077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(scif3),
5308077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(scif4),
5309077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(scif5),
5310077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(scif_clk),
5311077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(sdhi0),
5312077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(sdhi1),
5313077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(sdhi2),
5314077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(sdhi3),
5315077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(ssi),
5316077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(tmu),
5317077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(tpu),
5318077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(usb0),
5319077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(usb1),
5320077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(usb30),
5321077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(vin4),
5322077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(vin5),
5323077365a9SGeert Uytterhoeven 	},
532474c5fdc5SBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A77965
5325077365a9SGeert Uytterhoeven 	.automotive = {
5326077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(drif0),
5327077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(drif1),
5328077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(drif2),
5329077365a9SGeert Uytterhoeven 		SH_PFC_FUNCTION(drif3),
5330ce34fb3cSAndrey Gusakov 		SH_PFC_FUNCTION(mlb_3pin),
5331077365a9SGeert Uytterhoeven 	}
533274c5fdc5SBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A77965 */
5333077365a9SGeert Uytterhoeven };
5334077365a9SGeert Uytterhoeven 
5335077365a9SGeert Uytterhoeven static const struct pinmux_cfg_reg pinmux_config_regs[] = {
5336077365a9SGeert Uytterhoeven #define F_(x, y)	FN_##y
5337077365a9SGeert Uytterhoeven #define FM(x)		FN_##x
5338efd5ee63SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("GPSR0", 0xe6060100, 32,
5339efd5ee63SGeert Uytterhoeven 			     GROUP(-16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
5340efd5ee63SGeert Uytterhoeven 				   1, 1, 1, 1, 1),
5341efd5ee63SGeert Uytterhoeven 			     GROUP(
5342efd5ee63SGeert Uytterhoeven 		/* GP0_31_16 RESERVED */
5343077365a9SGeert Uytterhoeven 		GP_0_15_FN,	GPSR0_15,
5344077365a9SGeert Uytterhoeven 		GP_0_14_FN,	GPSR0_14,
5345077365a9SGeert Uytterhoeven 		GP_0_13_FN,	GPSR0_13,
5346077365a9SGeert Uytterhoeven 		GP_0_12_FN,	GPSR0_12,
5347077365a9SGeert Uytterhoeven 		GP_0_11_FN,	GPSR0_11,
5348077365a9SGeert Uytterhoeven 		GP_0_10_FN,	GPSR0_10,
5349077365a9SGeert Uytterhoeven 		GP_0_9_FN,	GPSR0_9,
5350077365a9SGeert Uytterhoeven 		GP_0_8_FN,	GPSR0_8,
5351077365a9SGeert Uytterhoeven 		GP_0_7_FN,	GPSR0_7,
5352077365a9SGeert Uytterhoeven 		GP_0_6_FN,	GPSR0_6,
5353077365a9SGeert Uytterhoeven 		GP_0_5_FN,	GPSR0_5,
5354077365a9SGeert Uytterhoeven 		GP_0_4_FN,	GPSR0_4,
5355077365a9SGeert Uytterhoeven 		GP_0_3_FN,	GPSR0_3,
5356077365a9SGeert Uytterhoeven 		GP_0_2_FN,	GPSR0_2,
5357077365a9SGeert Uytterhoeven 		GP_0_1_FN,	GPSR0_1,
5358077365a9SGeert Uytterhoeven 		GP_0_0_FN,	GPSR0_0, ))
5359077365a9SGeert Uytterhoeven 	},
5360077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
5361077365a9SGeert Uytterhoeven 		0, 0,
5362077365a9SGeert Uytterhoeven 		0, 0,
5363077365a9SGeert Uytterhoeven 		0, 0,
5364077365a9SGeert Uytterhoeven 		GP_1_28_FN,	GPSR1_28,
5365077365a9SGeert Uytterhoeven 		GP_1_27_FN,	GPSR1_27,
5366077365a9SGeert Uytterhoeven 		GP_1_26_FN,	GPSR1_26,
5367077365a9SGeert Uytterhoeven 		GP_1_25_FN,	GPSR1_25,
5368077365a9SGeert Uytterhoeven 		GP_1_24_FN,	GPSR1_24,
5369077365a9SGeert Uytterhoeven 		GP_1_23_FN,	GPSR1_23,
5370077365a9SGeert Uytterhoeven 		GP_1_22_FN,	GPSR1_22,
5371077365a9SGeert Uytterhoeven 		GP_1_21_FN,	GPSR1_21,
5372077365a9SGeert Uytterhoeven 		GP_1_20_FN,	GPSR1_20,
5373077365a9SGeert Uytterhoeven 		GP_1_19_FN,	GPSR1_19,
5374077365a9SGeert Uytterhoeven 		GP_1_18_FN,	GPSR1_18,
5375077365a9SGeert Uytterhoeven 		GP_1_17_FN,	GPSR1_17,
5376077365a9SGeert Uytterhoeven 		GP_1_16_FN,	GPSR1_16,
5377077365a9SGeert Uytterhoeven 		GP_1_15_FN,	GPSR1_15,
5378077365a9SGeert Uytterhoeven 		GP_1_14_FN,	GPSR1_14,
5379077365a9SGeert Uytterhoeven 		GP_1_13_FN,	GPSR1_13,
5380077365a9SGeert Uytterhoeven 		GP_1_12_FN,	GPSR1_12,
5381077365a9SGeert Uytterhoeven 		GP_1_11_FN,	GPSR1_11,
5382077365a9SGeert Uytterhoeven 		GP_1_10_FN,	GPSR1_10,
5383077365a9SGeert Uytterhoeven 		GP_1_9_FN,	GPSR1_9,
5384077365a9SGeert Uytterhoeven 		GP_1_8_FN,	GPSR1_8,
5385077365a9SGeert Uytterhoeven 		GP_1_7_FN,	GPSR1_7,
5386077365a9SGeert Uytterhoeven 		GP_1_6_FN,	GPSR1_6,
5387077365a9SGeert Uytterhoeven 		GP_1_5_FN,	GPSR1_5,
5388077365a9SGeert Uytterhoeven 		GP_1_4_FN,	GPSR1_4,
5389077365a9SGeert Uytterhoeven 		GP_1_3_FN,	GPSR1_3,
5390077365a9SGeert Uytterhoeven 		GP_1_2_FN,	GPSR1_2,
5391077365a9SGeert Uytterhoeven 		GP_1_1_FN,	GPSR1_1,
5392077365a9SGeert Uytterhoeven 		GP_1_0_FN,	GPSR1_0, ))
5393077365a9SGeert Uytterhoeven 	},
5394efd5ee63SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("GPSR2", 0xe6060108, 32,
5395efd5ee63SGeert Uytterhoeven 			     GROUP(-17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
5396efd5ee63SGeert Uytterhoeven 				   1, 1, 1, 1),
5397efd5ee63SGeert Uytterhoeven 			     GROUP(
5398efd5ee63SGeert Uytterhoeven 		/* GP2_31_15 RESERVED */
5399077365a9SGeert Uytterhoeven 		GP_2_14_FN,	GPSR2_14,
5400077365a9SGeert Uytterhoeven 		GP_2_13_FN,	GPSR2_13,
5401077365a9SGeert Uytterhoeven 		GP_2_12_FN,	GPSR2_12,
5402077365a9SGeert Uytterhoeven 		GP_2_11_FN,	GPSR2_11,
5403077365a9SGeert Uytterhoeven 		GP_2_10_FN,	GPSR2_10,
5404077365a9SGeert Uytterhoeven 		GP_2_9_FN,	GPSR2_9,
5405077365a9SGeert Uytterhoeven 		GP_2_8_FN,	GPSR2_8,
5406077365a9SGeert Uytterhoeven 		GP_2_7_FN,	GPSR2_7,
5407077365a9SGeert Uytterhoeven 		GP_2_6_FN,	GPSR2_6,
5408077365a9SGeert Uytterhoeven 		GP_2_5_FN,	GPSR2_5,
5409077365a9SGeert Uytterhoeven 		GP_2_4_FN,	GPSR2_4,
5410077365a9SGeert Uytterhoeven 		GP_2_3_FN,	GPSR2_3,
5411077365a9SGeert Uytterhoeven 		GP_2_2_FN,	GPSR2_2,
5412077365a9SGeert Uytterhoeven 		GP_2_1_FN,	GPSR2_1,
5413077365a9SGeert Uytterhoeven 		GP_2_0_FN,	GPSR2_0, ))
5414077365a9SGeert Uytterhoeven 	},
5415efd5ee63SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("GPSR3", 0xe606010c, 32,
5416efd5ee63SGeert Uytterhoeven 			     GROUP(-16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
5417efd5ee63SGeert Uytterhoeven 				   1, 1, 1, 1, 1),
5418efd5ee63SGeert Uytterhoeven 			     GROUP(
5419efd5ee63SGeert Uytterhoeven 		/* GP3_31_16 RESERVED */
5420077365a9SGeert Uytterhoeven 		GP_3_15_FN,	GPSR3_15,
5421077365a9SGeert Uytterhoeven 		GP_3_14_FN,	GPSR3_14,
5422077365a9SGeert Uytterhoeven 		GP_3_13_FN,	GPSR3_13,
5423077365a9SGeert Uytterhoeven 		GP_3_12_FN,	GPSR3_12,
5424077365a9SGeert Uytterhoeven 		GP_3_11_FN,	GPSR3_11,
5425077365a9SGeert Uytterhoeven 		GP_3_10_FN,	GPSR3_10,
5426077365a9SGeert Uytterhoeven 		GP_3_9_FN,	GPSR3_9,
5427077365a9SGeert Uytterhoeven 		GP_3_8_FN,	GPSR3_8,
5428077365a9SGeert Uytterhoeven 		GP_3_7_FN,	GPSR3_7,
5429077365a9SGeert Uytterhoeven 		GP_3_6_FN,	GPSR3_6,
5430077365a9SGeert Uytterhoeven 		GP_3_5_FN,	GPSR3_5,
5431077365a9SGeert Uytterhoeven 		GP_3_4_FN,	GPSR3_4,
5432077365a9SGeert Uytterhoeven 		GP_3_3_FN,	GPSR3_3,
5433077365a9SGeert Uytterhoeven 		GP_3_2_FN,	GPSR3_2,
5434077365a9SGeert Uytterhoeven 		GP_3_1_FN,	GPSR3_1,
5435077365a9SGeert Uytterhoeven 		GP_3_0_FN,	GPSR3_0, ))
5436077365a9SGeert Uytterhoeven 	},
5437efd5ee63SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("GPSR4", 0xe6060110, 32,
5438efd5ee63SGeert Uytterhoeven 			     GROUP(-14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
5439efd5ee63SGeert Uytterhoeven 				   1, 1, 1, 1, 1, 1, 1),
5440efd5ee63SGeert Uytterhoeven 			     GROUP(
5441efd5ee63SGeert Uytterhoeven 		/* GP4_31_18 RESERVED */
5442077365a9SGeert Uytterhoeven 		GP_4_17_FN,	GPSR4_17,
5443077365a9SGeert Uytterhoeven 		GP_4_16_FN,	GPSR4_16,
5444077365a9SGeert Uytterhoeven 		GP_4_15_FN,	GPSR4_15,
5445077365a9SGeert Uytterhoeven 		GP_4_14_FN,	GPSR4_14,
5446077365a9SGeert Uytterhoeven 		GP_4_13_FN,	GPSR4_13,
5447077365a9SGeert Uytterhoeven 		GP_4_12_FN,	GPSR4_12,
5448077365a9SGeert Uytterhoeven 		GP_4_11_FN,	GPSR4_11,
5449077365a9SGeert Uytterhoeven 		GP_4_10_FN,	GPSR4_10,
5450077365a9SGeert Uytterhoeven 		GP_4_9_FN,	GPSR4_9,
5451077365a9SGeert Uytterhoeven 		GP_4_8_FN,	GPSR4_8,
5452077365a9SGeert Uytterhoeven 		GP_4_7_FN,	GPSR4_7,
5453077365a9SGeert Uytterhoeven 		GP_4_6_FN,	GPSR4_6,
5454077365a9SGeert Uytterhoeven 		GP_4_5_FN,	GPSR4_5,
5455077365a9SGeert Uytterhoeven 		GP_4_4_FN,	GPSR4_4,
5456077365a9SGeert Uytterhoeven 		GP_4_3_FN,	GPSR4_3,
5457077365a9SGeert Uytterhoeven 		GP_4_2_FN,	GPSR4_2,
5458077365a9SGeert Uytterhoeven 		GP_4_1_FN,	GPSR4_1,
5459077365a9SGeert Uytterhoeven 		GP_4_0_FN,	GPSR4_0, ))
5460077365a9SGeert Uytterhoeven 	},
5461077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
5462077365a9SGeert Uytterhoeven 		0, 0,
5463077365a9SGeert Uytterhoeven 		0, 0,
5464077365a9SGeert Uytterhoeven 		0, 0,
5465077365a9SGeert Uytterhoeven 		0, 0,
5466077365a9SGeert Uytterhoeven 		0, 0,
5467077365a9SGeert Uytterhoeven 		0, 0,
5468077365a9SGeert Uytterhoeven 		GP_5_25_FN,	GPSR5_25,
5469077365a9SGeert Uytterhoeven 		GP_5_24_FN,	GPSR5_24,
5470077365a9SGeert Uytterhoeven 		GP_5_23_FN,	GPSR5_23,
5471077365a9SGeert Uytterhoeven 		GP_5_22_FN,	GPSR5_22,
5472077365a9SGeert Uytterhoeven 		GP_5_21_FN,	GPSR5_21,
5473077365a9SGeert Uytterhoeven 		GP_5_20_FN,	GPSR5_20,
5474077365a9SGeert Uytterhoeven 		GP_5_19_FN,	GPSR5_19,
5475077365a9SGeert Uytterhoeven 		GP_5_18_FN,	GPSR5_18,
5476077365a9SGeert Uytterhoeven 		GP_5_17_FN,	GPSR5_17,
5477077365a9SGeert Uytterhoeven 		GP_5_16_FN,	GPSR5_16,
5478077365a9SGeert Uytterhoeven 		GP_5_15_FN,	GPSR5_15,
5479077365a9SGeert Uytterhoeven 		GP_5_14_FN,	GPSR5_14,
5480077365a9SGeert Uytterhoeven 		GP_5_13_FN,	GPSR5_13,
5481077365a9SGeert Uytterhoeven 		GP_5_12_FN,	GPSR5_12,
5482077365a9SGeert Uytterhoeven 		GP_5_11_FN,	GPSR5_11,
5483077365a9SGeert Uytterhoeven 		GP_5_10_FN,	GPSR5_10,
5484077365a9SGeert Uytterhoeven 		GP_5_9_FN,	GPSR5_9,
5485077365a9SGeert Uytterhoeven 		GP_5_8_FN,	GPSR5_8,
5486077365a9SGeert Uytterhoeven 		GP_5_7_FN,	GPSR5_7,
5487077365a9SGeert Uytterhoeven 		GP_5_6_FN,	GPSR5_6,
5488077365a9SGeert Uytterhoeven 		GP_5_5_FN,	GPSR5_5,
5489077365a9SGeert Uytterhoeven 		GP_5_4_FN,	GPSR5_4,
5490077365a9SGeert Uytterhoeven 		GP_5_3_FN,	GPSR5_3,
5491077365a9SGeert Uytterhoeven 		GP_5_2_FN,	GPSR5_2,
5492077365a9SGeert Uytterhoeven 		GP_5_1_FN,	GPSR5_1,
5493077365a9SGeert Uytterhoeven 		GP_5_0_FN,	GPSR5_0, ))
5494077365a9SGeert Uytterhoeven 	},
5495077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
5496077365a9SGeert Uytterhoeven 		GP_6_31_FN,	GPSR6_31,
5497077365a9SGeert Uytterhoeven 		GP_6_30_FN,	GPSR6_30,
5498077365a9SGeert Uytterhoeven 		GP_6_29_FN,	GPSR6_29,
5499077365a9SGeert Uytterhoeven 		GP_6_28_FN,	GPSR6_28,
5500077365a9SGeert Uytterhoeven 		GP_6_27_FN,	GPSR6_27,
5501077365a9SGeert Uytterhoeven 		GP_6_26_FN,	GPSR6_26,
5502077365a9SGeert Uytterhoeven 		GP_6_25_FN,	GPSR6_25,
5503077365a9SGeert Uytterhoeven 		GP_6_24_FN,	GPSR6_24,
5504077365a9SGeert Uytterhoeven 		GP_6_23_FN,	GPSR6_23,
5505077365a9SGeert Uytterhoeven 		GP_6_22_FN,	GPSR6_22,
5506077365a9SGeert Uytterhoeven 		GP_6_21_FN,	GPSR6_21,
5507077365a9SGeert Uytterhoeven 		GP_6_20_FN,	GPSR6_20,
5508077365a9SGeert Uytterhoeven 		GP_6_19_FN,	GPSR6_19,
5509077365a9SGeert Uytterhoeven 		GP_6_18_FN,	GPSR6_18,
5510077365a9SGeert Uytterhoeven 		GP_6_17_FN,	GPSR6_17,
5511077365a9SGeert Uytterhoeven 		GP_6_16_FN,	GPSR6_16,
5512077365a9SGeert Uytterhoeven 		GP_6_15_FN,	GPSR6_15,
5513077365a9SGeert Uytterhoeven 		GP_6_14_FN,	GPSR6_14,
5514077365a9SGeert Uytterhoeven 		GP_6_13_FN,	GPSR6_13,
5515077365a9SGeert Uytterhoeven 		GP_6_12_FN,	GPSR6_12,
5516077365a9SGeert Uytterhoeven 		GP_6_11_FN,	GPSR6_11,
5517077365a9SGeert Uytterhoeven 		GP_6_10_FN,	GPSR6_10,
5518077365a9SGeert Uytterhoeven 		GP_6_9_FN,	GPSR6_9,
5519077365a9SGeert Uytterhoeven 		GP_6_8_FN,	GPSR6_8,
5520077365a9SGeert Uytterhoeven 		GP_6_7_FN,	GPSR6_7,
5521077365a9SGeert Uytterhoeven 		GP_6_6_FN,	GPSR6_6,
5522077365a9SGeert Uytterhoeven 		GP_6_5_FN,	GPSR6_5,
5523077365a9SGeert Uytterhoeven 		GP_6_4_FN,	GPSR6_4,
5524077365a9SGeert Uytterhoeven 		GP_6_3_FN,	GPSR6_3,
5525077365a9SGeert Uytterhoeven 		GP_6_2_FN,	GPSR6_2,
5526077365a9SGeert Uytterhoeven 		GP_6_1_FN,	GPSR6_1,
5527077365a9SGeert Uytterhoeven 		GP_6_0_FN,	GPSR6_0, ))
5528077365a9SGeert Uytterhoeven 	},
5529efd5ee63SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("GPSR7", 0xe606011c, 32,
5530efd5ee63SGeert Uytterhoeven 			     GROUP(-28, 1, 1, 1, 1),
5531efd5ee63SGeert Uytterhoeven 			     GROUP(
5532efd5ee63SGeert Uytterhoeven 		/* GP7_31_4 RESERVED */
5533077365a9SGeert Uytterhoeven 		GP_7_3_FN, GPSR7_3,
5534077365a9SGeert Uytterhoeven 		GP_7_2_FN, GPSR7_2,
5535077365a9SGeert Uytterhoeven 		GP_7_1_FN, GPSR7_1,
5536077365a9SGeert Uytterhoeven 		GP_7_0_FN, GPSR7_0, ))
5537077365a9SGeert Uytterhoeven 	},
5538077365a9SGeert Uytterhoeven #undef F_
5539077365a9SGeert Uytterhoeven #undef FM
5540077365a9SGeert Uytterhoeven 
5541077365a9SGeert Uytterhoeven #define F_(x, y)	x,
5542077365a9SGeert Uytterhoeven #define FM(x)		FN_##x,
5543077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5544077365a9SGeert Uytterhoeven 		IP0_31_28
5545077365a9SGeert Uytterhoeven 		IP0_27_24
5546077365a9SGeert Uytterhoeven 		IP0_23_20
5547077365a9SGeert Uytterhoeven 		IP0_19_16
5548077365a9SGeert Uytterhoeven 		IP0_15_12
5549077365a9SGeert Uytterhoeven 		IP0_11_8
5550077365a9SGeert Uytterhoeven 		IP0_7_4
5551077365a9SGeert Uytterhoeven 		IP0_3_0 ))
5552077365a9SGeert Uytterhoeven 	},
5553077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
5554077365a9SGeert Uytterhoeven 		IP1_31_28
5555077365a9SGeert Uytterhoeven 		IP1_27_24
5556077365a9SGeert Uytterhoeven 		IP1_23_20
5557077365a9SGeert Uytterhoeven 		IP1_19_16
5558077365a9SGeert Uytterhoeven 		IP1_15_12
5559077365a9SGeert Uytterhoeven 		IP1_11_8
5560077365a9SGeert Uytterhoeven 		IP1_7_4
5561077365a9SGeert Uytterhoeven 		IP1_3_0 ))
5562077365a9SGeert Uytterhoeven 	},
5563077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
5564077365a9SGeert Uytterhoeven 		IP2_31_28
5565077365a9SGeert Uytterhoeven 		IP2_27_24
5566077365a9SGeert Uytterhoeven 		IP2_23_20
5567077365a9SGeert Uytterhoeven 		IP2_19_16
5568077365a9SGeert Uytterhoeven 		IP2_15_12
5569077365a9SGeert Uytterhoeven 		IP2_11_8
5570077365a9SGeert Uytterhoeven 		IP2_7_4
5571077365a9SGeert Uytterhoeven 		IP2_3_0 ))
5572077365a9SGeert Uytterhoeven 	},
5573077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP(
5574077365a9SGeert Uytterhoeven 		IP3_31_28
5575077365a9SGeert Uytterhoeven 		IP3_27_24
5576077365a9SGeert Uytterhoeven 		IP3_23_20
5577077365a9SGeert Uytterhoeven 		IP3_19_16
5578077365a9SGeert Uytterhoeven 		IP3_15_12
5579077365a9SGeert Uytterhoeven 		IP3_11_8
5580077365a9SGeert Uytterhoeven 		IP3_7_4
5581077365a9SGeert Uytterhoeven 		IP3_3_0 ))
5582077365a9SGeert Uytterhoeven 	},
5583077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4, GROUP(
5584077365a9SGeert Uytterhoeven 		IP4_31_28
5585077365a9SGeert Uytterhoeven 		IP4_27_24
5586077365a9SGeert Uytterhoeven 		IP4_23_20
5587077365a9SGeert Uytterhoeven 		IP4_19_16
5588077365a9SGeert Uytterhoeven 		IP4_15_12
5589077365a9SGeert Uytterhoeven 		IP4_11_8
5590077365a9SGeert Uytterhoeven 		IP4_7_4
5591077365a9SGeert Uytterhoeven 		IP4_3_0 ))
5592077365a9SGeert Uytterhoeven 	},
5593077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4, GROUP(
5594077365a9SGeert Uytterhoeven 		IP5_31_28
5595077365a9SGeert Uytterhoeven 		IP5_27_24
5596077365a9SGeert Uytterhoeven 		IP5_23_20
5597077365a9SGeert Uytterhoeven 		IP5_19_16
5598077365a9SGeert Uytterhoeven 		IP5_15_12
5599077365a9SGeert Uytterhoeven 		IP5_11_8
5600077365a9SGeert Uytterhoeven 		IP5_7_4
5601077365a9SGeert Uytterhoeven 		IP5_3_0 ))
5602077365a9SGeert Uytterhoeven 	},
5603077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4, GROUP(
5604077365a9SGeert Uytterhoeven 		IP6_31_28
5605077365a9SGeert Uytterhoeven 		IP6_27_24
5606077365a9SGeert Uytterhoeven 		IP6_23_20
5607077365a9SGeert Uytterhoeven 		IP6_19_16
5608077365a9SGeert Uytterhoeven 		IP6_15_12
5609077365a9SGeert Uytterhoeven 		IP6_11_8
5610077365a9SGeert Uytterhoeven 		IP6_7_4
5611077365a9SGeert Uytterhoeven 		IP6_3_0 ))
5612077365a9SGeert Uytterhoeven 	},
5613efd5ee63SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("IPSR7", 0xe606021c, 32,
5614efd5ee63SGeert Uytterhoeven 			     GROUP(4, 4, 4, 4, -4, 4, 4, 4),
5615efd5ee63SGeert Uytterhoeven 			     GROUP(
5616077365a9SGeert Uytterhoeven 		IP7_31_28
5617077365a9SGeert Uytterhoeven 		IP7_27_24
5618077365a9SGeert Uytterhoeven 		IP7_23_20
5619077365a9SGeert Uytterhoeven 		IP7_19_16
5620efd5ee63SGeert Uytterhoeven 		/* IP7_15_12 RESERVED */
5621077365a9SGeert Uytterhoeven 		IP7_11_8
5622077365a9SGeert Uytterhoeven 		IP7_7_4
5623077365a9SGeert Uytterhoeven 		IP7_3_0 ))
5624077365a9SGeert Uytterhoeven 	},
5625077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR8", 0xe6060220, 32, 4, GROUP(
5626077365a9SGeert Uytterhoeven 		IP8_31_28
5627077365a9SGeert Uytterhoeven 		IP8_27_24
5628077365a9SGeert Uytterhoeven 		IP8_23_20
5629077365a9SGeert Uytterhoeven 		IP8_19_16
5630077365a9SGeert Uytterhoeven 		IP8_15_12
5631077365a9SGeert Uytterhoeven 		IP8_11_8
5632077365a9SGeert Uytterhoeven 		IP8_7_4
5633077365a9SGeert Uytterhoeven 		IP8_3_0 ))
5634077365a9SGeert Uytterhoeven 	},
5635077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR9", 0xe6060224, 32, 4, GROUP(
5636077365a9SGeert Uytterhoeven 		IP9_31_28
5637077365a9SGeert Uytterhoeven 		IP9_27_24
5638077365a9SGeert Uytterhoeven 		IP9_23_20
5639077365a9SGeert Uytterhoeven 		IP9_19_16
5640077365a9SGeert Uytterhoeven 		IP9_15_12
5641077365a9SGeert Uytterhoeven 		IP9_11_8
5642077365a9SGeert Uytterhoeven 		IP9_7_4
5643077365a9SGeert Uytterhoeven 		IP9_3_0 ))
5644077365a9SGeert Uytterhoeven 	},
5645077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR10", 0xe6060228, 32, 4, GROUP(
5646077365a9SGeert Uytterhoeven 		IP10_31_28
5647077365a9SGeert Uytterhoeven 		IP10_27_24
5648077365a9SGeert Uytterhoeven 		IP10_23_20
5649077365a9SGeert Uytterhoeven 		IP10_19_16
5650077365a9SGeert Uytterhoeven 		IP10_15_12
5651077365a9SGeert Uytterhoeven 		IP10_11_8
5652077365a9SGeert Uytterhoeven 		IP10_7_4
5653077365a9SGeert Uytterhoeven 		IP10_3_0 ))
5654077365a9SGeert Uytterhoeven 	},
5655077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR11", 0xe606022c, 32, 4, GROUP(
5656077365a9SGeert Uytterhoeven 		IP11_31_28
5657077365a9SGeert Uytterhoeven 		IP11_27_24
5658077365a9SGeert Uytterhoeven 		IP11_23_20
5659077365a9SGeert Uytterhoeven 		IP11_19_16
5660077365a9SGeert Uytterhoeven 		IP11_15_12
5661077365a9SGeert Uytterhoeven 		IP11_11_8
5662077365a9SGeert Uytterhoeven 		IP11_7_4
5663077365a9SGeert Uytterhoeven 		IP11_3_0 ))
5664077365a9SGeert Uytterhoeven 	},
5665077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR12", 0xe6060230, 32, 4, GROUP(
5666077365a9SGeert Uytterhoeven 		IP12_31_28
5667077365a9SGeert Uytterhoeven 		IP12_27_24
5668077365a9SGeert Uytterhoeven 		IP12_23_20
5669077365a9SGeert Uytterhoeven 		IP12_19_16
5670077365a9SGeert Uytterhoeven 		IP12_15_12
5671077365a9SGeert Uytterhoeven 		IP12_11_8
5672077365a9SGeert Uytterhoeven 		IP12_7_4
5673077365a9SGeert Uytterhoeven 		IP12_3_0 ))
5674077365a9SGeert Uytterhoeven 	},
5675077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR13", 0xe6060234, 32, 4, GROUP(
5676077365a9SGeert Uytterhoeven 		IP13_31_28
5677077365a9SGeert Uytterhoeven 		IP13_27_24
5678077365a9SGeert Uytterhoeven 		IP13_23_20
5679077365a9SGeert Uytterhoeven 		IP13_19_16
5680077365a9SGeert Uytterhoeven 		IP13_15_12
5681077365a9SGeert Uytterhoeven 		IP13_11_8
5682077365a9SGeert Uytterhoeven 		IP13_7_4
5683077365a9SGeert Uytterhoeven 		IP13_3_0 ))
5684077365a9SGeert Uytterhoeven 	},
5685077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR14", 0xe6060238, 32, 4, GROUP(
5686077365a9SGeert Uytterhoeven 		IP14_31_28
5687077365a9SGeert Uytterhoeven 		IP14_27_24
5688077365a9SGeert Uytterhoeven 		IP14_23_20
5689077365a9SGeert Uytterhoeven 		IP14_19_16
5690077365a9SGeert Uytterhoeven 		IP14_15_12
5691077365a9SGeert Uytterhoeven 		IP14_11_8
5692077365a9SGeert Uytterhoeven 		IP14_7_4
5693077365a9SGeert Uytterhoeven 		IP14_3_0 ))
5694077365a9SGeert Uytterhoeven 	},
5695077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR15", 0xe606023c, 32, 4, GROUP(
5696077365a9SGeert Uytterhoeven 		IP15_31_28
5697077365a9SGeert Uytterhoeven 		IP15_27_24
5698077365a9SGeert Uytterhoeven 		IP15_23_20
5699077365a9SGeert Uytterhoeven 		IP15_19_16
5700077365a9SGeert Uytterhoeven 		IP15_15_12
5701077365a9SGeert Uytterhoeven 		IP15_11_8
5702077365a9SGeert Uytterhoeven 		IP15_7_4
5703077365a9SGeert Uytterhoeven 		IP15_3_0 ))
5704077365a9SGeert Uytterhoeven 	},
5705077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR16", 0xe6060240, 32, 4, GROUP(
5706077365a9SGeert Uytterhoeven 		IP16_31_28
5707077365a9SGeert Uytterhoeven 		IP16_27_24
5708077365a9SGeert Uytterhoeven 		IP16_23_20
5709077365a9SGeert Uytterhoeven 		IP16_19_16
5710077365a9SGeert Uytterhoeven 		IP16_15_12
5711077365a9SGeert Uytterhoeven 		IP16_11_8
5712077365a9SGeert Uytterhoeven 		IP16_7_4
5713077365a9SGeert Uytterhoeven 		IP16_3_0 ))
5714077365a9SGeert Uytterhoeven 	},
5715077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG("IPSR17", 0xe6060244, 32, 4, GROUP(
5716077365a9SGeert Uytterhoeven 		IP17_31_28
5717077365a9SGeert Uytterhoeven 		IP17_27_24
5718077365a9SGeert Uytterhoeven 		IP17_23_20
5719077365a9SGeert Uytterhoeven 		IP17_19_16
5720077365a9SGeert Uytterhoeven 		IP17_15_12
5721077365a9SGeert Uytterhoeven 		IP17_11_8
5722077365a9SGeert Uytterhoeven 		IP17_7_4
5723077365a9SGeert Uytterhoeven 		IP17_3_0 ))
5724077365a9SGeert Uytterhoeven 	},
5725efd5ee63SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("IPSR18", 0xe6060248, 32,
5726efd5ee63SGeert Uytterhoeven 			     GROUP(-24, 4, 4),
5727efd5ee63SGeert Uytterhoeven 			     GROUP(
5728efd5ee63SGeert Uytterhoeven 		/* IP18_31_8 RESERVED */
5729077365a9SGeert Uytterhoeven 		IP18_7_4
5730077365a9SGeert Uytterhoeven 		IP18_3_0 ))
5731077365a9SGeert Uytterhoeven 	},
5732077365a9SGeert Uytterhoeven #undef F_
5733077365a9SGeert Uytterhoeven #undef FM
5734077365a9SGeert Uytterhoeven 
5735077365a9SGeert Uytterhoeven #define F_(x, y)	x,
5736077365a9SGeert Uytterhoeven #define FM(x)		FN_##x,
5737077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
57386088f726SGeert Uytterhoeven 			     GROUP(3, 2, 3, 1, 1, 1, 1, 1, 2, 1, -1, 2,
57396088f726SGeert Uytterhoeven 				   1, 1, 1, 2, 2, 1, 2, -3),
5740077365a9SGeert Uytterhoeven 			     GROUP(
5741077365a9SGeert Uytterhoeven 		MOD_SEL0_31_30_29
5742077365a9SGeert Uytterhoeven 		MOD_SEL0_28_27
5743077365a9SGeert Uytterhoeven 		MOD_SEL0_26_25_24
5744077365a9SGeert Uytterhoeven 		MOD_SEL0_23
5745077365a9SGeert Uytterhoeven 		MOD_SEL0_22
5746077365a9SGeert Uytterhoeven 		MOD_SEL0_21
5747077365a9SGeert Uytterhoeven 		MOD_SEL0_20
5748077365a9SGeert Uytterhoeven 		MOD_SEL0_19
5749077365a9SGeert Uytterhoeven 		MOD_SEL0_18_17
5750077365a9SGeert Uytterhoeven 		MOD_SEL0_16
57516088f726SGeert Uytterhoeven 		/* RESERVED 15 */
5752077365a9SGeert Uytterhoeven 		MOD_SEL0_14_13
5753077365a9SGeert Uytterhoeven 		MOD_SEL0_12
5754077365a9SGeert Uytterhoeven 		MOD_SEL0_11
5755077365a9SGeert Uytterhoeven 		MOD_SEL0_10
5756077365a9SGeert Uytterhoeven 		MOD_SEL0_9_8
5757077365a9SGeert Uytterhoeven 		MOD_SEL0_7_6
5758077365a9SGeert Uytterhoeven 		MOD_SEL0_5
5759077365a9SGeert Uytterhoeven 		MOD_SEL0_4_3
57606088f726SGeert Uytterhoeven 		/* RESERVED 2, 1, 0 */ ))
5761077365a9SGeert Uytterhoeven 	},
5762077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("MOD_SEL1", 0xe6060504, 32,
5763077365a9SGeert Uytterhoeven 			     GROUP(2, 3, 1, 2, 3, 1, 1, 2, 1, 2, 1, 1,
57646088f726SGeert Uytterhoeven 				   1, 1, 1, -2, 1, 1, 1, 1, 1, 1, 1),
5765077365a9SGeert Uytterhoeven 			     GROUP(
5766077365a9SGeert Uytterhoeven 		MOD_SEL1_31_30
5767077365a9SGeert Uytterhoeven 		MOD_SEL1_29_28_27
5768077365a9SGeert Uytterhoeven 		MOD_SEL1_26
5769077365a9SGeert Uytterhoeven 		MOD_SEL1_25_24
5770077365a9SGeert Uytterhoeven 		MOD_SEL1_23_22_21
5771077365a9SGeert Uytterhoeven 		MOD_SEL1_20
5772077365a9SGeert Uytterhoeven 		MOD_SEL1_19
5773077365a9SGeert Uytterhoeven 		MOD_SEL1_18_17
5774077365a9SGeert Uytterhoeven 		MOD_SEL1_16
5775077365a9SGeert Uytterhoeven 		MOD_SEL1_15_14
5776077365a9SGeert Uytterhoeven 		MOD_SEL1_13
5777077365a9SGeert Uytterhoeven 		MOD_SEL1_12
5778077365a9SGeert Uytterhoeven 		MOD_SEL1_11
5779077365a9SGeert Uytterhoeven 		MOD_SEL1_10
5780077365a9SGeert Uytterhoeven 		MOD_SEL1_9
57816088f726SGeert Uytterhoeven 		/* RESERVED 8, 7 */
5782077365a9SGeert Uytterhoeven 		MOD_SEL1_6
5783077365a9SGeert Uytterhoeven 		MOD_SEL1_5
5784077365a9SGeert Uytterhoeven 		MOD_SEL1_4
5785077365a9SGeert Uytterhoeven 		MOD_SEL1_3
5786077365a9SGeert Uytterhoeven 		MOD_SEL1_2
5787077365a9SGeert Uytterhoeven 		MOD_SEL1_1
5788077365a9SGeert Uytterhoeven 		MOD_SEL1_0 ))
5789077365a9SGeert Uytterhoeven 	},
5790077365a9SGeert Uytterhoeven 	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xe6060508, 32,
5791077365a9SGeert Uytterhoeven 			     GROUP(1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1,
57926088f726SGeert Uytterhoeven 				   -16, 1),
5793077365a9SGeert Uytterhoeven 			     GROUP(
5794077365a9SGeert Uytterhoeven 		MOD_SEL2_31
5795077365a9SGeert Uytterhoeven 		MOD_SEL2_30
5796077365a9SGeert Uytterhoeven 		MOD_SEL2_29
5797077365a9SGeert Uytterhoeven 		MOD_SEL2_28_27
5798077365a9SGeert Uytterhoeven 		MOD_SEL2_26
5799077365a9SGeert Uytterhoeven 		MOD_SEL2_25_24_23
5800077365a9SGeert Uytterhoeven 		MOD_SEL2_22
5801077365a9SGeert Uytterhoeven 		MOD_SEL2_21
5802077365a9SGeert Uytterhoeven 		MOD_SEL2_20
5803077365a9SGeert Uytterhoeven 		MOD_SEL2_19
5804077365a9SGeert Uytterhoeven 		MOD_SEL2_18
5805077365a9SGeert Uytterhoeven 		MOD_SEL2_17
58066088f726SGeert Uytterhoeven 		/* RESERVED 16-1 */
5807077365a9SGeert Uytterhoeven 		MOD_SEL2_0 ))
5808077365a9SGeert Uytterhoeven 	},
5809*0256b6aeSGeert Uytterhoeven 	{ /* sentinel */ }
5810077365a9SGeert Uytterhoeven };
5811077365a9SGeert Uytterhoeven 
5812077365a9SGeert Uytterhoeven static const struct pinmux_drive_reg pinmux_drive_regs[] = {
5813077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) {
5814077365a9SGeert Uytterhoeven 		{ PIN_QSPI0_SPCLK,    28, 2 },	/* QSPI0_SPCLK */
5815077365a9SGeert Uytterhoeven 		{ PIN_QSPI0_MOSI_IO0, 24, 2 },	/* QSPI0_MOSI_IO0 */
5816077365a9SGeert Uytterhoeven 		{ PIN_QSPI0_MISO_IO1, 20, 2 },	/* QSPI0_MISO_IO1 */
5817077365a9SGeert Uytterhoeven 		{ PIN_QSPI0_IO2,      16, 2 },	/* QSPI0_IO2 */
5818077365a9SGeert Uytterhoeven 		{ PIN_QSPI0_IO3,      12, 2 },	/* QSPI0_IO3 */
5819077365a9SGeert Uytterhoeven 		{ PIN_QSPI0_SSL,       8, 2 },	/* QSPI0_SSL */
5820077365a9SGeert Uytterhoeven 		{ PIN_QSPI1_SPCLK,     4, 2 },	/* QSPI1_SPCLK */
5821077365a9SGeert Uytterhoeven 		{ PIN_QSPI1_MOSI_IO0,  0, 2 },	/* QSPI1_MOSI_IO0 */
5822077365a9SGeert Uytterhoeven 	} },
5823077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) {
5824077365a9SGeert Uytterhoeven 		{ PIN_QSPI1_MISO_IO1, 28, 2 },	/* QSPI1_MISO_IO1 */
5825077365a9SGeert Uytterhoeven 		{ PIN_QSPI1_IO2,      24, 2 },	/* QSPI1_IO2 */
5826077365a9SGeert Uytterhoeven 		{ PIN_QSPI1_IO3,      20, 2 },	/* QSPI1_IO3 */
5827077365a9SGeert Uytterhoeven 		{ PIN_QSPI1_SSL,      16, 2 },	/* QSPI1_SSL */
5828077365a9SGeert Uytterhoeven 		{ PIN_RPC_INT_N,      12, 2 },	/* RPC_INT# */
5829077365a9SGeert Uytterhoeven 		{ PIN_RPC_WP_N,        8, 2 },	/* RPC_WP# */
5830077365a9SGeert Uytterhoeven 		{ PIN_RPC_RESET_N,     4, 2 },	/* RPC_RESET# */
5831077365a9SGeert Uytterhoeven 		{ PIN_AVB_RX_CTL,      0, 3 },	/* AVB_RX_CTL */
5832077365a9SGeert Uytterhoeven 	} },
5833077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) {
5834077365a9SGeert Uytterhoeven 		{ PIN_AVB_RXC,        28, 3 },	/* AVB_RXC */
5835077365a9SGeert Uytterhoeven 		{ PIN_AVB_RD0,        24, 3 },	/* AVB_RD0 */
5836077365a9SGeert Uytterhoeven 		{ PIN_AVB_RD1,        20, 3 },	/* AVB_RD1 */
5837077365a9SGeert Uytterhoeven 		{ PIN_AVB_RD2,        16, 3 },	/* AVB_RD2 */
5838077365a9SGeert Uytterhoeven 		{ PIN_AVB_RD3,        12, 3 },	/* AVB_RD3 */
5839077365a9SGeert Uytterhoeven 		{ PIN_AVB_TX_CTL,      8, 3 },	/* AVB_TX_CTL */
5840077365a9SGeert Uytterhoeven 		{ PIN_AVB_TXC,         4, 3 },	/* AVB_TXC */
5841077365a9SGeert Uytterhoeven 		{ PIN_AVB_TD0,         0, 3 },	/* AVB_TD0 */
5842077365a9SGeert Uytterhoeven 	} },
5843077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) {
5844077365a9SGeert Uytterhoeven 		{ PIN_AVB_TD1,        28, 3 },	/* AVB_TD1 */
5845077365a9SGeert Uytterhoeven 		{ PIN_AVB_TD2,        24, 3 },	/* AVB_TD2 */
5846077365a9SGeert Uytterhoeven 		{ PIN_AVB_TD3,        20, 3 },	/* AVB_TD3 */
5847077365a9SGeert Uytterhoeven 		{ PIN_AVB_TXCREFCLK,  16, 3 },	/* AVB_TXCREFCLK */
5848077365a9SGeert Uytterhoeven 		{ PIN_AVB_MDIO,       12, 3 },	/* AVB_MDIO */
5849077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  9),  8, 3 },	/* AVB_MDC */
5850077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2, 10),  4, 3 },	/* AVB_MAGIC */
5851077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2, 11),  0, 3 },	/* AVB_PHY_INT */
5852077365a9SGeert Uytterhoeven 	} },
5853077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) {
5854077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2, 12), 28, 3 },	/* AVB_LINK */
5855077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2, 13), 24, 3 },	/* AVB_AVTP_MATCH */
5856077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2, 14), 20, 3 },	/* AVB_AVTP_CAPTURE */
5857077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  0), 16, 3 },	/* IRQ0 */
5858077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  1), 12, 3 },	/* IRQ1 */
5859077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  2),  8, 3 },	/* IRQ2 */
5860077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  3),  4, 3 },	/* IRQ3 */
5861077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  4),  0, 3 },	/* IRQ4 */
5862077365a9SGeert Uytterhoeven 	} },
5863077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL5", 0xe6060314) {
5864077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  5), 28, 3 },	/* IRQ5 */
5865077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  6), 24, 3 },	/* PWM0 */
5866077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  7), 20, 3 },	/* PWM1 */
5867077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(2,  8), 16, 3 },	/* PWM2 */
5868077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  0), 12, 3 },	/* A0 */
5869077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  1),  8, 3 },	/* A1 */
5870077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  2),  4, 3 },	/* A2 */
5871077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  3),  0, 3 },	/* A3 */
5872077365a9SGeert Uytterhoeven 	} },
5873077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL6", 0xe6060318) {
5874077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  4), 28, 3 },	/* A4 */
5875077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  5), 24, 3 },	/* A5 */
5876077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  6), 20, 3 },	/* A6 */
5877077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  7), 16, 3 },	/* A7 */
5878077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  8), 12, 3 },	/* A8 */
5879077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1,  9),  8, 3 },	/* A9 */
5880077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 10),  4, 3 },	/* A10 */
5881077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 11),  0, 3 },	/* A11 */
5882077365a9SGeert Uytterhoeven 	} },
5883077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL7", 0xe606031c) {
5884077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 12), 28, 3 },	/* A12 */
5885077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 13), 24, 3 },	/* A13 */
5886077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 14), 20, 3 },	/* A14 */
5887077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 15), 16, 3 },	/* A15 */
5888077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 16), 12, 3 },	/* A16 */
5889077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 17),  8, 3 },	/* A17 */
5890077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 18),  4, 3 },	/* A18 */
5891077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 19),  0, 3 },	/* A19 */
5892077365a9SGeert Uytterhoeven 	} },
5893077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
5894077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 28), 28, 3 },	/* CLKOUT */
5895077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 20), 24, 3 },	/* CS0 */
5896077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 21), 20, 3 },	/* CS1_A26 */
5897077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 22), 16, 3 },	/* BS */
5898077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 23), 12, 3 },	/* RD */
5899077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 24),  8, 3 },	/* RD_WR */
5900077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 25),  4, 3 },	/* WE0 */
5901077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 26),  0, 3 },	/* WE1 */
5902077365a9SGeert Uytterhoeven 	} },
5903077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) {
5904077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(1, 27), 28, 3 },	/* EX_WAIT0 */
5905077365a9SGeert Uytterhoeven 		{ PIN_PRESETOUT_N,    24, 3 },	/* PRESETOUT# */
5906077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  0), 20, 3 },	/* D0 */
5907077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  1), 16, 3 },	/* D1 */
5908077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  2), 12, 3 },	/* D2 */
5909077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  3),  8, 3 },	/* D3 */
5910077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  4),  4, 3 },	/* D4 */
5911077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  5),  0, 3 },	/* D5 */
5912077365a9SGeert Uytterhoeven 	} },
5913077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL10", 0xe6060328) {
5914077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  6), 28, 3 },	/* D6 */
5915077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  7), 24, 3 },	/* D7 */
5916077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  8), 20, 3 },	/* D8 */
5917077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0,  9), 16, 3 },	/* D9 */
5918077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0, 10), 12, 3 },	/* D10 */
5919077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0, 11),  8, 3 },	/* D11 */
5920077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0, 12),  4, 3 },	/* D12 */
5921077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0, 13),  0, 3 },	/* D13 */
5922077365a9SGeert Uytterhoeven 	} },
5923077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) {
5924077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0, 14), 28, 3 },	/* D14 */
5925077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(0, 15), 24, 3 },	/* D15 */
5926077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(7,  0), 20, 3 },	/* AVS1 */
5927077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(7,  1), 16, 3 },	/* AVS2 */
5928077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(7,  2), 12, 3 },	/* GP7_02 */
5929077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(7,  3),  8, 3 },	/* GP7_03 */
5930077365a9SGeert Uytterhoeven 		{ PIN_DU_DOTCLKIN0,    4, 2 },	/* DU_DOTCLKIN0 */
5931077365a9SGeert Uytterhoeven 		{ PIN_DU_DOTCLKIN1,    0, 2 },	/* DU_DOTCLKIN1 */
5932077365a9SGeert Uytterhoeven 	} },
5933077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) {
5934077365a9SGeert Uytterhoeven 		{ PIN_DU_DOTCLKIN3,   24, 2 },	/* DU_DOTCLKIN3 */
5935077365a9SGeert Uytterhoeven 		{ PIN_FSCLKST,        20, 2 },	/* FSCLKST */
5936077365a9SGeert Uytterhoeven 		{ PIN_TMS,             4, 2 },	/* TMS */
5937077365a9SGeert Uytterhoeven 	} },
5938077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) {
5939077365a9SGeert Uytterhoeven 		{ PIN_TDO,            28, 2 },	/* TDO */
5940077365a9SGeert Uytterhoeven 		{ PIN_ASEBRK,         24, 2 },	/* ASEBRK */
5941077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  0), 20, 3 },	/* SD0_CLK */
5942077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  1), 16, 3 },	/* SD0_CMD */
5943077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  2), 12, 3 },	/* SD0_DAT0 */
5944077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  3),  8, 3 },	/* SD0_DAT1 */
5945077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  4),  4, 3 },	/* SD0_DAT2 */
5946077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  5),  0, 3 },	/* SD0_DAT3 */
5947077365a9SGeert Uytterhoeven 	} },
5948077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) {
5949077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  6), 28, 3 },	/* SD1_CLK */
5950077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  7), 24, 3 },	/* SD1_CMD */
5951077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  8), 20, 3 },	/* SD1_DAT0 */
5952077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3,  9), 16, 3 },	/* SD1_DAT1 */
5953077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3, 10), 12, 3 },	/* SD1_DAT2 */
5954077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3, 11),  8, 3 },	/* SD1_DAT3 */
5955077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  0),  4, 3 },	/* SD2_CLK */
5956077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  1),  0, 3 },	/* SD2_CMD */
5957077365a9SGeert Uytterhoeven 	} },
5958077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL15", 0xe606033c) {
5959077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  2), 28, 3 },	/* SD2_DAT0 */
5960077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  3), 24, 3 },	/* SD2_DAT1 */
5961077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  4), 20, 3 },	/* SD2_DAT2 */
5962077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  5), 16, 3 },	/* SD2_DAT3 */
5963077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  6), 12, 3 },	/* SD2_DS */
5964077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  7),  8, 3 },	/* SD3_CLK */
5965077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  8),  4, 3 },	/* SD3_CMD */
5966077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4,  9),  0, 3 },	/* SD3_DAT0 */
5967077365a9SGeert Uytterhoeven 	} },
5968077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL16", 0xe6060340) {
5969077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 10), 28, 3 },	/* SD3_DAT1 */
5970077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 11), 24, 3 },	/* SD3_DAT2 */
5971077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 12), 20, 3 },	/* SD3_DAT3 */
5972077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 13), 16, 3 },	/* SD3_DAT4 */
5973077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 14), 12, 3 },	/* SD3_DAT5 */
5974077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 15),  8, 3 },	/* SD3_DAT6 */
5975077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 16),  4, 3 },	/* SD3_DAT7 */
5976077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(4, 17),  0, 3 },	/* SD3_DS */
5977077365a9SGeert Uytterhoeven 	} },
5978077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL17", 0xe6060344) {
5979077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3, 12), 28, 3 },	/* SD0_CD */
5980077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3, 13), 24, 3 },	/* SD0_WP */
5981077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3, 14), 20, 3 },	/* SD1_CD */
5982077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(3, 15), 16, 3 },	/* SD1_WP */
5983077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  0), 12, 3 },	/* SCK0 */
5984077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  1),  8, 3 },	/* RX0 */
5985077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  2),  4, 3 },	/* TX0 */
5986077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  3),  0, 3 },	/* CTS0 */
5987077365a9SGeert Uytterhoeven 	} },
5988077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL18", 0xe6060348) {
5989077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  4), 28, 3 },	/* RTS0 */
5990077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  5), 24, 3 },	/* RX1 */
5991077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  6), 20, 3 },	/* TX1 */
5992077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  7), 16, 3 },	/* CTS1 */
5993077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  8), 12, 3 },	/* RTS1 */
5994077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5,  9),  8, 3 },	/* SCK2 */
5995077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 10),  4, 3 },	/* TX2 */
5996077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 11),  0, 3 },	/* RX2 */
5997077365a9SGeert Uytterhoeven 	} },
5998077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL19", 0xe606034c) {
5999077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 12), 28, 3 },	/* HSCK0 */
6000077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 13), 24, 3 },	/* HRX0 */
6001077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 14), 20, 3 },	/* HTX0 */
6002077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 15), 16, 3 },	/* HCTS0 */
6003077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 16), 12, 3 },	/* HRTS0 */
6004077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 17),  8, 3 },	/* MSIOF0_SCK */
6005077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 18),  4, 3 },	/* MSIOF0_SYNC */
6006077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 19),  0, 3 },	/* MSIOF0_SS1 */
6007077365a9SGeert Uytterhoeven 	} },
6008077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL20", 0xe6060350) {
6009077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 20), 28, 3 },	/* MSIOF0_TXD */
6010077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 21), 24, 3 },	/* MSIOF0_SS2 */
6011077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 22), 20, 3 },	/* MSIOF0_RXD */
6012077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 23), 16, 3 },	/* MLB_CLK */
6013077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 24), 12, 3 },	/* MLB_SIG */
6014077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(5, 25),  8, 3 },	/* MLB_DAT */
6015077365a9SGeert Uytterhoeven 		{ PIN_MLB_REF,         4, 3 },	/* MLB_REF */
6016077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  0),  0, 3 },	/* SSI_SCK01239 */
6017077365a9SGeert Uytterhoeven 	} },
6018077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) {
6019077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  1), 28, 3 },	/* SSI_WS01239 */
6020077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  2), 24, 3 },	/* SSI_SDATA0 */
6021077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  3), 20, 3 },	/* SSI_SDATA1 */
6022077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  4), 16, 3 },	/* SSI_SDATA2 */
6023077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  5), 12, 3 },	/* SSI_SCK349 */
6024077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  6),  8, 3 },	/* SSI_WS349 */
6025077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  7),  4, 3 },	/* SSI_SDATA3 */
6026077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  8),  0, 3 },	/* SSI_SCK4 */
6027077365a9SGeert Uytterhoeven 	} },
6028077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL22", 0xe6060358) {
6029077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6,  9), 28, 3 },	/* SSI_WS4 */
6030077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 10), 24, 3 },	/* SSI_SDATA4 */
6031077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 11), 20, 3 },	/* SSI_SCK5 */
6032077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 12), 16, 3 },	/* SSI_WS5 */
6033077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 13), 12, 3 },	/* SSI_SDATA5 */
6034077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 14),  8, 3 },	/* SSI_SCK6 */
6035077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 15),  4, 3 },	/* SSI_WS6 */
6036077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 16),  0, 3 },	/* SSI_SDATA6 */
6037077365a9SGeert Uytterhoeven 	} },
6038077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL23", 0xe606035c) {
6039077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 17), 28, 3 },	/* SSI_SCK78 */
6040077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 18), 24, 3 },	/* SSI_WS78 */
6041077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 19), 20, 3 },	/* SSI_SDATA7 */
6042077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 20), 16, 3 },	/* SSI_SDATA8 */
6043077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 21), 12, 3 },	/* SSI_SDATA9 */
6044077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 22),  8, 3 },	/* AUDIO_CLKA */
6045077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 23),  4, 3 },	/* AUDIO_CLKB */
6046077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 24),  0, 3 },	/* USB0_PWEN */
6047077365a9SGeert Uytterhoeven 	} },
6048077365a9SGeert Uytterhoeven 	{ PINMUX_DRIVE_REG("DRVCTRL24", 0xe6060360) {
6049077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 25), 28, 3 },	/* USB0_OVC */
6050077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 26), 24, 3 },	/* USB1_PWEN */
6051077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 27), 20, 3 },	/* USB1_OVC */
6052077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 28), 16, 3 },	/* USB30_PWEN */
6053077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 29), 12, 3 },	/* USB30_OVC */
6054077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 30),  8, 3 },	/* GP6_30 */
6055077365a9SGeert Uytterhoeven 		{ RCAR_GP_PIN(6, 31),  4, 3 },	/* GP6_31 */
6056077365a9SGeert Uytterhoeven 	} },
6057*0256b6aeSGeert Uytterhoeven 	{ /* sentinel */ }
6058077365a9SGeert Uytterhoeven };
6059077365a9SGeert Uytterhoeven 
6060077365a9SGeert Uytterhoeven enum ioctrl_regs {
6061077365a9SGeert Uytterhoeven 	POCCTRL,
6062077365a9SGeert Uytterhoeven 	TDSELCTRL,
6063077365a9SGeert Uytterhoeven };
6064077365a9SGeert Uytterhoeven 
6065077365a9SGeert Uytterhoeven static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
6066077365a9SGeert Uytterhoeven 	[POCCTRL] = { 0xe6060380, },
6067077365a9SGeert Uytterhoeven 	[TDSELCTRL] = { 0xe60603c0, },
6068*0256b6aeSGeert Uytterhoeven 	{ /* sentinel */ }
6069077365a9SGeert Uytterhoeven };
6070077365a9SGeert Uytterhoeven 
r8a77965_pin_to_pocctrl(unsigned int pin,u32 * pocctrl)6071b67fc1c6SGeert Uytterhoeven static int r8a77965_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
6072077365a9SGeert Uytterhoeven {
6073077365a9SGeert Uytterhoeven 	int bit = -EINVAL;
6074077365a9SGeert Uytterhoeven 
6075077365a9SGeert Uytterhoeven 	*pocctrl = pinmux_ioctrl_regs[POCCTRL].reg;
6076077365a9SGeert Uytterhoeven 
6077077365a9SGeert Uytterhoeven 	if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
6078077365a9SGeert Uytterhoeven 		bit = pin & 0x1f;
6079077365a9SGeert Uytterhoeven 
6080077365a9SGeert Uytterhoeven 	if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17))
6081077365a9SGeert Uytterhoeven 		bit = (pin & 0x1f) + 12;
6082077365a9SGeert Uytterhoeven 
6083077365a9SGeert Uytterhoeven 	return bit;
6084077365a9SGeert Uytterhoeven }
6085077365a9SGeert Uytterhoeven 
6086077365a9SGeert Uytterhoeven static const struct pinmux_bias_reg pinmux_bias_regs[] = {
6087077365a9SGeert Uytterhoeven 	{ PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) {
6088077365a9SGeert Uytterhoeven 		[ 0] = PIN_QSPI0_SPCLK,		/* QSPI0_SPCLK */
6089077365a9SGeert Uytterhoeven 		[ 1] = PIN_QSPI0_MOSI_IO0,	/* QSPI0_MOSI_IO0 */
6090077365a9SGeert Uytterhoeven 		[ 2] = PIN_QSPI0_MISO_IO1,	/* QSPI0_MISO_IO1 */
6091077365a9SGeert Uytterhoeven 		[ 3] = PIN_QSPI0_IO2,		/* QSPI0_IO2 */
6092077365a9SGeert Uytterhoeven 		[ 4] = PIN_QSPI0_IO3,		/* QSPI0_IO3 */
6093077365a9SGeert Uytterhoeven 		[ 5] = PIN_QSPI0_SSL,		/* QSPI0_SSL */
6094077365a9SGeert Uytterhoeven 		[ 6] = PIN_QSPI1_SPCLK,		/* QSPI1_SPCLK */
6095077365a9SGeert Uytterhoeven 		[ 7] = PIN_QSPI1_MOSI_IO0,	/* QSPI1_MOSI_IO0 */
6096077365a9SGeert Uytterhoeven 		[ 8] = PIN_QSPI1_MISO_IO1,	/* QSPI1_MISO_IO1 */
6097077365a9SGeert Uytterhoeven 		[ 9] = PIN_QSPI1_IO2,		/* QSPI1_IO2 */
6098077365a9SGeert Uytterhoeven 		[10] = PIN_QSPI1_IO3,		/* QSPI1_IO3 */
6099077365a9SGeert Uytterhoeven 		[11] = PIN_QSPI1_SSL,		/* QSPI1_SSL */
6100077365a9SGeert Uytterhoeven 		[12] = PIN_RPC_INT_N,		/* RPC_INT# */
6101077365a9SGeert Uytterhoeven 		[13] = PIN_RPC_WP_N,		/* RPC_WP# */
6102077365a9SGeert Uytterhoeven 		[14] = PIN_RPC_RESET_N,		/* RPC_RESET# */
6103077365a9SGeert Uytterhoeven 		[15] = PIN_AVB_RX_CTL,		/* AVB_RX_CTL */
6104077365a9SGeert Uytterhoeven 		[16] = PIN_AVB_RXC,		/* AVB_RXC */
6105077365a9SGeert Uytterhoeven 		[17] = PIN_AVB_RD0,		/* AVB_RD0 */
6106077365a9SGeert Uytterhoeven 		[18] = PIN_AVB_RD1,		/* AVB_RD1 */
6107077365a9SGeert Uytterhoeven 		[19] = PIN_AVB_RD2,		/* AVB_RD2 */
6108077365a9SGeert Uytterhoeven 		[20] = PIN_AVB_RD3,		/* AVB_RD3 */
6109077365a9SGeert Uytterhoeven 		[21] = PIN_AVB_TX_CTL,		/* AVB_TX_CTL */
6110077365a9SGeert Uytterhoeven 		[22] = PIN_AVB_TXC,		/* AVB_TXC */
6111077365a9SGeert Uytterhoeven 		[23] = PIN_AVB_TD0,		/* AVB_TD0 */
6112077365a9SGeert Uytterhoeven 		[24] = PIN_AVB_TD1,		/* AVB_TD1 */
6113077365a9SGeert Uytterhoeven 		[25] = PIN_AVB_TD2,		/* AVB_TD2 */
6114077365a9SGeert Uytterhoeven 		[26] = PIN_AVB_TD3,		/* AVB_TD3 */
6115077365a9SGeert Uytterhoeven 		[27] = PIN_AVB_TXCREFCLK,	/* AVB_TXCREFCLK */
6116077365a9SGeert Uytterhoeven 		[28] = PIN_AVB_MDIO,		/* AVB_MDIO */
6117077365a9SGeert Uytterhoeven 		[29] = RCAR_GP_PIN(2,  9),	/* AVB_MDC */
6118077365a9SGeert Uytterhoeven 		[30] = RCAR_GP_PIN(2, 10),	/* AVB_MAGIC */
6119077365a9SGeert Uytterhoeven 		[31] = RCAR_GP_PIN(2, 11),	/* AVB_PHY_INT */
6120077365a9SGeert Uytterhoeven 	} },
6121077365a9SGeert Uytterhoeven 	{ PINMUX_BIAS_REG("PUEN1", 0xe6060404, "PUD1", 0xe6060444) {
6122077365a9SGeert Uytterhoeven 		[ 0] = RCAR_GP_PIN(2, 12),	/* AVB_LINK */
6123077365a9SGeert Uytterhoeven 		[ 1] = RCAR_GP_PIN(2, 13),	/* AVB_AVTP_MATCH_A */
6124077365a9SGeert Uytterhoeven 		[ 2] = RCAR_GP_PIN(2, 14),	/* AVB_AVTP_CAPTURE_A */
6125077365a9SGeert Uytterhoeven 		[ 3] = RCAR_GP_PIN(2,  0),	/* IRQ0 */
6126077365a9SGeert Uytterhoeven 		[ 4] = RCAR_GP_PIN(2,  1),	/* IRQ1 */
6127077365a9SGeert Uytterhoeven 		[ 5] = RCAR_GP_PIN(2,  2),	/* IRQ2 */
6128077365a9SGeert Uytterhoeven 		[ 6] = RCAR_GP_PIN(2,  3),	/* IRQ3 */
6129077365a9SGeert Uytterhoeven 		[ 7] = RCAR_GP_PIN(2,  4),	/* IRQ4 */
6130077365a9SGeert Uytterhoeven 		[ 8] = RCAR_GP_PIN(2,  5),	/* IRQ5 */
6131077365a9SGeert Uytterhoeven 		[ 9] = RCAR_GP_PIN(2,  6),	/* PWM0 */
6132077365a9SGeert Uytterhoeven 		[10] = RCAR_GP_PIN(2,  7),	/* PWM1_A */
6133077365a9SGeert Uytterhoeven 		[11] = RCAR_GP_PIN(2,  8),	/* PWM2_A */
6134077365a9SGeert Uytterhoeven 		[12] = RCAR_GP_PIN(1,  0),	/* A0 */
6135077365a9SGeert Uytterhoeven 		[13] = RCAR_GP_PIN(1,  1),	/* A1 */
6136077365a9SGeert Uytterhoeven 		[14] = RCAR_GP_PIN(1,  2),	/* A2 */
6137077365a9SGeert Uytterhoeven 		[15] = RCAR_GP_PIN(1,  3),	/* A3 */
6138077365a9SGeert Uytterhoeven 		[16] = RCAR_GP_PIN(1,  4),	/* A4 */
6139077365a9SGeert Uytterhoeven 		[17] = RCAR_GP_PIN(1,  5),	/* A5 */
6140077365a9SGeert Uytterhoeven 		[18] = RCAR_GP_PIN(1,  6),	/* A6 */
6141077365a9SGeert Uytterhoeven 		[19] = RCAR_GP_PIN(1,  7),	/* A7 */
6142077365a9SGeert Uytterhoeven 		[20] = RCAR_GP_PIN(1,  8),	/* A8 */
6143077365a9SGeert Uytterhoeven 		[21] = RCAR_GP_PIN(1,  9),	/* A9 */
6144077365a9SGeert Uytterhoeven 		[22] = RCAR_GP_PIN(1, 10),	/* A10 */
6145077365a9SGeert Uytterhoeven 		[23] = RCAR_GP_PIN(1, 11),	/* A11 */
6146077365a9SGeert Uytterhoeven 		[24] = RCAR_GP_PIN(1, 12),	/* A12 */
6147077365a9SGeert Uytterhoeven 		[25] = RCAR_GP_PIN(1, 13),	/* A13 */
6148077365a9SGeert Uytterhoeven 		[26] = RCAR_GP_PIN(1, 14),	/* A14 */
6149077365a9SGeert Uytterhoeven 		[27] = RCAR_GP_PIN(1, 15),	/* A15 */
6150077365a9SGeert Uytterhoeven 		[28] = RCAR_GP_PIN(1, 16),	/* A16 */
6151077365a9SGeert Uytterhoeven 		[29] = RCAR_GP_PIN(1, 17),	/* A17 */
6152077365a9SGeert Uytterhoeven 		[30] = RCAR_GP_PIN(1, 18),	/* A18 */
6153077365a9SGeert Uytterhoeven 		[31] = RCAR_GP_PIN(1, 19),	/* A19 */
6154077365a9SGeert Uytterhoeven 	} },
6155077365a9SGeert Uytterhoeven 	{ PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) {
6156077365a9SGeert Uytterhoeven 		[ 0] = RCAR_GP_PIN(1, 28),	/* CLKOUT */
6157077365a9SGeert Uytterhoeven 		[ 1] = RCAR_GP_PIN(1, 20),	/* CS0_N */
6158077365a9SGeert Uytterhoeven 		[ 2] = RCAR_GP_PIN(1, 21),	/* CS1_N */
6159077365a9SGeert Uytterhoeven 		[ 3] = RCAR_GP_PIN(1, 22),	/* BS_N */
6160077365a9SGeert Uytterhoeven 		[ 4] = RCAR_GP_PIN(1, 23),	/* RD_N */
6161077365a9SGeert Uytterhoeven 		[ 5] = RCAR_GP_PIN(1, 24),	/* RD_WR_N */
6162077365a9SGeert Uytterhoeven 		[ 6] = RCAR_GP_PIN(1, 25),	/* WE0_N */
6163077365a9SGeert Uytterhoeven 		[ 7] = RCAR_GP_PIN(1, 26),	/* WE1_N */
6164077365a9SGeert Uytterhoeven 		[ 8] = RCAR_GP_PIN(1, 27),	/* EX_WAIT0_A */
6165077365a9SGeert Uytterhoeven 		[ 9] = PIN_PRESETOUT_N,		/* PRESETOUT# */
6166077365a9SGeert Uytterhoeven 		[10] = RCAR_GP_PIN(0,  0),	/* D0 */
6167077365a9SGeert Uytterhoeven 		[11] = RCAR_GP_PIN(0,  1),	/* D1 */
6168077365a9SGeert Uytterhoeven 		[12] = RCAR_GP_PIN(0,  2),	/* D2 */
6169077365a9SGeert Uytterhoeven 		[13] = RCAR_GP_PIN(0,  3),	/* D3 */
6170077365a9SGeert Uytterhoeven 		[14] = RCAR_GP_PIN(0,  4),	/* D4 */
6171077365a9SGeert Uytterhoeven 		[15] = RCAR_GP_PIN(0,  5),	/* D5 */
6172077365a9SGeert Uytterhoeven 		[16] = RCAR_GP_PIN(0,  6),	/* D6 */
6173077365a9SGeert Uytterhoeven 		[17] = RCAR_GP_PIN(0,  7),	/* D7 */
6174077365a9SGeert Uytterhoeven 		[18] = RCAR_GP_PIN(0,  8),	/* D8 */
6175077365a9SGeert Uytterhoeven 		[19] = RCAR_GP_PIN(0,  9),	/* D9 */
6176077365a9SGeert Uytterhoeven 		[20] = RCAR_GP_PIN(0, 10),	/* D10 */
6177077365a9SGeert Uytterhoeven 		[21] = RCAR_GP_PIN(0, 11),	/* D11 */
6178077365a9SGeert Uytterhoeven 		[22] = RCAR_GP_PIN(0, 12),	/* D12 */
6179077365a9SGeert Uytterhoeven 		[23] = RCAR_GP_PIN(0, 13),	/* D13 */
6180077365a9SGeert Uytterhoeven 		[24] = RCAR_GP_PIN(0, 14),	/* D14 */
6181077365a9SGeert Uytterhoeven 		[25] = RCAR_GP_PIN(0, 15),	/* D15 */
6182077365a9SGeert Uytterhoeven 		[26] = RCAR_GP_PIN(7,  0),	/* AVS1 */
6183077365a9SGeert Uytterhoeven 		[27] = RCAR_GP_PIN(7,  1),	/* AVS2 */
6184077365a9SGeert Uytterhoeven 		[28] = RCAR_GP_PIN(7,  2),	/* GP7_02 */
6185077365a9SGeert Uytterhoeven 		[29] = RCAR_GP_PIN(7,  3),	/* GP7_03 */
6186077365a9SGeert Uytterhoeven 		[30] = PIN_DU_DOTCLKIN0,	/* DU_DOTCLKIN0 */
6187077365a9SGeert Uytterhoeven 		[31] = PIN_DU_DOTCLKIN1,	/* DU_DOTCLKIN1 */
6188077365a9SGeert Uytterhoeven 	} },
6189077365a9SGeert Uytterhoeven 	{ PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) {
6190077365a9SGeert Uytterhoeven 		[ 0] = SH_PFC_PIN_NONE,
6191077365a9SGeert Uytterhoeven 		[ 1] = PIN_DU_DOTCLKIN3,	/* DU_DOTCLKIN3 */
6192077365a9SGeert Uytterhoeven 		[ 2] = PIN_FSCLKST,		/* FSCLKST */
6193077365a9SGeert Uytterhoeven 		[ 3] = PIN_EXTALR,		/* EXTALR*/
6194077365a9SGeert Uytterhoeven 		[ 4] = PIN_TRST_N,		/* TRST# */
6195077365a9SGeert Uytterhoeven 		[ 5] = PIN_TCK,			/* TCK */
6196077365a9SGeert Uytterhoeven 		[ 6] = PIN_TMS,			/* TMS */
6197077365a9SGeert Uytterhoeven 		[ 7] = PIN_TDI,			/* TDI */
6198077365a9SGeert Uytterhoeven 		[ 8] = SH_PFC_PIN_NONE,
6199077365a9SGeert Uytterhoeven 		[ 9] = PIN_ASEBRK,		/* ASEBRK */
6200077365a9SGeert Uytterhoeven 		[10] = RCAR_GP_PIN(3,  0),	/* SD0_CLK */
6201077365a9SGeert Uytterhoeven 		[11] = RCAR_GP_PIN(3,  1),	/* SD0_CMD */
6202077365a9SGeert Uytterhoeven 		[12] = RCAR_GP_PIN(3,  2),	/* SD0_DAT0 */
6203077365a9SGeert Uytterhoeven 		[13] = RCAR_GP_PIN(3,  3),	/* SD0_DAT1 */
6204077365a9SGeert Uytterhoeven 		[14] = RCAR_GP_PIN(3,  4),	/* SD0_DAT2 */
6205077365a9SGeert Uytterhoeven 		[15] = RCAR_GP_PIN(3,  5),	/* SD0_DAT3 */
6206077365a9SGeert Uytterhoeven 		[16] = RCAR_GP_PIN(3,  6),	/* SD1_CLK */
6207077365a9SGeert Uytterhoeven 		[17] = RCAR_GP_PIN(3,  7),	/* SD1_CMD */
6208077365a9SGeert Uytterhoeven 		[18] = RCAR_GP_PIN(3,  8),	/* SD1_DAT0 */
6209077365a9SGeert Uytterhoeven 		[19] = RCAR_GP_PIN(3,  9),	/* SD1_DAT1 */
6210077365a9SGeert Uytterhoeven 		[20] = RCAR_GP_PIN(3, 10),	/* SD1_DAT2 */
6211077365a9SGeert Uytterhoeven 		[21] = RCAR_GP_PIN(3, 11),	/* SD1_DAT3 */
6212077365a9SGeert Uytterhoeven 		[22] = RCAR_GP_PIN(4,  0),	/* SD2_CLK */
6213077365a9SGeert Uytterhoeven 		[23] = RCAR_GP_PIN(4,  1),	/* SD2_CMD */
6214077365a9SGeert Uytterhoeven 		[24] = RCAR_GP_PIN(4,  2),	/* SD2_DAT0 */
6215077365a9SGeert Uytterhoeven 		[25] = RCAR_GP_PIN(4,  3),	/* SD2_DAT1 */
6216077365a9SGeert Uytterhoeven 		[26] = RCAR_GP_PIN(4,  4),	/* SD2_DAT2 */
6217077365a9SGeert Uytterhoeven 		[27] = RCAR_GP_PIN(4,  5),	/* SD2_DAT3 */
6218077365a9SGeert Uytterhoeven 		[28] = RCAR_GP_PIN(4,  6),	/* SD2_DS */
6219077365a9SGeert Uytterhoeven 		[29] = RCAR_GP_PIN(4,  7),	/* SD3_CLK */
6220077365a9SGeert Uytterhoeven 		[30] = RCAR_GP_PIN(4,  8),	/* SD3_CMD */
6221077365a9SGeert Uytterhoeven 		[31] = RCAR_GP_PIN(4,  9),	/* SD3_DAT0 */
6222077365a9SGeert Uytterhoeven 	} },
6223077365a9SGeert Uytterhoeven 	{ PINMUX_BIAS_REG("PUEN4", 0xe6060410, "PUD4", 0xe6060450) {
6224077365a9SGeert Uytterhoeven 		[ 0] = RCAR_GP_PIN(4, 10),	/* SD3_DAT1 */
6225077365a9SGeert Uytterhoeven 		[ 1] = RCAR_GP_PIN(4, 11),	/* SD3_DAT2 */
6226077365a9SGeert Uytterhoeven 		[ 2] = RCAR_GP_PIN(4, 12),	/* SD3_DAT3 */
6227077365a9SGeert Uytterhoeven 		[ 3] = RCAR_GP_PIN(4, 13),	/* SD3_DAT4 */
6228077365a9SGeert Uytterhoeven 		[ 4] = RCAR_GP_PIN(4, 14),	/* SD3_DAT5 */
6229077365a9SGeert Uytterhoeven 		[ 5] = RCAR_GP_PIN(4, 15),	/* SD3_DAT6 */
6230077365a9SGeert Uytterhoeven 		[ 6] = RCAR_GP_PIN(4, 16),	/* SD3_DAT7 */
6231077365a9SGeert Uytterhoeven 		[ 7] = RCAR_GP_PIN(4, 17),	/* SD3_DS */
6232077365a9SGeert Uytterhoeven 		[ 8] = RCAR_GP_PIN(3, 12),	/* SD0_CD */
6233077365a9SGeert Uytterhoeven 		[ 9] = RCAR_GP_PIN(3, 13),	/* SD0_WP */
6234077365a9SGeert Uytterhoeven 		[10] = RCAR_GP_PIN(3, 14),	/* SD1_CD */
6235077365a9SGeert Uytterhoeven 		[11] = RCAR_GP_PIN(3, 15),	/* SD1_WP */
6236077365a9SGeert Uytterhoeven 		[12] = RCAR_GP_PIN(5,  0),	/* SCK0 */
6237077365a9SGeert Uytterhoeven 		[13] = RCAR_GP_PIN(5,  1),	/* RX0 */
6238077365a9SGeert Uytterhoeven 		[14] = RCAR_GP_PIN(5,  2),	/* TX0 */
6239077365a9SGeert Uytterhoeven 		[15] = RCAR_GP_PIN(5,  3),	/* CTS0_N */
6240077365a9SGeert Uytterhoeven 		[16] = RCAR_GP_PIN(5,  4),	/* RTS0_N */
6241077365a9SGeert Uytterhoeven 		[17] = RCAR_GP_PIN(5,  5),	/* RX1_A */
6242077365a9SGeert Uytterhoeven 		[18] = RCAR_GP_PIN(5,  6),	/* TX1_A */
6243077365a9SGeert Uytterhoeven 		[19] = RCAR_GP_PIN(5,  7),	/* CTS1_N */
6244077365a9SGeert Uytterhoeven 		[20] = RCAR_GP_PIN(5,  8),	/* RTS1_N */
6245077365a9SGeert Uytterhoeven 		[21] = RCAR_GP_PIN(5,  9),	/* SCK2 */
6246077365a9SGeert Uytterhoeven 		[22] = RCAR_GP_PIN(5, 10),	/* TX2_A */
6247077365a9SGeert Uytterhoeven 		[23] = RCAR_GP_PIN(5, 11),	/* RX2_A */
6248077365a9SGeert Uytterhoeven 		[24] = RCAR_GP_PIN(5, 12),	/* HSCK0 */
6249077365a9SGeert Uytterhoeven 		[25] = RCAR_GP_PIN(5, 13),	/* HRX0 */
6250077365a9SGeert Uytterhoeven 		[26] = RCAR_GP_PIN(5, 14),	/* HTX0 */
6251077365a9SGeert Uytterhoeven 		[27] = RCAR_GP_PIN(5, 15),	/* HCTS0_N */
6252077365a9SGeert Uytterhoeven 		[28] = RCAR_GP_PIN(5, 16),	/* HRTS0_N */
6253077365a9SGeert Uytterhoeven 		[29] = RCAR_GP_PIN(5, 17),	/* MSIOF0_SCK */
6254077365a9SGeert Uytterhoeven 		[30] = RCAR_GP_PIN(5, 18),	/* MSIOF0_SYNC */
6255077365a9SGeert Uytterhoeven 		[31] = RCAR_GP_PIN(5, 19),	/* MSIOF0_SS1 */
6256077365a9SGeert Uytterhoeven 	} },
6257077365a9SGeert Uytterhoeven 	{ PINMUX_BIAS_REG("PUEN5", 0xe6060414, "PUD5", 0xe6060454) {
6258077365a9SGeert Uytterhoeven 		[ 0] = RCAR_GP_PIN(5, 20),	/* MSIOF0_TXD */
6259077365a9SGeert Uytterhoeven 		[ 1] = RCAR_GP_PIN(5, 21),	/* MSIOF0_SS2 */
6260077365a9SGeert Uytterhoeven 		[ 2] = RCAR_GP_PIN(5, 22),	/* MSIOF0_RXD */
6261077365a9SGeert Uytterhoeven 		[ 3] = RCAR_GP_PIN(5, 23),	/* MLB_CLK */
6262077365a9SGeert Uytterhoeven 		[ 4] = RCAR_GP_PIN(5, 24),	/* MLB_SIG */
6263077365a9SGeert Uytterhoeven 		[ 5] = RCAR_GP_PIN(5, 25),	/* MLB_DAT */
6264077365a9SGeert Uytterhoeven 		[ 6] = PIN_MLB_REF,		/* MLB_REF */
6265077365a9SGeert Uytterhoeven 		[ 7] = RCAR_GP_PIN(6,  0),	/* SSI_SCK01239 */
6266077365a9SGeert Uytterhoeven 		[ 8] = RCAR_GP_PIN(6,  1),	/* SSI_WS01239 */
6267077365a9SGeert Uytterhoeven 		[ 9] = RCAR_GP_PIN(6,  2),	/* SSI_SDATA0 */
6268077365a9SGeert Uytterhoeven 		[10] = RCAR_GP_PIN(6,  3),	/* SSI_SDATA1_A */
6269077365a9SGeert Uytterhoeven 		[11] = RCAR_GP_PIN(6,  4),	/* SSI_SDATA2_A */
6270077365a9SGeert Uytterhoeven 		[12] = RCAR_GP_PIN(6,  5),	/* SSI_SCK349 */
6271077365a9SGeert Uytterhoeven 		[13] = RCAR_GP_PIN(6,  6),	/* SSI_WS349 */
6272077365a9SGeert Uytterhoeven 		[14] = RCAR_GP_PIN(6,  7),	/* SSI_SDATA3 */
6273077365a9SGeert Uytterhoeven 		[15] = RCAR_GP_PIN(6,  8),	/* SSI_SCK4 */
6274077365a9SGeert Uytterhoeven 		[16] = RCAR_GP_PIN(6,  9),	/* SSI_WS4 */
6275077365a9SGeert Uytterhoeven 		[17] = RCAR_GP_PIN(6, 10),	/* SSI_SDATA4 */
6276077365a9SGeert Uytterhoeven 		[18] = RCAR_GP_PIN(6, 11),	/* SSI_SCK5 */
6277077365a9SGeert Uytterhoeven 		[19] = RCAR_GP_PIN(6, 12),	/* SSI_WS5 */
6278077365a9SGeert Uytterhoeven 		[20] = RCAR_GP_PIN(6, 13),	/* SSI_SDATA5 */
6279077365a9SGeert Uytterhoeven 		[21] = RCAR_GP_PIN(6, 14),	/* SSI_SCK6 */
6280077365a9SGeert Uytterhoeven 		[22] = RCAR_GP_PIN(6, 15),	/* SSI_WS6 */
6281077365a9SGeert Uytterhoeven 		[23] = RCAR_GP_PIN(6, 16),	/* SSI_SDATA6 */
6282077365a9SGeert Uytterhoeven 		[24] = RCAR_GP_PIN(6, 17),	/* SSI_SCK78 */
6283077365a9SGeert Uytterhoeven 		[25] = RCAR_GP_PIN(6, 18),	/* SSI_WS78 */
6284077365a9SGeert Uytterhoeven 		[26] = RCAR_GP_PIN(6, 19),	/* SSI_SDATA7 */
6285077365a9SGeert Uytterhoeven 		[27] = RCAR_GP_PIN(6, 20),	/* SSI_SDATA8 */
6286077365a9SGeert Uytterhoeven 		[28] = RCAR_GP_PIN(6, 21),	/* SSI_SDATA9_A */
6287077365a9SGeert Uytterhoeven 		[29] = RCAR_GP_PIN(6, 22),	/* AUDIO_CLKA_A */
6288077365a9SGeert Uytterhoeven 		[30] = RCAR_GP_PIN(6, 23),	/* AUDIO_CLKB_B */
6289077365a9SGeert Uytterhoeven 		[31] = RCAR_GP_PIN(6, 24),	/* USB0_PWEN */
6290077365a9SGeert Uytterhoeven 	} },
6291077365a9SGeert Uytterhoeven 	{ PINMUX_BIAS_REG("PUEN6", 0xe6060418, "PUD6", 0xe6060458) {
6292077365a9SGeert Uytterhoeven 		[ 0] = RCAR_GP_PIN(6, 25),	/* USB0_OVC */
6293077365a9SGeert Uytterhoeven 		[ 1] = RCAR_GP_PIN(6, 26),	/* USB1_PWEN */
6294077365a9SGeert Uytterhoeven 		[ 2] = RCAR_GP_PIN(6, 27),	/* USB1_OVC */
6295077365a9SGeert Uytterhoeven 		[ 3] = RCAR_GP_PIN(6, 28),	/* USB30_PWEN */
6296077365a9SGeert Uytterhoeven 		[ 4] = RCAR_GP_PIN(6, 29),	/* USB30_OVC */
6297077365a9SGeert Uytterhoeven 		[ 5] = RCAR_GP_PIN(6, 30),	/* GP6_30 */
6298077365a9SGeert Uytterhoeven 		[ 6] = RCAR_GP_PIN(6, 31),	/* GP6_31 */
6299077365a9SGeert Uytterhoeven 		[ 7] = SH_PFC_PIN_NONE,
6300077365a9SGeert Uytterhoeven 		[ 8] = SH_PFC_PIN_NONE,
6301077365a9SGeert Uytterhoeven 		[ 9] = SH_PFC_PIN_NONE,
6302077365a9SGeert Uytterhoeven 		[10] = SH_PFC_PIN_NONE,
6303077365a9SGeert Uytterhoeven 		[11] = SH_PFC_PIN_NONE,
6304077365a9SGeert Uytterhoeven 		[12] = SH_PFC_PIN_NONE,
6305077365a9SGeert Uytterhoeven 		[13] = SH_PFC_PIN_NONE,
6306077365a9SGeert Uytterhoeven 		[14] = SH_PFC_PIN_NONE,
6307077365a9SGeert Uytterhoeven 		[15] = SH_PFC_PIN_NONE,
6308077365a9SGeert Uytterhoeven 		[16] = SH_PFC_PIN_NONE,
6309077365a9SGeert Uytterhoeven 		[17] = SH_PFC_PIN_NONE,
6310077365a9SGeert Uytterhoeven 		[18] = SH_PFC_PIN_NONE,
6311077365a9SGeert Uytterhoeven 		[19] = SH_PFC_PIN_NONE,
6312077365a9SGeert Uytterhoeven 		[20] = SH_PFC_PIN_NONE,
6313077365a9SGeert Uytterhoeven 		[21] = SH_PFC_PIN_NONE,
6314077365a9SGeert Uytterhoeven 		[22] = SH_PFC_PIN_NONE,
6315077365a9SGeert Uytterhoeven 		[23] = SH_PFC_PIN_NONE,
6316077365a9SGeert Uytterhoeven 		[24] = SH_PFC_PIN_NONE,
6317077365a9SGeert Uytterhoeven 		[25] = SH_PFC_PIN_NONE,
6318077365a9SGeert Uytterhoeven 		[26] = SH_PFC_PIN_NONE,
6319077365a9SGeert Uytterhoeven 		[27] = SH_PFC_PIN_NONE,
6320077365a9SGeert Uytterhoeven 		[28] = SH_PFC_PIN_NONE,
6321077365a9SGeert Uytterhoeven 		[29] = SH_PFC_PIN_NONE,
6322077365a9SGeert Uytterhoeven 		[30] = SH_PFC_PIN_NONE,
6323077365a9SGeert Uytterhoeven 		[31] = SH_PFC_PIN_NONE,
6324077365a9SGeert Uytterhoeven 	} },
6325*0256b6aeSGeert Uytterhoeven 	{ /* sentinel */ }
6326077365a9SGeert Uytterhoeven };
6327077365a9SGeert Uytterhoeven 
6328c614d12cSGeert Uytterhoeven static const struct sh_pfc_soc_operations r8a77965_pfc_ops = {
6329077365a9SGeert Uytterhoeven 	.pin_to_pocctrl = r8a77965_pin_to_pocctrl,
633027e768a4SGeert Uytterhoeven 	.get_bias = rcar_pinmux_get_bias,
633127e768a4SGeert Uytterhoeven 	.set_bias = rcar_pinmux_set_bias,
6332077365a9SGeert Uytterhoeven };
6333077365a9SGeert Uytterhoeven 
6334077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A774B1
6335077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a774b1_pinmux_info = {
6336077365a9SGeert Uytterhoeven 	.name = "r8a774b1_pfc",
6337c614d12cSGeert Uytterhoeven 	.ops = &r8a77965_pfc_ops,
6338077365a9SGeert Uytterhoeven 	.unlock_reg = 0xe6060000, /* PMMR */
6339077365a9SGeert Uytterhoeven 
6340077365a9SGeert Uytterhoeven 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
6341077365a9SGeert Uytterhoeven 
6342077365a9SGeert Uytterhoeven 	.pins = pinmux_pins,
6343077365a9SGeert Uytterhoeven 	.nr_pins = ARRAY_SIZE(pinmux_pins),
6344077365a9SGeert Uytterhoeven 	.groups = pinmux_groups.common,
6345077365a9SGeert Uytterhoeven 	.nr_groups = ARRAY_SIZE(pinmux_groups.common),
6346077365a9SGeert Uytterhoeven 	.functions = pinmux_functions.common,
6347077365a9SGeert Uytterhoeven 	.nr_functions = ARRAY_SIZE(pinmux_functions.common),
6348077365a9SGeert Uytterhoeven 
6349077365a9SGeert Uytterhoeven 	.cfg_regs = pinmux_config_regs,
6350077365a9SGeert Uytterhoeven 	.drive_regs = pinmux_drive_regs,
6351077365a9SGeert Uytterhoeven 	.bias_regs = pinmux_bias_regs,
6352077365a9SGeert Uytterhoeven 	.ioctrl_regs = pinmux_ioctrl_regs,
6353077365a9SGeert Uytterhoeven 
6354077365a9SGeert Uytterhoeven 	.pinmux_data = pinmux_data,
6355077365a9SGeert Uytterhoeven 	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
6356077365a9SGeert Uytterhoeven };
6357077365a9SGeert Uytterhoeven #endif
6358077365a9SGeert Uytterhoeven 
6359077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A77965
6360077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a77965_pinmux_info = {
6361077365a9SGeert Uytterhoeven 	.name = "r8a77965_pfc",
6362c614d12cSGeert Uytterhoeven 	.ops = &r8a77965_pfc_ops,
6363077365a9SGeert Uytterhoeven 	.unlock_reg = 0xe6060000, /* PMMR */
6364077365a9SGeert Uytterhoeven 
6365077365a9SGeert Uytterhoeven 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
6366077365a9SGeert Uytterhoeven 
6367077365a9SGeert Uytterhoeven 	.pins = pinmux_pins,
6368077365a9SGeert Uytterhoeven 	.nr_pins = ARRAY_SIZE(pinmux_pins),
6369077365a9SGeert Uytterhoeven 	.groups = pinmux_groups.common,
6370077365a9SGeert Uytterhoeven 	.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
6371077365a9SGeert Uytterhoeven 		ARRAY_SIZE(pinmux_groups.automotive),
6372077365a9SGeert Uytterhoeven 	.functions = pinmux_functions.common,
6373077365a9SGeert Uytterhoeven 	.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
6374077365a9SGeert Uytterhoeven 		ARRAY_SIZE(pinmux_functions.automotive),
6375077365a9SGeert Uytterhoeven 
6376077365a9SGeert Uytterhoeven 	.cfg_regs = pinmux_config_regs,
6377077365a9SGeert Uytterhoeven 	.drive_regs = pinmux_drive_regs,
6378077365a9SGeert Uytterhoeven 	.bias_regs = pinmux_bias_regs,
6379077365a9SGeert Uytterhoeven 	.ioctrl_regs = pinmux_ioctrl_regs,
6380077365a9SGeert Uytterhoeven 
6381077365a9SGeert Uytterhoeven 	.pinmux_data = pinmux_data,
6382077365a9SGeert Uytterhoeven 	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
6383077365a9SGeert Uytterhoeven };
6384077365a9SGeert Uytterhoeven #endif
6385