1077365a9SGeert Uytterhoeven // SPDX-License-Identifier: GPL-2.0
2077365a9SGeert Uytterhoeven /*
3077365a9SGeert Uytterhoeven * R8A77970 processor support - PFC hardware block.
4077365a9SGeert Uytterhoeven *
5077365a9SGeert Uytterhoeven * Copyright (C) 2016 Renesas Electronics Corp.
6077365a9SGeert Uytterhoeven * Copyright (C) 2017 Cogent Embedded, Inc. <source@cogentembedded.com>
7077365a9SGeert Uytterhoeven *
8077365a9SGeert Uytterhoeven * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c
9077365a9SGeert Uytterhoeven *
10077365a9SGeert Uytterhoeven * R-Car Gen3 processor support - PFC hardware block.
11077365a9SGeert Uytterhoeven *
12077365a9SGeert Uytterhoeven * Copyright (C) 2015 Renesas Electronics Corporation
13077365a9SGeert Uytterhoeven */
14077365a9SGeert Uytterhoeven
15077365a9SGeert Uytterhoeven #include <linux/errno.h>
16077365a9SGeert Uytterhoeven #include <linux/io.h>
17077365a9SGeert Uytterhoeven #include <linux/kernel.h>
18077365a9SGeert Uytterhoeven
19077365a9SGeert Uytterhoeven #include "sh_pfc.h"
20077365a9SGeert Uytterhoeven
21077365a9SGeert Uytterhoeven #define CPU_ALL_GP(fn, sfx) \
22a3ca1e18SGeert Uytterhoeven PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP_DOWN), \
23b764833eSGeert Uytterhoeven PORT_GP_CFG_28(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP_DOWN), \
24a3ca1e18SGeert Uytterhoeven PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP_DOWN), \
25a3ca1e18SGeert Uytterhoeven PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 | SH_PFC_PIN_CFG_PULL_UP_DOWN), \
26b764833eSGeert Uytterhoeven PORT_GP_CFG_6(4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP_DOWN), \
27b764833eSGeert Uytterhoeven PORT_GP_CFG_15(5, fn, sfx, SH_PFC_PIN_CFG_PULL_UP_DOWN)
28b764833eSGeert Uytterhoeven
29b764833eSGeert Uytterhoeven #define CPU_ALL_NOGP(fn) \
30b764833eSGeert Uytterhoeven PIN_NOGP_CFG(DU_DOTCLKIN, "DU_DOTCLKIN", fn, SH_PFC_PIN_CFG_PULL_DOWN), \
31b764833eSGeert Uytterhoeven PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_DOWN), \
32b764833eSGeert Uytterhoeven PIN_NOGP_CFG(FSCLKST_N, "FSCLKST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \
33b764833eSGeert Uytterhoeven PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \
34b764833eSGeert Uytterhoeven PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP), \
35b764833eSGeert Uytterhoeven PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP), \
36b764833eSGeert Uytterhoeven PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP), \
37a7bebdc5SGeert Uytterhoeven PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP), \
38a7bebdc5SGeert Uytterhoeven PIN_NOGP_CFG(VDDQ_AVB0, "VDDQ_AVB0", fn, SH_PFC_PIN_CFG_IO_VOLTAGE_25_33)
39b764833eSGeert Uytterhoeven
40077365a9SGeert Uytterhoeven /*
41077365a9SGeert Uytterhoeven * F_() : just information
42077365a9SGeert Uytterhoeven * FM() : macro for FN_xxx / xxx_MARK
43077365a9SGeert Uytterhoeven */
44077365a9SGeert Uytterhoeven
45077365a9SGeert Uytterhoeven /* GPSR0 */
46077365a9SGeert Uytterhoeven #define GPSR0_21 F_(DU_EXODDF_DU_ODDF_DISP_CDE, IP2_23_20)
47077365a9SGeert Uytterhoeven #define GPSR0_20 F_(DU_EXVSYNC_DU_VSYNC, IP2_19_16)
48077365a9SGeert Uytterhoeven #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
49077365a9SGeert Uytterhoeven #define GPSR0_18 F_(DU_DOTCLKOUT, IP2_11_8)
50077365a9SGeert Uytterhoeven #define GPSR0_17 F_(DU_DB7, IP2_7_4)
51077365a9SGeert Uytterhoeven #define GPSR0_16 F_(DU_DB6, IP2_3_0)
52077365a9SGeert Uytterhoeven #define GPSR0_15 F_(DU_DB5, IP1_31_28)
53077365a9SGeert Uytterhoeven #define GPSR0_14 F_(DU_DB4, IP1_27_24)
54077365a9SGeert Uytterhoeven #define GPSR0_13 F_(DU_DB3, IP1_23_20)
55077365a9SGeert Uytterhoeven #define GPSR0_12 F_(DU_DB2, IP1_19_16)
56077365a9SGeert Uytterhoeven #define GPSR0_11 F_(DU_DG7, IP1_15_12)
57077365a9SGeert Uytterhoeven #define GPSR0_10 F_(DU_DG6, IP1_11_8)
58077365a9SGeert Uytterhoeven #define GPSR0_9 F_(DU_DG5, IP1_7_4)
59077365a9SGeert Uytterhoeven #define GPSR0_8 F_(DU_DG4, IP1_3_0)
60077365a9SGeert Uytterhoeven #define GPSR0_7 F_(DU_DG3, IP0_31_28)
61077365a9SGeert Uytterhoeven #define GPSR0_6 F_(DU_DG2, IP0_27_24)
62077365a9SGeert Uytterhoeven #define GPSR0_5 F_(DU_DR7, IP0_23_20)
63077365a9SGeert Uytterhoeven #define GPSR0_4 F_(DU_DR6, IP0_19_16)
64077365a9SGeert Uytterhoeven #define GPSR0_3 F_(DU_DR5, IP0_15_12)
65077365a9SGeert Uytterhoeven #define GPSR0_2 F_(DU_DR4, IP0_11_8)
66077365a9SGeert Uytterhoeven #define GPSR0_1 F_(DU_DR3, IP0_7_4)
67077365a9SGeert Uytterhoeven #define GPSR0_0 F_(DU_DR2, IP0_3_0)
68077365a9SGeert Uytterhoeven
69077365a9SGeert Uytterhoeven /* GPSR1 */
70077365a9SGeert Uytterhoeven #define GPSR1_27 F_(DIGRF_CLKOUT, IP8_27_24)
71077365a9SGeert Uytterhoeven #define GPSR1_26 F_(DIGRF_CLKIN, IP8_23_20)
72077365a9SGeert Uytterhoeven #define GPSR1_25 F_(CANFD_CLK_A, IP8_19_16)
73077365a9SGeert Uytterhoeven #define GPSR1_24 F_(CANFD1_RX, IP8_15_12)
74077365a9SGeert Uytterhoeven #define GPSR1_23 F_(CANFD1_TX, IP8_11_8)
75077365a9SGeert Uytterhoeven #define GPSR1_22 F_(CANFD0_RX_A, IP8_7_4)
76077365a9SGeert Uytterhoeven #define GPSR1_21 F_(CANFD0_TX_A, IP8_3_0)
77077365a9SGeert Uytterhoeven #define GPSR1_20 F_(AVB0_AVTP_CAPTURE, IP7_31_28)
78077365a9SGeert Uytterhoeven #define GPSR1_19 FM(AVB0_AVTP_MATCH)
79077365a9SGeert Uytterhoeven #define GPSR1_18 FM(AVB0_LINK)
80077365a9SGeert Uytterhoeven #define GPSR1_17 FM(AVB0_PHY_INT)
81077365a9SGeert Uytterhoeven #define GPSR1_16 FM(AVB0_MAGIC)
82077365a9SGeert Uytterhoeven #define GPSR1_15 FM(AVB0_MDC)
83077365a9SGeert Uytterhoeven #define GPSR1_14 FM(AVB0_MDIO)
84077365a9SGeert Uytterhoeven #define GPSR1_13 FM(AVB0_TXCREFCLK)
85077365a9SGeert Uytterhoeven #define GPSR1_12 FM(AVB0_TD3)
86077365a9SGeert Uytterhoeven #define GPSR1_11 FM(AVB0_TD2)
87077365a9SGeert Uytterhoeven #define GPSR1_10 FM(AVB0_TD1)
88077365a9SGeert Uytterhoeven #define GPSR1_9 FM(AVB0_TD0)
89077365a9SGeert Uytterhoeven #define GPSR1_8 FM(AVB0_TXC)
90077365a9SGeert Uytterhoeven #define GPSR1_7 FM(AVB0_TX_CTL)
91077365a9SGeert Uytterhoeven #define GPSR1_6 FM(AVB0_RD3)
92077365a9SGeert Uytterhoeven #define GPSR1_5 FM(AVB0_RD2)
93077365a9SGeert Uytterhoeven #define GPSR1_4 FM(AVB0_RD1)
94077365a9SGeert Uytterhoeven #define GPSR1_3 FM(AVB0_RD0)
95077365a9SGeert Uytterhoeven #define GPSR1_2 FM(AVB0_RXC)
96077365a9SGeert Uytterhoeven #define GPSR1_1 FM(AVB0_RX_CTL)
97077365a9SGeert Uytterhoeven #define GPSR1_0 F_(IRQ0, IP2_27_24)
98077365a9SGeert Uytterhoeven
99077365a9SGeert Uytterhoeven /* GPSR2 */
100077365a9SGeert Uytterhoeven #define GPSR2_16 F_(VI0_FIELD, IP4_31_28)
101077365a9SGeert Uytterhoeven #define GPSR2_15 F_(VI0_DATA11, IP4_27_24)
102077365a9SGeert Uytterhoeven #define GPSR2_14 F_(VI0_DATA10, IP4_23_20)
103077365a9SGeert Uytterhoeven #define GPSR2_13 F_(VI0_DATA9, IP4_19_16)
104077365a9SGeert Uytterhoeven #define GPSR2_12 F_(VI0_DATA8, IP4_15_12)
105077365a9SGeert Uytterhoeven #define GPSR2_11 F_(VI0_DATA7, IP4_11_8)
106077365a9SGeert Uytterhoeven #define GPSR2_10 F_(VI0_DATA6, IP4_7_4)
107077365a9SGeert Uytterhoeven #define GPSR2_9 F_(VI0_DATA5, IP4_3_0)
108077365a9SGeert Uytterhoeven #define GPSR2_8 F_(VI0_DATA4, IP3_31_28)
109077365a9SGeert Uytterhoeven #define GPSR2_7 F_(VI0_DATA3, IP3_27_24)
110077365a9SGeert Uytterhoeven #define GPSR2_6 F_(VI0_DATA2, IP3_23_20)
111077365a9SGeert Uytterhoeven #define GPSR2_5 F_(VI0_DATA1, IP3_19_16)
112077365a9SGeert Uytterhoeven #define GPSR2_4 F_(VI0_DATA0, IP3_15_12)
113077365a9SGeert Uytterhoeven #define GPSR2_3 F_(VI0_VSYNC_N, IP3_11_8)
114077365a9SGeert Uytterhoeven #define GPSR2_2 F_(VI0_HSYNC_N, IP3_7_4)
115077365a9SGeert Uytterhoeven #define GPSR2_1 F_(VI0_CLKENB, IP3_3_0)
116077365a9SGeert Uytterhoeven #define GPSR2_0 F_(VI0_CLK, IP2_31_28)
117077365a9SGeert Uytterhoeven
118077365a9SGeert Uytterhoeven /* GPSR3 */
119077365a9SGeert Uytterhoeven #define GPSR3_16 F_(VI1_FIELD, IP7_3_0)
120077365a9SGeert Uytterhoeven #define GPSR3_15 F_(VI1_DATA11, IP6_31_28)
121077365a9SGeert Uytterhoeven #define GPSR3_14 F_(VI1_DATA10, IP6_27_24)
122077365a9SGeert Uytterhoeven #define GPSR3_13 F_(VI1_DATA9, IP6_23_20)
123077365a9SGeert Uytterhoeven #define GPSR3_12 F_(VI1_DATA8, IP6_19_16)
124077365a9SGeert Uytterhoeven #define GPSR3_11 F_(VI1_DATA7, IP6_15_12)
125077365a9SGeert Uytterhoeven #define GPSR3_10 F_(VI1_DATA6, IP6_11_8)
126077365a9SGeert Uytterhoeven #define GPSR3_9 F_(VI1_DATA5, IP6_7_4)
127077365a9SGeert Uytterhoeven #define GPSR3_8 F_(VI1_DATA4, IP6_3_0)
128077365a9SGeert Uytterhoeven #define GPSR3_7 F_(VI1_DATA3, IP5_31_28)
129077365a9SGeert Uytterhoeven #define GPSR3_6 F_(VI1_DATA2, IP5_27_24)
130077365a9SGeert Uytterhoeven #define GPSR3_5 F_(VI1_DATA1, IP5_23_20)
131077365a9SGeert Uytterhoeven #define GPSR3_4 F_(VI1_DATA0, IP5_19_16)
132077365a9SGeert Uytterhoeven #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12)
133077365a9SGeert Uytterhoeven #define GPSR3_2 F_(VI1_HSYNC_N, IP5_11_8)
134077365a9SGeert Uytterhoeven #define GPSR3_1 F_(VI1_CLKENB, IP5_7_4)
135077365a9SGeert Uytterhoeven #define GPSR3_0 F_(VI1_CLK, IP5_3_0)
136077365a9SGeert Uytterhoeven
137077365a9SGeert Uytterhoeven /* GPSR4 */
138077365a9SGeert Uytterhoeven #define GPSR4_5 F_(SDA2, IP7_27_24)
139077365a9SGeert Uytterhoeven #define GPSR4_4 F_(SCL2, IP7_23_20)
140077365a9SGeert Uytterhoeven #define GPSR4_3 F_(SDA1, IP7_19_16)
141077365a9SGeert Uytterhoeven #define GPSR4_2 F_(SCL1, IP7_15_12)
142077365a9SGeert Uytterhoeven #define GPSR4_1 F_(SDA0, IP7_11_8)
143077365a9SGeert Uytterhoeven #define GPSR4_0 F_(SCL0, IP7_7_4)
144077365a9SGeert Uytterhoeven
145077365a9SGeert Uytterhoeven /* GPSR5 */
146077365a9SGeert Uytterhoeven #define GPSR5_14 FM(RPC_INT_N)
147077365a9SGeert Uytterhoeven #define GPSR5_13 FM(RPC_WP_N)
148077365a9SGeert Uytterhoeven #define GPSR5_12 FM(RPC_RESET_N)
149077365a9SGeert Uytterhoeven #define GPSR5_11 FM(QSPI1_SSL)
150077365a9SGeert Uytterhoeven #define GPSR5_10 FM(QSPI1_IO3)
151077365a9SGeert Uytterhoeven #define GPSR5_9 FM(QSPI1_IO2)
152077365a9SGeert Uytterhoeven #define GPSR5_8 FM(QSPI1_MISO_IO1)
153077365a9SGeert Uytterhoeven #define GPSR5_7 FM(QSPI1_MOSI_IO0)
154077365a9SGeert Uytterhoeven #define GPSR5_6 FM(QSPI1_SPCLK)
155077365a9SGeert Uytterhoeven #define GPSR5_5 FM(QSPI0_SSL)
156077365a9SGeert Uytterhoeven #define GPSR5_4 FM(QSPI0_IO3)
157077365a9SGeert Uytterhoeven #define GPSR5_3 FM(QSPI0_IO2)
158077365a9SGeert Uytterhoeven #define GPSR5_2 FM(QSPI0_MISO_IO1)
159077365a9SGeert Uytterhoeven #define GPSR5_1 FM(QSPI0_MOSI_IO0)
160077365a9SGeert Uytterhoeven #define GPSR5_0 FM(QSPI0_SPCLK)
161077365a9SGeert Uytterhoeven
162077365a9SGeert Uytterhoeven
163077365a9SGeert Uytterhoeven /* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */
164077365a9SGeert Uytterhoeven #define IP0_3_0 FM(DU_DR2) FM(HSCK0) F_(0, 0) FM(A0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
165077365a9SGeert Uytterhoeven #define IP0_7_4 FM(DU_DR3) FM(HRTS0_N) F_(0, 0) FM(A1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
166077365a9SGeert Uytterhoeven #define IP0_11_8 FM(DU_DR4) FM(HCTS0_N) F_(0, 0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
167077365a9SGeert Uytterhoeven #define IP0_15_12 FM(DU_DR5) FM(HTX0) F_(0, 0) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
168077365a9SGeert Uytterhoeven #define IP0_19_16 FM(DU_DR6) FM(MSIOF3_RXD) F_(0, 0) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
169077365a9SGeert Uytterhoeven #define IP0_23_20 FM(DU_DR7) FM(MSIOF3_TXD) F_(0, 0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
170077365a9SGeert Uytterhoeven #define IP0_27_24 FM(DU_DG2) FM(MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
171077365a9SGeert Uytterhoeven #define IP0_31_28 FM(DU_DG3) FM(MSIOF3_SS2) F_(0, 0) FM(A7) FM(PWMFSW0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
172077365a9SGeert Uytterhoeven #define IP1_3_0 FM(DU_DG4) F_(0, 0) F_(0, 0) FM(A8) FM(FSO_CFE_0_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
173077365a9SGeert Uytterhoeven #define IP1_7_4 FM(DU_DG5) F_(0, 0) F_(0, 0) FM(A9) FM(FSO_CFE_1_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
174077365a9SGeert Uytterhoeven #define IP1_11_8 FM(DU_DG6) F_(0, 0) F_(0, 0) FM(A10) FM(FSO_TOE_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
175077365a9SGeert Uytterhoeven #define IP1_15_12 FM(DU_DG7) F_(0, 0) F_(0, 0) FM(A11) FM(IRQ1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
176077365a9SGeert Uytterhoeven #define IP1_19_16 FM(DU_DB2) F_(0, 0) F_(0, 0) FM(A12) FM(IRQ2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
177077365a9SGeert Uytterhoeven #define IP1_23_20 FM(DU_DB3) F_(0, 0) F_(0, 0) FM(A13) FM(FXR_CLKOUT1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
178077365a9SGeert Uytterhoeven #define IP1_27_24 FM(DU_DB4) F_(0, 0) F_(0, 0) FM(A14) FM(FXR_CLKOUT2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
179077365a9SGeert Uytterhoeven #define IP1_31_28 FM(DU_DB5) F_(0, 0) F_(0, 0) FM(A15) FM(FXR_TXENA_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
180077365a9SGeert Uytterhoeven #define IP2_3_0 FM(DU_DB6) F_(0, 0) F_(0, 0) FM(A16) FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
181077365a9SGeert Uytterhoeven #define IP2_7_4 FM(DU_DB7) F_(0, 0) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
182077365a9SGeert Uytterhoeven #define IP2_11_8 FM(DU_DOTCLKOUT) FM(SCIF_CLK_A) F_(0, 0) FM(A18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
183077365a9SGeert Uytterhoeven #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(HRX0) F_(0, 0) FM(A19) FM(IRQ3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
184077365a9SGeert Uytterhoeven #define IP2_19_16 FM(DU_EXVSYNC_DU_VSYNC) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
185077365a9SGeert Uytterhoeven #define IP2_23_20 FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
186077365a9SGeert Uytterhoeven #define IP2_27_24 FM(IRQ0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
187077365a9SGeert Uytterhoeven #define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
188077365a9SGeert Uytterhoeven #define IP3_3_0 FM(VI0_CLKENB) FM(MSIOF2_RXD) FM(RX3) FM(RD_WR_N) FM(HCTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
189077365a9SGeert Uytterhoeven #define IP3_7_4 FM(VI0_HSYNC_N) FM(MSIOF2_TXD) FM(TX3) F_(0, 0) FM(HRTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
190077365a9SGeert Uytterhoeven #define IP3_11_8 FM(VI0_VSYNC_N) FM(MSIOF2_SYNC) FM(CTS3_N) F_(0, 0) FM(HTX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
191077365a9SGeert Uytterhoeven #define IP3_15_12 FM(VI0_DATA0) FM(MSIOF2_SS1) FM(RTS3_N) F_(0, 0) FM(HRX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
192077365a9SGeert Uytterhoeven #define IP3_19_16 FM(VI0_DATA1) FM(MSIOF2_SS2) FM(SCK1) F_(0, 0) FM(SPEEDIN_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
193077365a9SGeert Uytterhoeven #define IP3_23_20 FM(VI0_DATA2) FM(AVB0_AVTP_PPS) FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
194077365a9SGeert Uytterhoeven #define IP3_27_24 FM(VI0_DATA3) FM(HSCK1) FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
195077365a9SGeert Uytterhoeven #define IP3_31_28 FM(VI0_DATA4) FM(HRTS1_N) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
196077365a9SGeert Uytterhoeven #define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
197077365a9SGeert Uytterhoeven #define IP4_7_4 FM(VI0_DATA6) FM(HTX1) FM(CTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
198077365a9SGeert Uytterhoeven #define IP4_11_8 FM(VI0_DATA7) FM(HRX1) FM(RTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
199077365a9SGeert Uytterhoeven #define IP4_15_12 FM(VI0_DATA8) FM(HSCK2) FM(PWM0_A) FM(A22) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
200077365a9SGeert Uytterhoeven #define IP4_19_16 FM(VI0_DATA9) FM(HCTS2_N) FM(PWM1_A) FM(A23) FM(FSO_CFE_0_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
201077365a9SGeert Uytterhoeven #define IP4_23_20 FM(VI0_DATA10) FM(HRTS2_N) FM(PWM2_A) FM(A24) FM(FSO_CFE_1_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
202077365a9SGeert Uytterhoeven #define IP4_27_24 FM(VI0_DATA11) FM(HTX2) FM(PWM3_A) FM(A25) FM(FSO_TOE_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
203077365a9SGeert Uytterhoeven #define IP4_31_28 FM(VI0_FIELD) FM(HRX2) FM(PWM4_A) FM(CS1_N) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
204077365a9SGeert Uytterhoeven #define IP5_3_0 FM(VI1_CLK) FM(MSIOF1_RXD) F_(0, 0) FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
205077365a9SGeert Uytterhoeven #define IP5_7_4 FM(VI1_CLKENB) FM(MSIOF1_TXD) F_(0, 0) FM(D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
206077365a9SGeert Uytterhoeven #define IP5_11_8 FM(VI1_HSYNC_N) FM(MSIOF1_SCK) F_(0, 0) FM(D1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
207077365a9SGeert Uytterhoeven #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
208077365a9SGeert Uytterhoeven #define IP5_19_16 FM(VI1_DATA0) FM(MSIOF1_SS1) F_(0, 0) FM(D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
209077365a9SGeert Uytterhoeven #define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
210077365a9SGeert Uytterhoeven #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
211077365a9SGeert Uytterhoeven #define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_D1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
212077365a9SGeert Uytterhoeven #define IP6_3_0 FM(VI1_DATA4) FM(CANFD_CLK_B) F_(0, 0) FM(D7) FM(MMC_D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
213077365a9SGeert Uytterhoeven #define IP6_7_4 FM(VI1_DATA5) F_(0, 0) FM(SCK4) FM(D8) FM(MMC_D3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
214077365a9SGeert Uytterhoeven #define IP6_11_8 FM(VI1_DATA6) F_(0, 0) FM(RX4) FM(D9) FM(MMC_CLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
215077365a9SGeert Uytterhoeven #define IP6_15_12 FM(VI1_DATA7) F_(0, 0) FM(TX4) FM(D10) FM(MMC_D4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
216077365a9SGeert Uytterhoeven #define IP6_19_16 FM(VI1_DATA8) F_(0, 0) FM(CTS4_N) FM(D11) FM(MMC_D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
217077365a9SGeert Uytterhoeven #define IP6_23_20 FM(VI1_DATA9) F_(0, 0) FM(RTS4_N) FM(D12) FM(MMC_D6) FM(SCL3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
218077365a9SGeert Uytterhoeven #define IP6_27_24 FM(VI1_DATA10) F_(0, 0) F_(0, 0) FM(D13) FM(MMC_D7) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
219077365a9SGeert Uytterhoeven #define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
220077365a9SGeert Uytterhoeven #define IP7_3_0 FM(VI1_FIELD) FM(SDA4) FM(IRQ5) FM(D15) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
221077365a9SGeert Uytterhoeven #define IP7_7_4 FM(SCL0) FM(DU_DR0) FM(TPU0TO0) FM(CLKOUT) F_(0, 0) FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
222077365a9SGeert Uytterhoeven #define IP7_11_8 FM(SDA0) FM(DU_DR1) FM(TPU0TO1) FM(BS_N) FM(SCK0) FM(MSIOF0_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
223077365a9SGeert Uytterhoeven #define IP7_15_12 FM(SCL1) FM(DU_DG0) FM(TPU0TO2) FM(RD_N) FM(CTS0_N) FM(MSIOF0_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
224077365a9SGeert Uytterhoeven #define IP7_19_16 FM(SDA1) FM(DU_DG1) FM(TPU0TO3) FM(WE0_N) FM(RTS0_N) FM(MSIOF0_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
225077365a9SGeert Uytterhoeven #define IP7_23_20 FM(SCL2) FM(DU_DB0) FM(TCLK1_A) FM(WE1_N) FM(RX0) FM(MSIOF0_SS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
226077365a9SGeert Uytterhoeven #define IP7_27_24 FM(SDA2) FM(DU_DB1) FM(TCLK2_A) FM(EX_WAIT0) FM(TX0) FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
227077365a9SGeert Uytterhoeven #define IP7_31_28 FM(AVB0_AVTP_CAPTURE) F_(0, 0) F_(0, 0) F_(0, 0) FM(FSCLKST2_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
228077365a9SGeert Uytterhoeven #define IP8_3_0 FM(CANFD0_TX_A) FM(FXR_TXDA) FM(PWM0_B) FM(DU_DISP) FM(FSCLKST2_N_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
229077365a9SGeert Uytterhoeven #define IP8_7_4 FM(CANFD0_RX_A) FM(RXDA_EXTFXR) FM(PWM1_B) FM(DU_CDE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
230077365a9SGeert Uytterhoeven #define IP8_11_8 FM(CANFD1_TX) FM(FXR_TXDB) FM(PWM2_B) FM(TCLK1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
231077365a9SGeert Uytterhoeven #define IP8_15_12 FM(CANFD1_RX) FM(RXDB_EXTFXR) FM(PWM3_B) FM(TCLK2_B) FM(RX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
232077365a9SGeert Uytterhoeven #define IP8_19_16 FM(CANFD_CLK_A) FM(CLK_EXTFXR) FM(PWM4_B) FM(SPEEDIN_B) FM(SCIF_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
233077365a9SGeert Uytterhoeven #define IP8_23_20 FM(DIGRF_CLKIN) FM(DIGRF_CLKEN_IN) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
234077365a9SGeert Uytterhoeven #define IP8_27_24 FM(DIGRF_CLKOUT) FM(DIGRF_CLKEN_OUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
235077365a9SGeert Uytterhoeven
236077365a9SGeert Uytterhoeven #define PINMUX_GPSR \
237077365a9SGeert Uytterhoeven \
238077365a9SGeert Uytterhoeven GPSR1_27 \
239077365a9SGeert Uytterhoeven GPSR1_26 \
240077365a9SGeert Uytterhoeven GPSR1_25 \
241077365a9SGeert Uytterhoeven GPSR1_24 \
242077365a9SGeert Uytterhoeven GPSR1_23 \
243077365a9SGeert Uytterhoeven GPSR1_22 \
244077365a9SGeert Uytterhoeven GPSR0_21 GPSR1_21 \
245077365a9SGeert Uytterhoeven GPSR0_20 GPSR1_20 \
246077365a9SGeert Uytterhoeven GPSR0_19 GPSR1_19 \
247077365a9SGeert Uytterhoeven GPSR0_18 GPSR1_18 \
248077365a9SGeert Uytterhoeven GPSR0_17 GPSR1_17 \
249077365a9SGeert Uytterhoeven GPSR0_16 GPSR1_16 GPSR2_16 GPSR3_16 \
250077365a9SGeert Uytterhoeven GPSR0_15 GPSR1_15 GPSR2_15 GPSR3_15 \
251077365a9SGeert Uytterhoeven GPSR0_14 GPSR1_14 GPSR2_14 GPSR3_14 GPSR5_14 \
252077365a9SGeert Uytterhoeven GPSR0_13 GPSR1_13 GPSR2_13 GPSR3_13 GPSR5_13 \
253077365a9SGeert Uytterhoeven GPSR0_12 GPSR1_12 GPSR2_12 GPSR3_12 GPSR5_12 \
254077365a9SGeert Uytterhoeven GPSR0_11 GPSR1_11 GPSR2_11 GPSR3_11 GPSR5_11 \
255077365a9SGeert Uytterhoeven GPSR0_10 GPSR1_10 GPSR2_10 GPSR3_10 GPSR5_10 \
256077365a9SGeert Uytterhoeven GPSR0_9 GPSR1_9 GPSR2_9 GPSR3_9 GPSR5_9 \
257077365a9SGeert Uytterhoeven GPSR0_8 GPSR1_8 GPSR2_8 GPSR3_8 GPSR5_8 \
258077365a9SGeert Uytterhoeven GPSR0_7 GPSR1_7 GPSR2_7 GPSR3_7 GPSR5_7 \
259077365a9SGeert Uytterhoeven GPSR0_6 GPSR1_6 GPSR2_6 GPSR3_6 GPSR5_6 \
260077365a9SGeert Uytterhoeven GPSR0_5 GPSR1_5 GPSR2_5 GPSR3_5 GPSR4_5 GPSR5_5 \
261077365a9SGeert Uytterhoeven GPSR0_4 GPSR1_4 GPSR2_4 GPSR3_4 GPSR4_4 GPSR5_4 \
262077365a9SGeert Uytterhoeven GPSR0_3 GPSR1_3 GPSR2_3 GPSR3_3 GPSR4_3 GPSR5_3 \
263077365a9SGeert Uytterhoeven GPSR0_2 GPSR1_2 GPSR2_2 GPSR3_2 GPSR4_2 GPSR5_2 \
264077365a9SGeert Uytterhoeven GPSR0_1 GPSR1_1 GPSR2_1 GPSR3_1 GPSR4_1 GPSR5_1 \
265077365a9SGeert Uytterhoeven GPSR0_0 GPSR1_0 GPSR2_0 GPSR3_0 GPSR4_0 GPSR5_0
266077365a9SGeert Uytterhoeven
267077365a9SGeert Uytterhoeven #define PINMUX_IPSR \
268077365a9SGeert Uytterhoeven \
269077365a9SGeert Uytterhoeven FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
270077365a9SGeert Uytterhoeven FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
271077365a9SGeert Uytterhoeven FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
272077365a9SGeert Uytterhoeven FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
273077365a9SGeert Uytterhoeven FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
274077365a9SGeert Uytterhoeven FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
275077365a9SGeert Uytterhoeven FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
276077365a9SGeert Uytterhoeven FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \
277077365a9SGeert Uytterhoeven \
278077365a9SGeert Uytterhoeven FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
279077365a9SGeert Uytterhoeven FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
280077365a9SGeert Uytterhoeven FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
281077365a9SGeert Uytterhoeven FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
282077365a9SGeert Uytterhoeven FM(IP4_19_16) IP4_19_16 FM(IP5_19_16) IP5_19_16 FM(IP6_19_16) IP6_19_16 FM(IP7_19_16) IP7_19_16 \
283077365a9SGeert Uytterhoeven FM(IP4_23_20) IP4_23_20 FM(IP5_23_20) IP5_23_20 FM(IP6_23_20) IP6_23_20 FM(IP7_23_20) IP7_23_20 \
284077365a9SGeert Uytterhoeven FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
285077365a9SGeert Uytterhoeven FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
286077365a9SGeert Uytterhoeven \
287077365a9SGeert Uytterhoeven FM(IP8_3_0) IP8_3_0 \
288077365a9SGeert Uytterhoeven FM(IP8_7_4) IP8_7_4 \
289077365a9SGeert Uytterhoeven FM(IP8_11_8) IP8_11_8 \
290077365a9SGeert Uytterhoeven FM(IP8_15_12) IP8_15_12 \
291077365a9SGeert Uytterhoeven FM(IP8_19_16) IP8_19_16 \
292077365a9SGeert Uytterhoeven FM(IP8_23_20) IP8_23_20 \
29337362c77SGeert Uytterhoeven FM(IP8_27_24) IP8_27_24
294077365a9SGeert Uytterhoeven
295077365a9SGeert Uytterhoeven /* MOD_SEL0 */ /* 0 */ /* 1 */
296077365a9SGeert Uytterhoeven #define MOD_SEL0_11 FM(SEL_I2C3_0) FM(SEL_I2C3_1)
297077365a9SGeert Uytterhoeven #define MOD_SEL0_10 FM(SEL_HSCIF0_0) FM(SEL_HSCIF0_1)
298077365a9SGeert Uytterhoeven #define MOD_SEL0_9 FM(SEL_SCIF1_0) FM(SEL_SCIF1_1)
299077365a9SGeert Uytterhoeven #define MOD_SEL0_8 FM(SEL_CANFD0_0) FM(SEL_CANFD0_1)
300077365a9SGeert Uytterhoeven #define MOD_SEL0_7 FM(SEL_PWM4_0) FM(SEL_PWM4_1)
301077365a9SGeert Uytterhoeven #define MOD_SEL0_6 FM(SEL_PWM3_0) FM(SEL_PWM3_1)
302077365a9SGeert Uytterhoeven #define MOD_SEL0_5 FM(SEL_PWM2_0) FM(SEL_PWM2_1)
303077365a9SGeert Uytterhoeven #define MOD_SEL0_4 FM(SEL_PWM1_0) FM(SEL_PWM1_1)
304077365a9SGeert Uytterhoeven #define MOD_SEL0_3 FM(SEL_PWM0_0) FM(SEL_PWM0_1)
305077365a9SGeert Uytterhoeven #define MOD_SEL0_2 FM(SEL_RFSO_0) FM(SEL_RFSO_1)
306077365a9SGeert Uytterhoeven #define MOD_SEL0_1 FM(SEL_RSP_0) FM(SEL_RSP_1)
307077365a9SGeert Uytterhoeven #define MOD_SEL0_0 FM(SEL_TMU_0) FM(SEL_TMU_1)
308077365a9SGeert Uytterhoeven
309077365a9SGeert Uytterhoeven #define PINMUX_MOD_SELS \
310077365a9SGeert Uytterhoeven \
311077365a9SGeert Uytterhoeven MOD_SEL0_11 \
312077365a9SGeert Uytterhoeven MOD_SEL0_10 \
313077365a9SGeert Uytterhoeven MOD_SEL0_9 \
314077365a9SGeert Uytterhoeven MOD_SEL0_8 \
315077365a9SGeert Uytterhoeven MOD_SEL0_7 \
316077365a9SGeert Uytterhoeven MOD_SEL0_6 \
317077365a9SGeert Uytterhoeven MOD_SEL0_5 \
318077365a9SGeert Uytterhoeven MOD_SEL0_4 \
319077365a9SGeert Uytterhoeven MOD_SEL0_3 \
320077365a9SGeert Uytterhoeven MOD_SEL0_2 \
321077365a9SGeert Uytterhoeven MOD_SEL0_1 \
322077365a9SGeert Uytterhoeven MOD_SEL0_0
323077365a9SGeert Uytterhoeven
324077365a9SGeert Uytterhoeven enum {
325077365a9SGeert Uytterhoeven PINMUX_RESERVED = 0,
326077365a9SGeert Uytterhoeven
327077365a9SGeert Uytterhoeven PINMUX_DATA_BEGIN,
328077365a9SGeert Uytterhoeven GP_ALL(DATA),
329077365a9SGeert Uytterhoeven PINMUX_DATA_END,
330077365a9SGeert Uytterhoeven
331077365a9SGeert Uytterhoeven #define F_(x, y)
332077365a9SGeert Uytterhoeven #define FM(x) FN_##x,
333077365a9SGeert Uytterhoeven PINMUX_FUNCTION_BEGIN,
334077365a9SGeert Uytterhoeven GP_ALL(FN),
335077365a9SGeert Uytterhoeven PINMUX_GPSR
336077365a9SGeert Uytterhoeven PINMUX_IPSR
337077365a9SGeert Uytterhoeven PINMUX_MOD_SELS
338077365a9SGeert Uytterhoeven PINMUX_FUNCTION_END,
339077365a9SGeert Uytterhoeven #undef F_
340077365a9SGeert Uytterhoeven #undef FM
341077365a9SGeert Uytterhoeven
342077365a9SGeert Uytterhoeven #define F_(x, y)
343077365a9SGeert Uytterhoeven #define FM(x) x##_MARK,
344077365a9SGeert Uytterhoeven PINMUX_MARK_BEGIN,
345077365a9SGeert Uytterhoeven PINMUX_GPSR
346077365a9SGeert Uytterhoeven PINMUX_IPSR
347077365a9SGeert Uytterhoeven PINMUX_MOD_SELS
348077365a9SGeert Uytterhoeven PINMUX_MARK_END,
349077365a9SGeert Uytterhoeven #undef F_
350077365a9SGeert Uytterhoeven #undef FM
351077365a9SGeert Uytterhoeven };
352077365a9SGeert Uytterhoeven
353077365a9SGeert Uytterhoeven static const u16 pinmux_data[] = {
354077365a9SGeert Uytterhoeven PINMUX_DATA_GP_ALL(),
355077365a9SGeert Uytterhoeven
356077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_RX_CTL),
357077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_RXC),
358077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_RD0),
359077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_RD1),
360077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_RD2),
361077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_RD3),
362077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_TX_CTL),
363077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_TXC),
364077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_TD0),
365077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_TD1),
366077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_TD2),
367077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_TD3),
368077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_TXCREFCLK),
369077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_MDIO),
370077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_MDC),
371077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_MAGIC),
372077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_PHY_INT),
373077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_LINK),
374077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVB0_AVTP_MATCH),
375077365a9SGeert Uytterhoeven
376077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI0_SPCLK),
377077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI0_MOSI_IO0),
378077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI0_MISO_IO1),
379077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI0_IO2),
380077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI0_IO3),
381077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI0_SSL),
382077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI1_SPCLK),
383077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI1_MOSI_IO0),
384077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI1_MISO_IO1),
385077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI1_IO2),
386077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI1_IO3),
387077365a9SGeert Uytterhoeven PINMUX_SINGLE(QSPI1_SSL),
388077365a9SGeert Uytterhoeven PINMUX_SINGLE(RPC_RESET_N),
389077365a9SGeert Uytterhoeven PINMUX_SINGLE(RPC_WP_N),
390077365a9SGeert Uytterhoeven PINMUX_SINGLE(RPC_INT_N),
391077365a9SGeert Uytterhoeven
392077365a9SGeert Uytterhoeven /* IPSR0 */
393077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_3_0, DU_DR2),
394077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_3_0, HSCK0),
395077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_3_0, A0),
396077365a9SGeert Uytterhoeven
397077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_7_4, DU_DR3),
398077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_7_4, HRTS0_N),
399077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_7_4, A1),
400077365a9SGeert Uytterhoeven
401077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_11_8, DU_DR4),
402077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_11_8, HCTS0_N),
403077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_11_8, A2),
404077365a9SGeert Uytterhoeven
405077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
406077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_15_12, HTX0),
407077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_15_12, A3),
408077365a9SGeert Uytterhoeven
409077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_19_16, DU_DR6),
410077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_19_16, MSIOF3_RXD),
411077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_19_16, A4),
412077365a9SGeert Uytterhoeven
413077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_23_20, DU_DR7),
414077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_23_20, MSIOF3_TXD),
415077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_23_20, A5),
416077365a9SGeert Uytterhoeven
417077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
418077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_27_24, MSIOF3_SS1),
419077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_27_24, A6),
420077365a9SGeert Uytterhoeven
421077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_31_28, DU_DG3),
422077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_31_28, MSIOF3_SS2),
423077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_31_28, A7),
424077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_31_28, PWMFSW0),
425077365a9SGeert Uytterhoeven
426077365a9SGeert Uytterhoeven /* IPSR1 */
427077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_3_0, DU_DG4),
428077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_3_0, A8),
429077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_3_0, FSO_CFE_0_N_A, SEL_RFSO_0),
430077365a9SGeert Uytterhoeven
431077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
432077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_7_4, A9),
433077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_7_4, FSO_CFE_1_N_A, SEL_RFSO_0),
434077365a9SGeert Uytterhoeven
435077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
436077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_11_8, A10),
437077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, FSO_TOE_N_A, SEL_RFSO_0),
438077365a9SGeert Uytterhoeven
439077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_15_12, DU_DG7),
440077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_15_12, A11),
441077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_15_12, IRQ1),
442077365a9SGeert Uytterhoeven
443077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_19_16, DU_DB2),
444077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_19_16, A12),
445077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_19_16, IRQ2),
446077365a9SGeert Uytterhoeven
447077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_23_20, DU_DB3),
448077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_23_20, A13),
449077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_23_20, FXR_CLKOUT1),
450077365a9SGeert Uytterhoeven
451077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_24, DU_DB4),
452077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_24, A14),
453077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_24, FXR_CLKOUT2),
454077365a9SGeert Uytterhoeven
455077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_31_28, DU_DB5),
456077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_31_28, A15),
457077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_31_28, FXR_TXENA_N),
458077365a9SGeert Uytterhoeven
459077365a9SGeert Uytterhoeven /* IPSR2 */
460077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
461077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_3_0, A16),
462077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_3_0, FXR_TXENB_N),
463077365a9SGeert Uytterhoeven
464077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_7_4, DU_DB7),
465077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_7_4, A17),
466077365a9SGeert Uytterhoeven
467077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_11_8, DU_DOTCLKOUT),
468077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_11_8, SCIF_CLK_A, SEL_HSCIF0_0),
469077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_11_8, A18),
470077365a9SGeert Uytterhoeven
471077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
472077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_15_12, HRX0),
473077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_15_12, A19),
474077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_15_12, IRQ3),
475077365a9SGeert Uytterhoeven
476077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_19_16, DU_EXVSYNC_DU_VSYNC),
477077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_19_16, MSIOF3_SCK),
478077365a9SGeert Uytterhoeven
479077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_23_20, DU_EXODDF_DU_ODDF_DISP_CDE),
480077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_23_20, MSIOF3_SYNC),
481077365a9SGeert Uytterhoeven
482077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
483077365a9SGeert Uytterhoeven
484077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK),
485077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK),
486077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_31_28, SCK3),
487077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_31_28, HSCK3),
488077365a9SGeert Uytterhoeven
489077365a9SGeert Uytterhoeven /* IPSR3 */
490077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, VI0_CLKENB),
491077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_RXD),
492077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, RX3),
493077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, RD_WR_N),
494077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, HCTS3_N),
495077365a9SGeert Uytterhoeven
496077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, VI0_HSYNC_N),
497077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD),
498077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, TX3),
499077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, HRTS3_N),
500077365a9SGeert Uytterhoeven
501077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, VI0_VSYNC_N),
502077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_SYNC),
503077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, CTS3_N),
504077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, HTX3),
505077365a9SGeert Uytterhoeven
506077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_15_12, VI0_DATA0),
507077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_15_12, MSIOF2_SS1),
508077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_15_12, RTS3_N),
509077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_15_12, HRX3),
510077365a9SGeert Uytterhoeven
511077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_16, VI0_DATA1),
512077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_16, MSIOF2_SS2),
513077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_16, SCK1),
514077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_19_16, SPEEDIN_A, SEL_RSP_0),
515077365a9SGeert Uytterhoeven
516077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_23_20, VI0_DATA2),
517077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_23_20, AVB0_AVTP_PPS),
518077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_23_20, SDA3_A, SEL_I2C3_0),
519077365a9SGeert Uytterhoeven
520077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3),
521077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_27_24, HSCK1),
522077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_27_24, SCL3_A, SEL_I2C3_0),
523077365a9SGeert Uytterhoeven
524077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_31_28, VI0_DATA4),
525077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_31_28, HRTS1_N),
526077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_31_28, RX1_A, SEL_SCIF1_0),
527077365a9SGeert Uytterhoeven
528077365a9SGeert Uytterhoeven /* IPSR4 */
529077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_3_0, VI0_DATA5),
530077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_3_0, HCTS1_N),
531077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0),
532077365a9SGeert Uytterhoeven
533077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_7_4, VI0_DATA6),
534077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_7_4, HTX1),
535077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_7_4, CTS1_N),
536077365a9SGeert Uytterhoeven
537077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_11_8, VI0_DATA7),
538077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_11_8, HRX1),
539077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_11_8, RTS1_N),
540077365a9SGeert Uytterhoeven
541077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_15_12, VI0_DATA8),
542077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_15_12, HSCK2),
543077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_15_12, PWM0_A, SEL_PWM0_0),
544077365a9SGeert Uytterhoeven
545077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_19_16, VI0_DATA9),
546077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_19_16, HCTS2_N),
547077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_19_16, PWM1_A, SEL_PWM1_0),
548077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_19_16, FSO_CFE_0_N_B, SEL_RFSO_1),
549077365a9SGeert Uytterhoeven
550077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_23_20, VI0_DATA10),
551077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_23_20, HRTS2_N),
552077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_20, PWM2_A, SEL_PWM2_0),
553077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_20, FSO_CFE_1_N_B, SEL_RFSO_1),
554077365a9SGeert Uytterhoeven
555077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_27_24, VI0_DATA11),
556077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_27_24, HTX2),
557077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_27_24, PWM3_A, SEL_PWM3_0),
558077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_27_24, FSO_TOE_N_B, SEL_RFSO_1),
559077365a9SGeert Uytterhoeven
560077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_31_28, VI0_FIELD),
561077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_31_28, HRX2),
562077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_31_28, PWM4_A, SEL_PWM4_0),
563077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_31_28, CS1_N),
564077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_31_28, FSCLKST2_N_A),
565077365a9SGeert Uytterhoeven
566077365a9SGeert Uytterhoeven /* IPSR5 */
567077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_3_0, VI1_CLK),
568077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_3_0, MSIOF1_RXD),
569077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_3_0, CS0_N),
570077365a9SGeert Uytterhoeven
571077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_7_4, VI1_CLKENB),
572077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_7_4, MSIOF1_TXD),
573077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_7_4, D0),
574077365a9SGeert Uytterhoeven
575077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_8, VI1_HSYNC_N),
576077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_8, MSIOF1_SCK),
577077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_11_8, D1),
578077365a9SGeert Uytterhoeven
579077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),
580077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC),
581077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_15_12, D2),
582077365a9SGeert Uytterhoeven
583077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_19_16, VI1_DATA0),
584077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_19_16, MSIOF1_SS1),
585077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_19_16, D3),
586077365a9SGeert Uytterhoeven
587077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_20, VI1_DATA1),
588077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_20, MSIOF1_SS2),
589077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_20, D4),
590077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_20, MMC_CMD),
591077365a9SGeert Uytterhoeven
592077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_27_24, VI1_DATA2),
593077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_27_24, CANFD0_TX_B, SEL_CANFD0_1),
594077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_27_24, D5),
595077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_27_24, MMC_D0),
596077365a9SGeert Uytterhoeven
597077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_31_28, VI1_DATA3),
598077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_31_28, CANFD0_RX_B, SEL_CANFD0_1),
599077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_31_28, D6),
600077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_31_28, MMC_D1),
601077365a9SGeert Uytterhoeven
602077365a9SGeert Uytterhoeven /* IPSR6 */
603077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_3_0, VI1_DATA4),
604077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_3_0, CANFD_CLK_B, SEL_CANFD0_1),
605077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_3_0, D7),
606077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_3_0, MMC_D2),
607077365a9SGeert Uytterhoeven
608077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_7_4, VI1_DATA5),
609077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_7_4, SCK4),
610077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_7_4, D8),
611077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_7_4, MMC_D3),
612077365a9SGeert Uytterhoeven
613077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_11_8, VI1_DATA6),
614077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_11_8, RX4),
615077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_11_8, D9),
616077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_11_8, MMC_CLK),
617077365a9SGeert Uytterhoeven
618077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_12, VI1_DATA7),
619077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_12, TX4),
620077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_12, D10),
621077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_15_12, MMC_D4),
622077365a9SGeert Uytterhoeven
623077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_16, VI1_DATA8),
624077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_16, CTS4_N),
625077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_16, D11),
626077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_16, MMC_D5),
627077365a9SGeert Uytterhoeven
628077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_23_20, VI1_DATA9),
629077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_23_20, RTS4_N),
630077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_23_20, D12),
631077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_23_20, MMC_D6),
632077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_23_20, SCL3_B, SEL_I2C3_1),
633077365a9SGeert Uytterhoeven
634077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_27_24, VI1_DATA10),
635077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_27_24, D13),
636077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_27_24, MMC_D7),
637077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_27_24, SDA3_B, SEL_I2C3_1),
638077365a9SGeert Uytterhoeven
639077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_31_28, VI1_DATA11),
640077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_31_28, SCL4),
641077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_31_28, IRQ4),
642077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_31_28, D14),
643077365a9SGeert Uytterhoeven
644077365a9SGeert Uytterhoeven /* IPSR7 */
645077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_3_0, VI1_FIELD),
646077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_3_0, SDA4),
647077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_3_0, IRQ5),
648077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_3_0, D15),
649077365a9SGeert Uytterhoeven
650077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_4, SCL0),
651077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_4, DU_DR0),
652077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_4, TPU0TO0),
653077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_4, CLKOUT),
654077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_4, MSIOF0_RXD),
655077365a9SGeert Uytterhoeven
656077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, SDA0),
657077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, DU_DR1),
658077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, TPU0TO1),
659077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, BS_N),
660077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, SCK0),
661077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_11_8, MSIOF0_TXD),
662077365a9SGeert Uytterhoeven
663077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, SCL1),
664077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, DU_DG0),
665077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, TPU0TO2),
666077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, RD_N),
667077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, CTS0_N),
668077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_12, MSIOF0_SCK),
669077365a9SGeert Uytterhoeven
670077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, SDA1),
671077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, DU_DG1),
672077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, TPU0TO3),
673077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, WE0_N),
674077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, RTS0_N),
675077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_19_16, MSIOF0_SYNC),
676077365a9SGeert Uytterhoeven
677077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_20, SCL2),
678077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_20, DU_DB0),
679077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_23_20, TCLK1_A, SEL_TMU_0),
680077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_20, WE1_N),
681077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_20, RX0),
682077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_23_20, MSIOF0_SS1),
683077365a9SGeert Uytterhoeven
684077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_27_24, SDA2),
685077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_27_24, DU_DB1),
686077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_27_24, TCLK2_A, SEL_TMU_0),
687077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_27_24, EX_WAIT0),
688077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_27_24, TX0),
689077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_27_24, MSIOF0_SS2),
690077365a9SGeert Uytterhoeven
691077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_31_28, AVB0_AVTP_CAPTURE),
692077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_31_28, FSCLKST2_N_B),
693077365a9SGeert Uytterhoeven
694077365a9SGeert Uytterhoeven /* IPSR8 */
695077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_3_0, CANFD0_TX_A, SEL_CANFD0_0),
696077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_3_0, FXR_TXDA),
697077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_3_0, PWM0_B, SEL_PWM0_1),
698077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_3_0, DU_DISP),
699077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_3_0, FSCLKST2_N_C),
700077365a9SGeert Uytterhoeven
701077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_7_4, CANFD0_RX_A, SEL_CANFD0_0),
702077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_7_4, RXDA_EXTFXR),
703077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_7_4, PWM1_B, SEL_PWM1_1),
704077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_7_4, DU_CDE),
705077365a9SGeert Uytterhoeven
706077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_8, CANFD1_TX),
707077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_8, FXR_TXDB),
708077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_11_8, PWM2_B, SEL_PWM2_1),
709077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_11_8, TCLK1_B, SEL_TMU_1),
710077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_11_8, TX1_B, SEL_SCIF1_1),
711077365a9SGeert Uytterhoeven
712077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_15_12, CANFD1_RX),
713077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_15_12, RXDB_EXTFXR),
714077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_15_12, PWM3_B, SEL_PWM3_1),
715077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_15_12, TCLK2_B, SEL_TMU_1),
716077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_15_12, RX1_B, SEL_SCIF1_1),
717077365a9SGeert Uytterhoeven
718077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_19_16, CANFD_CLK_A, SEL_CANFD0_0),
719077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_19_16, CLK_EXTFXR),
720077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_19_16, PWM4_B, SEL_PWM4_1),
721077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_19_16, SPEEDIN_B, SEL_RSP_1),
722077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_19_16, SCIF_CLK_B, SEL_HSCIF0_1),
723077365a9SGeert Uytterhoeven
724077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_20, DIGRF_CLKIN),
725077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_20, DIGRF_CLKEN_IN),
726077365a9SGeert Uytterhoeven
727077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27_24, DIGRF_CLKOUT),
728077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27_24, DIGRF_CLKEN_OUT),
729077365a9SGeert Uytterhoeven };
730077365a9SGeert Uytterhoeven
731b764833eSGeert Uytterhoeven /*
732b764833eSGeert Uytterhoeven * Pins not associated with a GPIO port.
733b764833eSGeert Uytterhoeven */
734b764833eSGeert Uytterhoeven enum {
735b764833eSGeert Uytterhoeven GP_ASSIGN_LAST(),
736b764833eSGeert Uytterhoeven NOGP_ALL(),
737b764833eSGeert Uytterhoeven };
738b764833eSGeert Uytterhoeven
739077365a9SGeert Uytterhoeven static const struct sh_pfc_pin pinmux_pins[] = {
740077365a9SGeert Uytterhoeven PINMUX_GPIO_GP_ALL(),
741b764833eSGeert Uytterhoeven PINMUX_NOGP_ALL(),
742077365a9SGeert Uytterhoeven };
743077365a9SGeert Uytterhoeven
744077365a9SGeert Uytterhoeven /* - AVB0 ------------------------------------------------------------------- */
745077365a9SGeert Uytterhoeven static const unsigned int avb0_link_pins[] = {
746077365a9SGeert Uytterhoeven /* AVB0_LINK */
747077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 18),
748077365a9SGeert Uytterhoeven };
749077365a9SGeert Uytterhoeven static const unsigned int avb0_link_mux[] = {
750077365a9SGeert Uytterhoeven AVB0_LINK_MARK,
751077365a9SGeert Uytterhoeven };
752077365a9SGeert Uytterhoeven static const unsigned int avb0_magic_pins[] = {
753077365a9SGeert Uytterhoeven /* AVB0_MAGIC */
754077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16),
755077365a9SGeert Uytterhoeven };
756077365a9SGeert Uytterhoeven static const unsigned int avb0_magic_mux[] = {
757077365a9SGeert Uytterhoeven AVB0_MAGIC_MARK,
758077365a9SGeert Uytterhoeven };
759077365a9SGeert Uytterhoeven static const unsigned int avb0_phy_int_pins[] = {
760077365a9SGeert Uytterhoeven /* AVB0_PHY_INT */
761077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17),
762077365a9SGeert Uytterhoeven };
763077365a9SGeert Uytterhoeven static const unsigned int avb0_phy_int_mux[] = {
764077365a9SGeert Uytterhoeven AVB0_PHY_INT_MARK,
765077365a9SGeert Uytterhoeven };
766077365a9SGeert Uytterhoeven static const unsigned int avb0_mdio_pins[] = {
767077365a9SGeert Uytterhoeven /* AVB0_MDC, AVB0_MDIO */
768077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
769077365a9SGeert Uytterhoeven };
770077365a9SGeert Uytterhoeven static const unsigned int avb0_mdio_mux[] = {
771077365a9SGeert Uytterhoeven AVB0_MDC_MARK, AVB0_MDIO_MARK,
772077365a9SGeert Uytterhoeven };
773077365a9SGeert Uytterhoeven static const unsigned int avb0_rgmii_pins[] = {
774077365a9SGeert Uytterhoeven /*
775077365a9SGeert Uytterhoeven * AVB0_TX_CTL, AVB0_TXC, AVB0_TD0, AVB0_TD1, AVB0_TD2, AVB0_TD3,
776077365a9SGeert Uytterhoeven * AVB0_RX_CTL, AVB0_RXC, AVB0_RD0, AVB0_RD1, AVB0_RD2, AVB0_RD3
777077365a9SGeert Uytterhoeven */
778077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 8),
779077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 10),
780077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 12),
781077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 2),
782077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 4),
783077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),
784077365a9SGeert Uytterhoeven };
785077365a9SGeert Uytterhoeven static const unsigned int avb0_rgmii_mux[] = {
786077365a9SGeert Uytterhoeven AVB0_TX_CTL_MARK, AVB0_TXC_MARK,
787077365a9SGeert Uytterhoeven AVB0_TD0_MARK, AVB0_TD1_MARK, AVB0_TD2_MARK, AVB0_TD3_MARK,
788077365a9SGeert Uytterhoeven AVB0_RX_CTL_MARK, AVB0_RXC_MARK,
789077365a9SGeert Uytterhoeven AVB0_RD0_MARK, AVB0_RD1_MARK, AVB0_RD2_MARK, AVB0_RD3_MARK,
790077365a9SGeert Uytterhoeven };
791077365a9SGeert Uytterhoeven static const unsigned int avb0_txcrefclk_pins[] = {
792077365a9SGeert Uytterhoeven /* AVB0_TXCREFCLK */
793077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 13),
794077365a9SGeert Uytterhoeven };
795077365a9SGeert Uytterhoeven static const unsigned int avb0_txcrefclk_mux[] = {
796077365a9SGeert Uytterhoeven AVB0_TXCREFCLK_MARK,
797077365a9SGeert Uytterhoeven };
798077365a9SGeert Uytterhoeven static const unsigned int avb0_avtp_pps_pins[] = {
799077365a9SGeert Uytterhoeven /* AVB0_AVTP_PPS */
800077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 6),
801077365a9SGeert Uytterhoeven };
802077365a9SGeert Uytterhoeven static const unsigned int avb0_avtp_pps_mux[] = {
803077365a9SGeert Uytterhoeven AVB0_AVTP_PPS_MARK,
804077365a9SGeert Uytterhoeven };
805077365a9SGeert Uytterhoeven static const unsigned int avb0_avtp_capture_pins[] = {
806077365a9SGeert Uytterhoeven /* AVB0_AVTP_CAPTURE */
807077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 20),
808077365a9SGeert Uytterhoeven };
809077365a9SGeert Uytterhoeven static const unsigned int avb0_avtp_capture_mux[] = {
810077365a9SGeert Uytterhoeven AVB0_AVTP_CAPTURE_MARK,
811077365a9SGeert Uytterhoeven };
812077365a9SGeert Uytterhoeven static const unsigned int avb0_avtp_match_pins[] = {
813077365a9SGeert Uytterhoeven /* AVB0_AVTP_MATCH */
814077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 19),
815077365a9SGeert Uytterhoeven };
816077365a9SGeert Uytterhoeven static const unsigned int avb0_avtp_match_mux[] = {
817077365a9SGeert Uytterhoeven AVB0_AVTP_MATCH_MARK,
818077365a9SGeert Uytterhoeven };
819077365a9SGeert Uytterhoeven
820077365a9SGeert Uytterhoeven /* - CANFD Clock ------------------------------------------------------------ */
821077365a9SGeert Uytterhoeven static const unsigned int canfd_clk_a_pins[] = {
822077365a9SGeert Uytterhoeven /* CANFD_CLK */
823077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 25),
824077365a9SGeert Uytterhoeven };
825077365a9SGeert Uytterhoeven static const unsigned int canfd_clk_a_mux[] = {
826077365a9SGeert Uytterhoeven CANFD_CLK_A_MARK,
827077365a9SGeert Uytterhoeven };
828077365a9SGeert Uytterhoeven static const unsigned int canfd_clk_b_pins[] = {
829077365a9SGeert Uytterhoeven /* CANFD_CLK */
830077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8),
831077365a9SGeert Uytterhoeven };
832077365a9SGeert Uytterhoeven static const unsigned int canfd_clk_b_mux[] = {
833077365a9SGeert Uytterhoeven CANFD_CLK_B_MARK,
834077365a9SGeert Uytterhoeven };
835077365a9SGeert Uytterhoeven
836077365a9SGeert Uytterhoeven /* - CANFD0 ----------------------------------------------------------------- */
837077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_a_pins[] = {
838077365a9SGeert Uytterhoeven /* TX, RX */
839077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 21), RCAR_GP_PIN(1, 22),
840077365a9SGeert Uytterhoeven };
841077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_a_mux[] = {
842077365a9SGeert Uytterhoeven CANFD0_TX_A_MARK, CANFD0_RX_A_MARK,
843077365a9SGeert Uytterhoeven };
844077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_b_pins[] = {
845077365a9SGeert Uytterhoeven /* TX, RX */
846077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
847077365a9SGeert Uytterhoeven };
848077365a9SGeert Uytterhoeven static const unsigned int canfd0_data_b_mux[] = {
849077365a9SGeert Uytterhoeven CANFD0_TX_B_MARK, CANFD0_RX_B_MARK,
850077365a9SGeert Uytterhoeven };
851077365a9SGeert Uytterhoeven
852077365a9SGeert Uytterhoeven /* - CANFD1 ----------------------------------------------------------------- */
853077365a9SGeert Uytterhoeven static const unsigned int canfd1_data_pins[] = {
854077365a9SGeert Uytterhoeven /* TX, RX */
855077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
856077365a9SGeert Uytterhoeven };
857077365a9SGeert Uytterhoeven static const unsigned int canfd1_data_mux[] = {
858077365a9SGeert Uytterhoeven CANFD1_TX_MARK, CANFD1_RX_MARK,
859077365a9SGeert Uytterhoeven };
860077365a9SGeert Uytterhoeven
861077365a9SGeert Uytterhoeven /* - DU --------------------------------------------------------------------- */
862077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_pins[] = {
863077365a9SGeert Uytterhoeven /* R[7:2], G[7:2], B[7:2] */
864077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 3),
865077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 1), RCAR_GP_PIN(0, 0),
866077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 9),
867077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 6),
868077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 17), RCAR_GP_PIN(0, 16), RCAR_GP_PIN(0, 15),
869077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), RCAR_GP_PIN(0, 12),
870077365a9SGeert Uytterhoeven };
871077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_mux[] = {
872077365a9SGeert Uytterhoeven DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK,
873077365a9SGeert Uytterhoeven DU_DR4_MARK, DU_DR3_MARK, DU_DR2_MARK,
874077365a9SGeert Uytterhoeven DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK,
875077365a9SGeert Uytterhoeven DU_DG4_MARK, DU_DG3_MARK, DU_DG2_MARK,
876077365a9SGeert Uytterhoeven DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK,
877077365a9SGeert Uytterhoeven DU_DB4_MARK, DU_DB3_MARK, DU_DB2_MARK,
878077365a9SGeert Uytterhoeven };
879077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_pins[] = {
880077365a9SGeert Uytterhoeven /* DOTCLKOUT */
881077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 18),
882077365a9SGeert Uytterhoeven };
883077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_mux[] = {
884077365a9SGeert Uytterhoeven DU_DOTCLKOUT_MARK,
885077365a9SGeert Uytterhoeven };
886077365a9SGeert Uytterhoeven static const unsigned int du_sync_pins[] = {
887077365a9SGeert Uytterhoeven /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
888077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 19),
889077365a9SGeert Uytterhoeven };
890077365a9SGeert Uytterhoeven static const unsigned int du_sync_mux[] = {
891077365a9SGeert Uytterhoeven DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
892077365a9SGeert Uytterhoeven };
893077365a9SGeert Uytterhoeven static const unsigned int du_oddf_pins[] = {
894077365a9SGeert Uytterhoeven /* EXODDF/ODDF/DISP/CDE */
895077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 21),
896077365a9SGeert Uytterhoeven };
897077365a9SGeert Uytterhoeven static const unsigned int du_oddf_mux[] = {
898077365a9SGeert Uytterhoeven DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
899077365a9SGeert Uytterhoeven };
900077365a9SGeert Uytterhoeven static const unsigned int du_cde_pins[] = {
901077365a9SGeert Uytterhoeven /* CDE */
902077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22),
903077365a9SGeert Uytterhoeven };
904077365a9SGeert Uytterhoeven static const unsigned int du_cde_mux[] = {
905077365a9SGeert Uytterhoeven DU_CDE_MARK,
906077365a9SGeert Uytterhoeven };
907077365a9SGeert Uytterhoeven static const unsigned int du_disp_pins[] = {
908077365a9SGeert Uytterhoeven /* DISP */
909077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 21),
910077365a9SGeert Uytterhoeven };
911077365a9SGeert Uytterhoeven static const unsigned int du_disp_mux[] = {
912077365a9SGeert Uytterhoeven DU_DISP_MARK,
913077365a9SGeert Uytterhoeven };
914077365a9SGeert Uytterhoeven
915077365a9SGeert Uytterhoeven /* - HSCIF0 ----------------------------------------------------------------- */
916077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_pins[] = {
917077365a9SGeert Uytterhoeven /* HRX, HTX */
918077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 3),
919077365a9SGeert Uytterhoeven };
920077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_mux[] = {
921077365a9SGeert Uytterhoeven HRX0_MARK, HTX0_MARK,
922077365a9SGeert Uytterhoeven };
923077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_pins[] = {
924077365a9SGeert Uytterhoeven /* HSCK */
925077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 0),
926077365a9SGeert Uytterhoeven };
927077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_mux[] = {
928077365a9SGeert Uytterhoeven HSCK0_MARK,
929077365a9SGeert Uytterhoeven };
930077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_pins[] = {
931077365a9SGeert Uytterhoeven /* HRTS#, HCTS# */
932077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 1), RCAR_GP_PIN(0, 2),
933077365a9SGeert Uytterhoeven };
934077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_mux[] = {
935077365a9SGeert Uytterhoeven HRTS0_N_MARK, HCTS0_N_MARK,
936077365a9SGeert Uytterhoeven };
937077365a9SGeert Uytterhoeven
938077365a9SGeert Uytterhoeven /* - HSCIF1 ----------------------------------------------------------------- */
939077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_pins[] = {
940077365a9SGeert Uytterhoeven /* HRX, HTX */
941077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
942077365a9SGeert Uytterhoeven };
943077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_mux[] = {
944077365a9SGeert Uytterhoeven HRX1_MARK, HTX1_MARK,
945077365a9SGeert Uytterhoeven };
946077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_pins[] = {
947077365a9SGeert Uytterhoeven /* HSCK */
948077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7),
949077365a9SGeert Uytterhoeven };
950077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_mux[] = {
951077365a9SGeert Uytterhoeven HSCK1_MARK,
952077365a9SGeert Uytterhoeven };
953077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_pins[] = {
954077365a9SGeert Uytterhoeven /* HRTS#, HCTS# */
955077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
956077365a9SGeert Uytterhoeven };
957077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_mux[] = {
958077365a9SGeert Uytterhoeven HRTS1_N_MARK, HCTS1_N_MARK,
959077365a9SGeert Uytterhoeven };
960077365a9SGeert Uytterhoeven
961077365a9SGeert Uytterhoeven /* - HSCIF2 ----------------------------------------------------------------- */
962077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_pins[] = {
963077365a9SGeert Uytterhoeven /* HRX, HTX */
964077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 15),
965077365a9SGeert Uytterhoeven };
966077365a9SGeert Uytterhoeven static const unsigned int hscif2_data_mux[] = {
967077365a9SGeert Uytterhoeven HRX2_MARK, HTX2_MARK,
968077365a9SGeert Uytterhoeven };
969077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_pins[] = {
970077365a9SGeert Uytterhoeven /* HSCK */
971077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12),
972077365a9SGeert Uytterhoeven };
973077365a9SGeert Uytterhoeven static const unsigned int hscif2_clk_mux[] = {
974077365a9SGeert Uytterhoeven HSCK2_MARK,
975077365a9SGeert Uytterhoeven };
976077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_pins[] = {
977077365a9SGeert Uytterhoeven /* HRTS#, HCTS# */
978077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
979077365a9SGeert Uytterhoeven };
980077365a9SGeert Uytterhoeven static const unsigned int hscif2_ctrl_mux[] = {
981077365a9SGeert Uytterhoeven HRTS2_N_MARK, HCTS2_N_MARK,
982077365a9SGeert Uytterhoeven };
983077365a9SGeert Uytterhoeven
984077365a9SGeert Uytterhoeven /* - HSCIF3 ----------------------------------------------------------------- */
985077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_pins[] = {
986077365a9SGeert Uytterhoeven /* HRX, HTX */
987077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3),
988077365a9SGeert Uytterhoeven };
989077365a9SGeert Uytterhoeven static const unsigned int hscif3_data_mux[] = {
990077365a9SGeert Uytterhoeven HRX3_MARK, HTX3_MARK,
991077365a9SGeert Uytterhoeven };
992077365a9SGeert Uytterhoeven static const unsigned int hscif3_clk_pins[] = {
993077365a9SGeert Uytterhoeven /* HSCK */
994077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0),
995077365a9SGeert Uytterhoeven };
996077365a9SGeert Uytterhoeven static const unsigned int hscif3_clk_mux[] = {
997077365a9SGeert Uytterhoeven HSCK3_MARK,
998077365a9SGeert Uytterhoeven };
999077365a9SGeert Uytterhoeven static const unsigned int hscif3_ctrl_pins[] = {
1000077365a9SGeert Uytterhoeven /* HRTS#, HCTS# */
1001077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 1),
1002077365a9SGeert Uytterhoeven };
1003077365a9SGeert Uytterhoeven static const unsigned int hscif3_ctrl_mux[] = {
1004077365a9SGeert Uytterhoeven HRTS3_N_MARK, HCTS3_N_MARK,
1005077365a9SGeert Uytterhoeven };
1006077365a9SGeert Uytterhoeven
1007077365a9SGeert Uytterhoeven /* - I2C0 ------------------------------------------------------------------- */
1008077365a9SGeert Uytterhoeven static const unsigned int i2c0_pins[] = {
1009077365a9SGeert Uytterhoeven /* SDA, SCL */
1010077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 0),
1011077365a9SGeert Uytterhoeven };
1012077365a9SGeert Uytterhoeven static const unsigned int i2c0_mux[] = {
1013077365a9SGeert Uytterhoeven SDA0_MARK, SCL0_MARK,
1014077365a9SGeert Uytterhoeven };
1015077365a9SGeert Uytterhoeven
1016077365a9SGeert Uytterhoeven /* - I2C1 ------------------------------------------------------------------- */
1017077365a9SGeert Uytterhoeven static const unsigned int i2c1_pins[] = {
1018077365a9SGeert Uytterhoeven /* SDA, SCL */
1019077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 2),
1020077365a9SGeert Uytterhoeven };
1021077365a9SGeert Uytterhoeven static const unsigned int i2c1_mux[] = {
1022077365a9SGeert Uytterhoeven SDA1_MARK, SCL1_MARK,
1023077365a9SGeert Uytterhoeven };
1024077365a9SGeert Uytterhoeven
1025077365a9SGeert Uytterhoeven /* - I2C2 ------------------------------------------------------------------- */
1026077365a9SGeert Uytterhoeven static const unsigned int i2c2_pins[] = {
1027077365a9SGeert Uytterhoeven /* SDA, SCL */
1028077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 4),
1029077365a9SGeert Uytterhoeven };
1030077365a9SGeert Uytterhoeven static const unsigned int i2c2_mux[] = {
1031077365a9SGeert Uytterhoeven SDA2_MARK, SCL2_MARK,
1032077365a9SGeert Uytterhoeven };
1033077365a9SGeert Uytterhoeven
1034077365a9SGeert Uytterhoeven /* - I2C3 ------------------------------------------------------------------- */
1035077365a9SGeert Uytterhoeven static const unsigned int i2c3_a_pins[] = {
1036077365a9SGeert Uytterhoeven /* SDA, SCL */
1037077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
1038077365a9SGeert Uytterhoeven };
1039077365a9SGeert Uytterhoeven static const unsigned int i2c3_a_mux[] = {
1040077365a9SGeert Uytterhoeven SDA3_A_MARK, SCL3_A_MARK,
1041077365a9SGeert Uytterhoeven };
1042077365a9SGeert Uytterhoeven static const unsigned int i2c3_b_pins[] = {
1043077365a9SGeert Uytterhoeven /* SDA, SCL */
1044077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 13),
1045077365a9SGeert Uytterhoeven };
1046077365a9SGeert Uytterhoeven static const unsigned int i2c3_b_mux[] = {
1047077365a9SGeert Uytterhoeven SDA3_B_MARK, SCL3_B_MARK,
1048077365a9SGeert Uytterhoeven };
1049077365a9SGeert Uytterhoeven
1050077365a9SGeert Uytterhoeven /* - I2C4 ------------------------------------------------------------------- */
1051077365a9SGeert Uytterhoeven static const unsigned int i2c4_pins[] = {
1052077365a9SGeert Uytterhoeven /* SDA, SCL */
1053077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 15),
1054077365a9SGeert Uytterhoeven };
1055077365a9SGeert Uytterhoeven static const unsigned int i2c4_mux[] = {
1056077365a9SGeert Uytterhoeven SDA4_MARK, SCL4_MARK,
1057077365a9SGeert Uytterhoeven };
1058077365a9SGeert Uytterhoeven
1059077365a9SGeert Uytterhoeven /* - INTC-EX ---------------------------------------------------------------- */
1060077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq0_pins[] = {
1061077365a9SGeert Uytterhoeven /* IRQ0 */
1062077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 0),
1063077365a9SGeert Uytterhoeven };
1064077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq0_mux[] = {
1065077365a9SGeert Uytterhoeven IRQ0_MARK,
1066077365a9SGeert Uytterhoeven };
1067077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq1_pins[] = {
1068077365a9SGeert Uytterhoeven /* IRQ1 */
1069077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 11),
1070077365a9SGeert Uytterhoeven };
1071077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq1_mux[] = {
1072077365a9SGeert Uytterhoeven IRQ1_MARK,
1073077365a9SGeert Uytterhoeven };
1074077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq2_pins[] = {
1075077365a9SGeert Uytterhoeven /* IRQ2 */
1076077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 12),
1077077365a9SGeert Uytterhoeven };
1078077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq2_mux[] = {
1079077365a9SGeert Uytterhoeven IRQ2_MARK,
1080077365a9SGeert Uytterhoeven };
1081077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq3_pins[] = {
1082077365a9SGeert Uytterhoeven /* IRQ3 */
1083077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 19),
1084077365a9SGeert Uytterhoeven };
1085077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq3_mux[] = {
1086077365a9SGeert Uytterhoeven IRQ3_MARK,
1087077365a9SGeert Uytterhoeven };
1088077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq4_pins[] = {
1089077365a9SGeert Uytterhoeven /* IRQ4 */
1090077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 15),
1091077365a9SGeert Uytterhoeven };
1092077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq4_mux[] = {
1093077365a9SGeert Uytterhoeven IRQ4_MARK,
1094077365a9SGeert Uytterhoeven };
1095077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq5_pins[] = {
1096077365a9SGeert Uytterhoeven /* IRQ5 */
1097077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16),
1098077365a9SGeert Uytterhoeven };
1099077365a9SGeert Uytterhoeven static const unsigned int intc_ex_irq5_mux[] = {
1100077365a9SGeert Uytterhoeven IRQ5_MARK,
1101077365a9SGeert Uytterhoeven };
1102077365a9SGeert Uytterhoeven
1103077365a9SGeert Uytterhoeven /* - MMC -------------------------------------------------------------------- */
1104c5041469SGeert Uytterhoeven static const unsigned int mmc_data_pins[] = {
1105077365a9SGeert Uytterhoeven /* D[0:7] */
1106077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
1107077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
1108077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12),
1109077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
1110077365a9SGeert Uytterhoeven };
1111c5041469SGeert Uytterhoeven static const unsigned int mmc_data_mux[] = {
1112077365a9SGeert Uytterhoeven MMC_D0_MARK, MMC_D1_MARK,
1113077365a9SGeert Uytterhoeven MMC_D2_MARK, MMC_D3_MARK,
1114077365a9SGeert Uytterhoeven MMC_D4_MARK, MMC_D5_MARK,
1115077365a9SGeert Uytterhoeven MMC_D6_MARK, MMC_D7_MARK,
1116077365a9SGeert Uytterhoeven };
1117077365a9SGeert Uytterhoeven static const unsigned int mmc_ctrl_pins[] = {
1118077365a9SGeert Uytterhoeven /* CLK, CMD */
1119077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 5),
1120077365a9SGeert Uytterhoeven };
1121077365a9SGeert Uytterhoeven static const unsigned int mmc_ctrl_mux[] = {
1122077365a9SGeert Uytterhoeven MMC_CLK_MARK, MMC_CMD_MARK,
1123077365a9SGeert Uytterhoeven };
1124077365a9SGeert Uytterhoeven
1125077365a9SGeert Uytterhoeven /* - MSIOF0 ----------------------------------------------------------------- */
1126077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_pins[] = {
1127077365a9SGeert Uytterhoeven /* SCK */
1128077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 2),
1129077365a9SGeert Uytterhoeven };
1130077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_mux[] = {
1131077365a9SGeert Uytterhoeven MSIOF0_SCK_MARK,
1132077365a9SGeert Uytterhoeven };
1133077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_pins[] = {
1134077365a9SGeert Uytterhoeven /* SYNC */
1135077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 3),
1136077365a9SGeert Uytterhoeven };
1137077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_mux[] = {
1138077365a9SGeert Uytterhoeven MSIOF0_SYNC_MARK,
1139077365a9SGeert Uytterhoeven };
1140077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_pins[] = {
1141077365a9SGeert Uytterhoeven /* SS1 */
1142077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4),
1143077365a9SGeert Uytterhoeven };
1144077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_mux[] = {
1145077365a9SGeert Uytterhoeven MSIOF0_SS1_MARK,
1146077365a9SGeert Uytterhoeven };
1147077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_pins[] = {
1148077365a9SGeert Uytterhoeven /* SS2 */
1149077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 5),
1150077365a9SGeert Uytterhoeven };
1151077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_mux[] = {
1152077365a9SGeert Uytterhoeven MSIOF0_SS2_MARK,
1153077365a9SGeert Uytterhoeven };
1154077365a9SGeert Uytterhoeven static const unsigned int msiof0_txd_pins[] = {
1155077365a9SGeert Uytterhoeven /* TXD */
1156077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 1),
1157077365a9SGeert Uytterhoeven };
1158077365a9SGeert Uytterhoeven static const unsigned int msiof0_txd_mux[] = {
1159077365a9SGeert Uytterhoeven MSIOF0_TXD_MARK,
1160077365a9SGeert Uytterhoeven };
1161077365a9SGeert Uytterhoeven static const unsigned int msiof0_rxd_pins[] = {
1162077365a9SGeert Uytterhoeven /* RXD */
1163077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0),
1164077365a9SGeert Uytterhoeven };
1165077365a9SGeert Uytterhoeven static const unsigned int msiof0_rxd_mux[] = {
1166077365a9SGeert Uytterhoeven MSIOF0_RXD_MARK,
1167077365a9SGeert Uytterhoeven };
1168077365a9SGeert Uytterhoeven
1169077365a9SGeert Uytterhoeven /* - MSIOF1 ----------------------------------------------------------------- */
1170077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_pins[] = {
1171077365a9SGeert Uytterhoeven /* SCK */
1172077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 2),
1173077365a9SGeert Uytterhoeven };
1174077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_mux[] = {
1175077365a9SGeert Uytterhoeven MSIOF1_SCK_MARK,
1176077365a9SGeert Uytterhoeven };
1177077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_pins[] = {
1178077365a9SGeert Uytterhoeven /* SYNC */
1179077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 3),
1180077365a9SGeert Uytterhoeven };
1181077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_mux[] = {
1182077365a9SGeert Uytterhoeven MSIOF1_SYNC_MARK,
1183077365a9SGeert Uytterhoeven };
1184077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_pins[] = {
1185077365a9SGeert Uytterhoeven /* SS1 */
1186077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 4),
1187077365a9SGeert Uytterhoeven };
1188077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_mux[] = {
1189077365a9SGeert Uytterhoeven MSIOF1_SS1_MARK,
1190077365a9SGeert Uytterhoeven };
1191077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_pins[] = {
1192077365a9SGeert Uytterhoeven /* SS2 */
1193077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 5),
1194077365a9SGeert Uytterhoeven };
1195077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_mux[] = {
1196077365a9SGeert Uytterhoeven MSIOF1_SS2_MARK,
1197077365a9SGeert Uytterhoeven };
1198077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_pins[] = {
1199077365a9SGeert Uytterhoeven /* TXD */
1200077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1),
1201077365a9SGeert Uytterhoeven };
1202077365a9SGeert Uytterhoeven static const unsigned int msiof1_txd_mux[] = {
1203077365a9SGeert Uytterhoeven MSIOF1_TXD_MARK,
1204077365a9SGeert Uytterhoeven };
1205077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_pins[] = {
1206077365a9SGeert Uytterhoeven /* RXD */
1207077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0),
1208077365a9SGeert Uytterhoeven };
1209077365a9SGeert Uytterhoeven static const unsigned int msiof1_rxd_mux[] = {
1210077365a9SGeert Uytterhoeven MSIOF1_RXD_MARK,
1211077365a9SGeert Uytterhoeven };
1212077365a9SGeert Uytterhoeven
1213077365a9SGeert Uytterhoeven /* - MSIOF2 ----------------------------------------------------------------- */
1214077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_pins[] = {
1215077365a9SGeert Uytterhoeven /* SCK */
1216077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0),
1217077365a9SGeert Uytterhoeven };
1218077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_mux[] = {
1219077365a9SGeert Uytterhoeven MSIOF2_SCK_MARK,
1220077365a9SGeert Uytterhoeven };
1221077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_pins[] = {
1222077365a9SGeert Uytterhoeven /* SYNC */
1223077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 3),
1224077365a9SGeert Uytterhoeven };
1225077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_mux[] = {
1226077365a9SGeert Uytterhoeven MSIOF2_SYNC_MARK,
1227077365a9SGeert Uytterhoeven };
1228077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_pins[] = {
1229077365a9SGeert Uytterhoeven /* SS1 */
1230077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4),
1231077365a9SGeert Uytterhoeven };
1232077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_mux[] = {
1233077365a9SGeert Uytterhoeven MSIOF2_SS1_MARK,
1234077365a9SGeert Uytterhoeven };
1235077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_pins[] = {
1236077365a9SGeert Uytterhoeven /* SS2 */
1237077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 5),
1238077365a9SGeert Uytterhoeven };
1239077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_mux[] = {
1240077365a9SGeert Uytterhoeven MSIOF2_SS2_MARK,
1241077365a9SGeert Uytterhoeven };
1242077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_pins[] = {
1243077365a9SGeert Uytterhoeven /* TXD */
1244077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2),
1245077365a9SGeert Uytterhoeven };
1246077365a9SGeert Uytterhoeven static const unsigned int msiof2_txd_mux[] = {
1247077365a9SGeert Uytterhoeven MSIOF2_TXD_MARK,
1248077365a9SGeert Uytterhoeven };
1249077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_pins[] = {
1250077365a9SGeert Uytterhoeven /* RXD */
1251077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 1),
1252077365a9SGeert Uytterhoeven };
1253077365a9SGeert Uytterhoeven static const unsigned int msiof2_rxd_mux[] = {
1254077365a9SGeert Uytterhoeven MSIOF2_RXD_MARK,
1255077365a9SGeert Uytterhoeven };
1256077365a9SGeert Uytterhoeven
1257077365a9SGeert Uytterhoeven /* - MSIOF3 ----------------------------------------------------------------- */
1258077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_pins[] = {
1259077365a9SGeert Uytterhoeven /* SCK */
1260077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 20),
1261077365a9SGeert Uytterhoeven };
1262077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_mux[] = {
1263077365a9SGeert Uytterhoeven MSIOF3_SCK_MARK,
1264077365a9SGeert Uytterhoeven };
1265077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_pins[] = {
1266077365a9SGeert Uytterhoeven /* SYNC */
1267077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 21),
1268077365a9SGeert Uytterhoeven };
1269077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_mux[] = {
1270077365a9SGeert Uytterhoeven MSIOF3_SYNC_MARK,
1271077365a9SGeert Uytterhoeven };
1272077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_pins[] = {
1273077365a9SGeert Uytterhoeven /* SS1 */
1274077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 6),
1275077365a9SGeert Uytterhoeven };
1276077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_mux[] = {
1277077365a9SGeert Uytterhoeven MSIOF3_SS1_MARK,
1278077365a9SGeert Uytterhoeven };
1279077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_pins[] = {
1280077365a9SGeert Uytterhoeven /* SS2 */
1281077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 7),
1282077365a9SGeert Uytterhoeven };
1283077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_mux[] = {
1284077365a9SGeert Uytterhoeven MSIOF3_SS2_MARK,
1285077365a9SGeert Uytterhoeven };
1286077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_pins[] = {
1287077365a9SGeert Uytterhoeven /* TXD */
1288077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 5),
1289077365a9SGeert Uytterhoeven };
1290077365a9SGeert Uytterhoeven static const unsigned int msiof3_txd_mux[] = {
1291077365a9SGeert Uytterhoeven MSIOF3_TXD_MARK,
1292077365a9SGeert Uytterhoeven };
1293077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_pins[] = {
1294077365a9SGeert Uytterhoeven /* RXD */
1295077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 4),
1296077365a9SGeert Uytterhoeven };
1297077365a9SGeert Uytterhoeven static const unsigned int msiof3_rxd_mux[] = {
1298077365a9SGeert Uytterhoeven MSIOF3_RXD_MARK,
1299077365a9SGeert Uytterhoeven };
1300077365a9SGeert Uytterhoeven
1301077365a9SGeert Uytterhoeven /* - PWM0 ------------------------------------------------------------------- */
1302077365a9SGeert Uytterhoeven static const unsigned int pwm0_a_pins[] = {
1303077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12),
1304077365a9SGeert Uytterhoeven };
1305077365a9SGeert Uytterhoeven static const unsigned int pwm0_a_mux[] = {
1306077365a9SGeert Uytterhoeven PWM0_A_MARK,
1307077365a9SGeert Uytterhoeven };
1308077365a9SGeert Uytterhoeven static const unsigned int pwm0_b_pins[] = {
1309077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 21),
1310077365a9SGeert Uytterhoeven };
1311077365a9SGeert Uytterhoeven static const unsigned int pwm0_b_mux[] = {
1312077365a9SGeert Uytterhoeven PWM0_B_MARK,
1313077365a9SGeert Uytterhoeven };
1314077365a9SGeert Uytterhoeven
1315077365a9SGeert Uytterhoeven /* - PWM1 ------------------------------------------------------------------- */
1316077365a9SGeert Uytterhoeven static const unsigned int pwm1_a_pins[] = {
1317077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 13),
1318077365a9SGeert Uytterhoeven };
1319077365a9SGeert Uytterhoeven static const unsigned int pwm1_a_mux[] = {
1320077365a9SGeert Uytterhoeven PWM1_A_MARK,
1321077365a9SGeert Uytterhoeven };
1322077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_pins[] = {
1323077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22),
1324077365a9SGeert Uytterhoeven };
1325077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_mux[] = {
1326077365a9SGeert Uytterhoeven PWM1_B_MARK,
1327077365a9SGeert Uytterhoeven };
1328077365a9SGeert Uytterhoeven
1329077365a9SGeert Uytterhoeven /* - PWM2 ------------------------------------------------------------------- */
1330077365a9SGeert Uytterhoeven static const unsigned int pwm2_a_pins[] = {
1331077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14),
1332077365a9SGeert Uytterhoeven };
1333077365a9SGeert Uytterhoeven static const unsigned int pwm2_a_mux[] = {
1334077365a9SGeert Uytterhoeven PWM2_A_MARK,
1335077365a9SGeert Uytterhoeven };
1336077365a9SGeert Uytterhoeven static const unsigned int pwm2_b_pins[] = {
1337077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23),
1338077365a9SGeert Uytterhoeven };
1339077365a9SGeert Uytterhoeven static const unsigned int pwm2_b_mux[] = {
1340077365a9SGeert Uytterhoeven PWM2_B_MARK,
1341077365a9SGeert Uytterhoeven };
1342077365a9SGeert Uytterhoeven
1343077365a9SGeert Uytterhoeven /* - PWM3 ------------------------------------------------------------------- */
1344077365a9SGeert Uytterhoeven static const unsigned int pwm3_a_pins[] = {
1345077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15),
1346077365a9SGeert Uytterhoeven };
1347077365a9SGeert Uytterhoeven static const unsigned int pwm3_a_mux[] = {
1348077365a9SGeert Uytterhoeven PWM3_A_MARK,
1349077365a9SGeert Uytterhoeven };
1350077365a9SGeert Uytterhoeven static const unsigned int pwm3_b_pins[] = {
1351077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 24),
1352077365a9SGeert Uytterhoeven };
1353077365a9SGeert Uytterhoeven static const unsigned int pwm3_b_mux[] = {
1354077365a9SGeert Uytterhoeven PWM3_B_MARK,
1355077365a9SGeert Uytterhoeven };
1356077365a9SGeert Uytterhoeven
1357077365a9SGeert Uytterhoeven /* - PWM4 ------------------------------------------------------------------- */
1358077365a9SGeert Uytterhoeven static const unsigned int pwm4_a_pins[] = {
1359077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16),
1360077365a9SGeert Uytterhoeven };
1361077365a9SGeert Uytterhoeven static const unsigned int pwm4_a_mux[] = {
1362077365a9SGeert Uytterhoeven PWM4_A_MARK,
1363077365a9SGeert Uytterhoeven };
1364077365a9SGeert Uytterhoeven static const unsigned int pwm4_b_pins[] = {
1365077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 25),
1366077365a9SGeert Uytterhoeven };
1367077365a9SGeert Uytterhoeven static const unsigned int pwm4_b_mux[] = {
1368077365a9SGeert Uytterhoeven PWM4_B_MARK,
1369077365a9SGeert Uytterhoeven };
1370077365a9SGeert Uytterhoeven
1371077365a9SGeert Uytterhoeven /* - QSPI0 ------------------------------------------------------------------ */
1372077365a9SGeert Uytterhoeven static const unsigned int qspi0_ctrl_pins[] = {
1373077365a9SGeert Uytterhoeven /* SPCLK, SSL */
1374077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 5),
1375077365a9SGeert Uytterhoeven };
1376077365a9SGeert Uytterhoeven static const unsigned int qspi0_ctrl_mux[] = {
1377077365a9SGeert Uytterhoeven QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
1378077365a9SGeert Uytterhoeven };
1379077365a9SGeert Uytterhoeven
1380077365a9SGeert Uytterhoeven /* - QSPI1 ------------------------------------------------------------------ */
1381077365a9SGeert Uytterhoeven static const unsigned int qspi1_ctrl_pins[] = {
1382077365a9SGeert Uytterhoeven /* SPCLK, SSL */
1383077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 11),
1384077365a9SGeert Uytterhoeven };
1385077365a9SGeert Uytterhoeven static const unsigned int qspi1_ctrl_mux[] = {
1386077365a9SGeert Uytterhoeven QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
1387077365a9SGeert Uytterhoeven };
1388077365a9SGeert Uytterhoeven
1389077365a9SGeert Uytterhoeven /* - RPC -------------------------------------------------------------------- */
1390f0a52b7bSGeert Uytterhoeven static const unsigned int rpc_clk_pins[] = {
1391077365a9SGeert Uytterhoeven /* Octal-SPI flash: C/SCLK */
1392077365a9SGeert Uytterhoeven /* HyperFlash: CK, CK# */
1393077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 6),
1394077365a9SGeert Uytterhoeven };
1395f0a52b7bSGeert Uytterhoeven static const unsigned int rpc_clk_mux[] = {
1396077365a9SGeert Uytterhoeven QSPI0_SPCLK_MARK, QSPI1_SPCLK_MARK,
1397077365a9SGeert Uytterhoeven };
1398077365a9SGeert Uytterhoeven static const unsigned int rpc_ctrl_pins[] = {
1399077365a9SGeert Uytterhoeven /* Octal-SPI flash: S#/CS, DQS */
1400077365a9SGeert Uytterhoeven /* HyperFlash: CS#, RDS */
1401077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
1402077365a9SGeert Uytterhoeven };
1403077365a9SGeert Uytterhoeven static const unsigned int rpc_ctrl_mux[] = {
1404077365a9SGeert Uytterhoeven QSPI0_SSL_MARK, QSPI1_SSL_MARK,
1405077365a9SGeert Uytterhoeven };
1406077365a9SGeert Uytterhoeven static const unsigned int rpc_data_pins[] = {
1407077365a9SGeert Uytterhoeven /* DQ[0:7] */
1408077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
1409077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4),
1410077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8),
1411077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10),
1412077365a9SGeert Uytterhoeven };
1413077365a9SGeert Uytterhoeven static const unsigned int rpc_data_mux[] = {
1414077365a9SGeert Uytterhoeven QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
1415077365a9SGeert Uytterhoeven QSPI0_IO2_MARK, QSPI0_IO3_MARK,
1416077365a9SGeert Uytterhoeven QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
1417077365a9SGeert Uytterhoeven QSPI1_IO2_MARK, QSPI1_IO3_MARK,
1418077365a9SGeert Uytterhoeven };
1419077365a9SGeert Uytterhoeven static const unsigned int rpc_reset_pins[] = {
1420077365a9SGeert Uytterhoeven /* RPC_RESET# */
1421077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 12),
1422077365a9SGeert Uytterhoeven };
1423077365a9SGeert Uytterhoeven static const unsigned int rpc_reset_mux[] = {
1424077365a9SGeert Uytterhoeven RPC_RESET_N_MARK,
1425077365a9SGeert Uytterhoeven };
1426077365a9SGeert Uytterhoeven static const unsigned int rpc_int_pins[] = {
1427077365a9SGeert Uytterhoeven /* RPC_INT# */
1428077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 14),
1429077365a9SGeert Uytterhoeven };
1430077365a9SGeert Uytterhoeven static const unsigned int rpc_int_mux[] = {
1431077365a9SGeert Uytterhoeven RPC_INT_N_MARK,
1432077365a9SGeert Uytterhoeven };
1433077365a9SGeert Uytterhoeven static const unsigned int rpc_wp_pins[] = {
1434077365a9SGeert Uytterhoeven /* RPC_WP# */
1435077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13),
1436077365a9SGeert Uytterhoeven };
1437077365a9SGeert Uytterhoeven static const unsigned int rpc_wp_mux[] = {
1438077365a9SGeert Uytterhoeven RPC_WP_N_MARK,
1439077365a9SGeert Uytterhoeven };
1440077365a9SGeert Uytterhoeven
1441077365a9SGeert Uytterhoeven /* - SCIF Clock ------------------------------------------------------------- */
1442077365a9SGeert Uytterhoeven static const unsigned int scif_clk_a_pins[] = {
1443077365a9SGeert Uytterhoeven /* SCIF_CLK */
1444077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 18),
1445077365a9SGeert Uytterhoeven };
1446077365a9SGeert Uytterhoeven static const unsigned int scif_clk_a_mux[] = {
1447077365a9SGeert Uytterhoeven SCIF_CLK_A_MARK,
1448077365a9SGeert Uytterhoeven };
1449077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_pins[] = {
1450077365a9SGeert Uytterhoeven /* SCIF_CLK */
1451077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 25),
1452077365a9SGeert Uytterhoeven };
1453077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_mux[] = {
1454077365a9SGeert Uytterhoeven SCIF_CLK_B_MARK,
1455077365a9SGeert Uytterhoeven };
1456077365a9SGeert Uytterhoeven
1457077365a9SGeert Uytterhoeven /* - SCIF0 ------------------------------------------------------------------ */
1458077365a9SGeert Uytterhoeven static const unsigned int scif0_data_pins[] = {
1459077365a9SGeert Uytterhoeven /* RX, TX */
1460077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
1461077365a9SGeert Uytterhoeven };
1462077365a9SGeert Uytterhoeven static const unsigned int scif0_data_mux[] = {
1463077365a9SGeert Uytterhoeven RX0_MARK, TX0_MARK,
1464077365a9SGeert Uytterhoeven };
1465077365a9SGeert Uytterhoeven static const unsigned int scif0_clk_pins[] = {
1466077365a9SGeert Uytterhoeven /* SCK */
1467077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 1),
1468077365a9SGeert Uytterhoeven };
1469077365a9SGeert Uytterhoeven static const unsigned int scif0_clk_mux[] = {
1470077365a9SGeert Uytterhoeven SCK0_MARK,
1471077365a9SGeert Uytterhoeven };
1472077365a9SGeert Uytterhoeven static const unsigned int scif0_ctrl_pins[] = {
1473077365a9SGeert Uytterhoeven /* RTS#, CTS# */
1474077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 2),
1475077365a9SGeert Uytterhoeven };
1476077365a9SGeert Uytterhoeven static const unsigned int scif0_ctrl_mux[] = {
1477077365a9SGeert Uytterhoeven RTS0_N_MARK, CTS0_N_MARK,
1478077365a9SGeert Uytterhoeven };
1479077365a9SGeert Uytterhoeven
1480077365a9SGeert Uytterhoeven /* - SCIF1 ------------------------------------------------------------------ */
1481077365a9SGeert Uytterhoeven static const unsigned int scif1_data_a_pins[] = {
1482077365a9SGeert Uytterhoeven /* RX, TX */
1483077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
1484077365a9SGeert Uytterhoeven };
1485077365a9SGeert Uytterhoeven static const unsigned int scif1_data_a_mux[] = {
1486077365a9SGeert Uytterhoeven RX1_A_MARK, TX1_A_MARK,
1487077365a9SGeert Uytterhoeven };
1488077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_pins[] = {
1489077365a9SGeert Uytterhoeven /* SCK */
1490077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 5),
1491077365a9SGeert Uytterhoeven };
1492077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_mux[] = {
1493077365a9SGeert Uytterhoeven SCK1_MARK,
1494077365a9SGeert Uytterhoeven };
1495077365a9SGeert Uytterhoeven static const unsigned int scif1_ctrl_pins[] = {
1496077365a9SGeert Uytterhoeven /* RTS#, CTS# */
1497077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 10),
1498077365a9SGeert Uytterhoeven };
1499077365a9SGeert Uytterhoeven static const unsigned int scif1_ctrl_mux[] = {
1500077365a9SGeert Uytterhoeven RTS1_N_MARK, CTS1_N_MARK,
1501077365a9SGeert Uytterhoeven };
1502077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_pins[] = {
1503077365a9SGeert Uytterhoeven /* RX, TX */
1504077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 24), RCAR_GP_PIN(1, 23),
1505077365a9SGeert Uytterhoeven };
1506077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_mux[] = {
1507077365a9SGeert Uytterhoeven RX1_B_MARK, TX1_B_MARK,
1508077365a9SGeert Uytterhoeven };
1509077365a9SGeert Uytterhoeven
1510077365a9SGeert Uytterhoeven /* - SCIF3 ------------------------------------------------------------------ */
1511077365a9SGeert Uytterhoeven static const unsigned int scif3_data_pins[] = {
1512077365a9SGeert Uytterhoeven /* RX, TX */
1513077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
1514077365a9SGeert Uytterhoeven };
1515077365a9SGeert Uytterhoeven static const unsigned int scif3_data_mux[] = {
1516077365a9SGeert Uytterhoeven RX3_MARK, TX3_MARK,
1517077365a9SGeert Uytterhoeven };
1518077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_pins[] = {
1519077365a9SGeert Uytterhoeven /* SCK */
1520077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0),
1521077365a9SGeert Uytterhoeven };
1522077365a9SGeert Uytterhoeven static const unsigned int scif3_clk_mux[] = {
1523077365a9SGeert Uytterhoeven SCK3_MARK,
1524077365a9SGeert Uytterhoeven };
1525077365a9SGeert Uytterhoeven static const unsigned int scif3_ctrl_pins[] = {
1526077365a9SGeert Uytterhoeven /* RTS#, CTS# */
1527077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 3),
1528077365a9SGeert Uytterhoeven };
1529077365a9SGeert Uytterhoeven static const unsigned int scif3_ctrl_mux[] = {
1530077365a9SGeert Uytterhoeven RTS3_N_MARK, CTS3_N_MARK,
1531077365a9SGeert Uytterhoeven };
1532077365a9SGeert Uytterhoeven
1533077365a9SGeert Uytterhoeven /* - SCIF4 ------------------------------------------------------------------ */
1534077365a9SGeert Uytterhoeven static const unsigned int scif4_data_pins[] = {
1535077365a9SGeert Uytterhoeven /* RX, TX */
1536077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
1537077365a9SGeert Uytterhoeven };
1538077365a9SGeert Uytterhoeven static const unsigned int scif4_data_mux[] = {
1539077365a9SGeert Uytterhoeven RX4_MARK, TX4_MARK,
1540077365a9SGeert Uytterhoeven };
1541077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_pins[] = {
1542077365a9SGeert Uytterhoeven /* SCK */
1543077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9),
1544077365a9SGeert Uytterhoeven };
1545077365a9SGeert Uytterhoeven static const unsigned int scif4_clk_mux[] = {
1546077365a9SGeert Uytterhoeven SCK4_MARK,
1547077365a9SGeert Uytterhoeven };
1548077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_pins[] = {
1549077365a9SGeert Uytterhoeven /* RTS#, CTS# */
1550077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
1551077365a9SGeert Uytterhoeven };
1552077365a9SGeert Uytterhoeven static const unsigned int scif4_ctrl_mux[] = {
1553077365a9SGeert Uytterhoeven RTS4_N_MARK, CTS4_N_MARK,
1554077365a9SGeert Uytterhoeven };
1555077365a9SGeert Uytterhoeven
1556077365a9SGeert Uytterhoeven /* - TMU -------------------------------------------------------------------- */
1557077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_a_pins[] = {
1558077365a9SGeert Uytterhoeven /* TCLK1 */
1559077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4),
1560077365a9SGeert Uytterhoeven };
1561077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_a_mux[] = {
1562077365a9SGeert Uytterhoeven TCLK1_A_MARK,
1563077365a9SGeert Uytterhoeven };
1564077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_b_pins[] = {
1565077365a9SGeert Uytterhoeven /* TCLK1 */
1566077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23),
1567077365a9SGeert Uytterhoeven };
1568077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk1_b_mux[] = {
1569077365a9SGeert Uytterhoeven TCLK1_B_MARK,
1570077365a9SGeert Uytterhoeven };
1571077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_a_pins[] = {
1572077365a9SGeert Uytterhoeven /* TCLK2 */
1573077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 5),
1574077365a9SGeert Uytterhoeven };
1575077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_a_mux[] = {
1576077365a9SGeert Uytterhoeven TCLK2_A_MARK,
1577077365a9SGeert Uytterhoeven };
1578077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_b_pins[] = {
1579077365a9SGeert Uytterhoeven /* TCLK2 */
1580077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 24),
1581077365a9SGeert Uytterhoeven };
1582077365a9SGeert Uytterhoeven static const unsigned int tmu_tclk2_b_mux[] = {
1583077365a9SGeert Uytterhoeven TCLK2_B_MARK,
1584077365a9SGeert Uytterhoeven };
1585077365a9SGeert Uytterhoeven
1586077365a9SGeert Uytterhoeven /* - VIN0 ------------------------------------------------------------------- */
1587496da100SGeert Uytterhoeven static const unsigned int vin0_data_pins[] = {
1588077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
1589077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
1590077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
1591077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
1592077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
1593077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15),
1594077365a9SGeert Uytterhoeven };
1595496da100SGeert Uytterhoeven static const unsigned int vin0_data_mux[] = {
1596077365a9SGeert Uytterhoeven VI0_DATA0_MARK, VI0_DATA1_MARK,
1597077365a9SGeert Uytterhoeven VI0_DATA2_MARK, VI0_DATA3_MARK,
1598077365a9SGeert Uytterhoeven VI0_DATA4_MARK, VI0_DATA5_MARK,
1599077365a9SGeert Uytterhoeven VI0_DATA6_MARK, VI0_DATA7_MARK,
1600077365a9SGeert Uytterhoeven VI0_DATA8_MARK, VI0_DATA9_MARK,
1601077365a9SGeert Uytterhoeven VI0_DATA10_MARK, VI0_DATA11_MARK,
1602077365a9SGeert Uytterhoeven };
1603077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_pins[] = {
1604077365a9SGeert Uytterhoeven /* HSYNC#, VSYNC# */
1605077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
1606077365a9SGeert Uytterhoeven };
1607077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_mux[] = {
1608077365a9SGeert Uytterhoeven VI0_HSYNC_N_MARK, VI0_VSYNC_N_MARK,
1609077365a9SGeert Uytterhoeven };
1610077365a9SGeert Uytterhoeven static const unsigned int vin0_field_pins[] = {
1611077365a9SGeert Uytterhoeven /* FIELD */
1612077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16),
1613077365a9SGeert Uytterhoeven };
1614077365a9SGeert Uytterhoeven static const unsigned int vin0_field_mux[] = {
1615077365a9SGeert Uytterhoeven VI0_FIELD_MARK,
1616077365a9SGeert Uytterhoeven };
1617077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_pins[] = {
1618077365a9SGeert Uytterhoeven /* CLKENB */
1619077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 1),
1620077365a9SGeert Uytterhoeven };
1621077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_mux[] = {
1622077365a9SGeert Uytterhoeven VI0_CLKENB_MARK,
1623077365a9SGeert Uytterhoeven };
1624077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_pins[] = {
1625077365a9SGeert Uytterhoeven /* CLK */
1626077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0),
1627077365a9SGeert Uytterhoeven };
1628077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_mux[] = {
1629077365a9SGeert Uytterhoeven VI0_CLK_MARK,
1630077365a9SGeert Uytterhoeven };
1631077365a9SGeert Uytterhoeven
1632077365a9SGeert Uytterhoeven /* - VIN1 ------------------------------------------------------------------- */
1633496da100SGeert Uytterhoeven static const unsigned int vin1_data_pins[] = {
1634077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
1635077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
1636077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
1637077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
1638077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
1639077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
1640077365a9SGeert Uytterhoeven };
1641496da100SGeert Uytterhoeven static const unsigned int vin1_data_mux[] = {
1642077365a9SGeert Uytterhoeven VI1_DATA0_MARK, VI1_DATA1_MARK,
1643077365a9SGeert Uytterhoeven VI1_DATA2_MARK, VI1_DATA3_MARK,
1644077365a9SGeert Uytterhoeven VI1_DATA4_MARK, VI1_DATA5_MARK,
1645077365a9SGeert Uytterhoeven VI1_DATA6_MARK, VI1_DATA7_MARK,
1646077365a9SGeert Uytterhoeven VI1_DATA8_MARK, VI1_DATA9_MARK,
1647077365a9SGeert Uytterhoeven VI1_DATA10_MARK, VI1_DATA11_MARK,
1648077365a9SGeert Uytterhoeven };
1649077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_pins[] = {
1650077365a9SGeert Uytterhoeven /* HSYNC#, VSYNC# */
1651077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
1652077365a9SGeert Uytterhoeven };
1653077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_mux[] = {
1654077365a9SGeert Uytterhoeven VI1_HSYNC_N_MARK, VI1_VSYNC_N_MARK,
1655077365a9SGeert Uytterhoeven };
1656077365a9SGeert Uytterhoeven static const unsigned int vin1_field_pins[] = {
1657077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16),
1658077365a9SGeert Uytterhoeven };
1659077365a9SGeert Uytterhoeven static const unsigned int vin1_field_mux[] = {
1660077365a9SGeert Uytterhoeven /* FIELD */
1661077365a9SGeert Uytterhoeven VI1_FIELD_MARK,
1662077365a9SGeert Uytterhoeven };
1663077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_pins[] = {
1664077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1),
1665077365a9SGeert Uytterhoeven };
1666077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_mux[] = {
1667077365a9SGeert Uytterhoeven /* CLKENB */
1668077365a9SGeert Uytterhoeven VI1_CLKENB_MARK,
1669077365a9SGeert Uytterhoeven };
1670077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_pins[] = {
1671077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0),
1672077365a9SGeert Uytterhoeven };
1673077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_mux[] = {
1674077365a9SGeert Uytterhoeven /* CLK */
1675077365a9SGeert Uytterhoeven VI1_CLK_MARK,
1676077365a9SGeert Uytterhoeven };
1677077365a9SGeert Uytterhoeven
1678077365a9SGeert Uytterhoeven static const struct sh_pfc_pin_group pinmux_groups[] = {
1679077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_link),
1680077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_magic),
1681077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_phy_int),
1682077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_mdio),
1683077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_rgmii),
1684077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_txcrefclk),
1685077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_avtp_pps),
1686077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_avtp_capture),
1687077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb0_avtp_match),
1688077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(canfd_clk_a),
1689077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(canfd_clk_b),
1690077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(canfd0_data_a),
1691077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(canfd0_data_b),
1692077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(canfd1_data),
1693077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_rgb666),
1694077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_clk_out),
1695077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_sync),
1696077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_oddf),
1697077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_cde),
1698077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_disp),
1699077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data),
1700077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_clk),
1701077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl),
1702077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_data),
1703077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_clk),
1704077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_ctrl),
1705077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_data),
1706077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_clk),
1707077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif2_ctrl),
1708077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif3_data),
1709077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif3_clk),
1710077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif3_ctrl),
1711077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0),
1712077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1),
1713077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2),
1714077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_a),
1715077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3_b),
1716077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c4),
1717077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_ex_irq0),
1718077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_ex_irq1),
1719077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_ex_irq2),
1720077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_ex_irq3),
1721077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_ex_irq4),
1722077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_ex_irq5),
1723c5041469SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 1),
1724c5041469SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 4),
1725c5041469SGeert Uytterhoeven BUS_DATA_PIN_GROUP(mmc_data, 8),
1726077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc_ctrl),
1727077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_clk),
1728077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_sync),
1729077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss1),
1730077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss2),
1731077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_txd),
1732077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_rxd),
1733077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk),
1734077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_sync),
1735077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss1),
1736077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss2),
1737077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_txd),
1738077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rxd),
1739077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_clk),
1740077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_sync),
1741077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss1),
1742077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss2),
1743077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_txd),
1744077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_rxd),
1745077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_clk),
1746077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_sync),
1747077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_ss1),
1748077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_ss2),
1749077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_txd),
1750077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_rxd),
1751077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm0_a),
1752077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm0_b),
1753077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm1_a),
1754077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm1_b),
1755077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm2_a),
1756077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm2_b),
1757077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm3_a),
1758077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm3_b),
1759077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm4_a),
1760077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm4_b),
1761077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi0_ctrl),
1762f0a52b7bSGeert Uytterhoeven SH_PFC_PIN_GROUP_SUBSET(qspi0_data2, rpc_data, 0, 2),
1763f0a52b7bSGeert Uytterhoeven SH_PFC_PIN_GROUP_SUBSET(qspi0_data4, rpc_data, 0, 4),
1764077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi1_ctrl),
1765f0a52b7bSGeert Uytterhoeven SH_PFC_PIN_GROUP_SUBSET(qspi1_data2, rpc_data, 4, 2),
1766f0a52b7bSGeert Uytterhoeven SH_PFC_PIN_GROUP_SUBSET(qspi1_data4, rpc_data, 4, 4),
1767f0a52b7bSGeert Uytterhoeven BUS_DATA_PIN_GROUP(rpc_clk, 1),
1768f0a52b7bSGeert Uytterhoeven BUS_DATA_PIN_GROUP(rpc_clk, 2),
1769077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(rpc_ctrl),
1770077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(rpc_data),
1771077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(rpc_reset),
1772077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(rpc_int),
1773077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(rpc_wp),
1774077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk_a),
1775077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk_b),
1776077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data),
1777077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_clk),
1778077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_ctrl),
1779077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_a),
1780077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk),
1781077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_ctrl),
1782077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_b),
1783077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_data),
1784077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_clk),
1785077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif3_ctrl),
1786077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_data),
1787077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_clk),
1788077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif4_ctrl),
1789077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tmu_tclk1_a),
1790077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tmu_tclk1_b),
1791077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tmu_tclk2_a),
1792077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tmu_tclk2_b),
1793496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 8),
1794496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 10),
1795496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin0_data, 12),
1796077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_sync),
1797077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_field),
1798077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clkenb),
1799077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clk),
1800496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 8),
1801496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 10),
1802496da100SGeert Uytterhoeven BUS_DATA_PIN_GROUP(vin1_data, 12),
1803077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_sync),
1804077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_field),
1805077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clkenb),
1806077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clk),
1807077365a9SGeert Uytterhoeven };
1808077365a9SGeert Uytterhoeven
1809077365a9SGeert Uytterhoeven static const char * const avb0_groups[] = {
1810077365a9SGeert Uytterhoeven "avb0_link",
1811077365a9SGeert Uytterhoeven "avb0_magic",
1812077365a9SGeert Uytterhoeven "avb0_phy_int",
1813077365a9SGeert Uytterhoeven "avb0_mdio",
1814077365a9SGeert Uytterhoeven "avb0_rgmii",
1815077365a9SGeert Uytterhoeven "avb0_txcrefclk",
1816077365a9SGeert Uytterhoeven "avb0_avtp_pps",
1817077365a9SGeert Uytterhoeven "avb0_avtp_capture",
1818077365a9SGeert Uytterhoeven "avb0_avtp_match",
1819077365a9SGeert Uytterhoeven };
1820077365a9SGeert Uytterhoeven
1821077365a9SGeert Uytterhoeven static const char * const canfd_clk_groups[] = {
1822077365a9SGeert Uytterhoeven "canfd_clk_a",
1823077365a9SGeert Uytterhoeven "canfd_clk_b",
1824077365a9SGeert Uytterhoeven };
1825077365a9SGeert Uytterhoeven
1826077365a9SGeert Uytterhoeven static const char * const canfd0_groups[] = {
1827077365a9SGeert Uytterhoeven "canfd0_data_a",
1828077365a9SGeert Uytterhoeven "canfd0_data_b",
1829077365a9SGeert Uytterhoeven };
1830077365a9SGeert Uytterhoeven
1831077365a9SGeert Uytterhoeven static const char * const canfd1_groups[] = {
1832077365a9SGeert Uytterhoeven "canfd1_data",
1833077365a9SGeert Uytterhoeven };
1834077365a9SGeert Uytterhoeven
1835077365a9SGeert Uytterhoeven static const char * const du_groups[] = {
1836077365a9SGeert Uytterhoeven "du_rgb666",
1837077365a9SGeert Uytterhoeven "du_clk_out",
1838077365a9SGeert Uytterhoeven "du_sync",
1839077365a9SGeert Uytterhoeven "du_oddf",
1840077365a9SGeert Uytterhoeven "du_cde",
1841077365a9SGeert Uytterhoeven "du_disp",
1842077365a9SGeert Uytterhoeven };
1843077365a9SGeert Uytterhoeven
1844077365a9SGeert Uytterhoeven static const char * const hscif0_groups[] = {
1845077365a9SGeert Uytterhoeven "hscif0_data",
1846077365a9SGeert Uytterhoeven "hscif0_clk",
1847077365a9SGeert Uytterhoeven "hscif0_ctrl",
1848077365a9SGeert Uytterhoeven };
1849077365a9SGeert Uytterhoeven
1850077365a9SGeert Uytterhoeven static const char * const hscif1_groups[] = {
1851077365a9SGeert Uytterhoeven "hscif1_data",
1852077365a9SGeert Uytterhoeven "hscif1_clk",
1853077365a9SGeert Uytterhoeven "hscif1_ctrl",
1854077365a9SGeert Uytterhoeven };
1855077365a9SGeert Uytterhoeven
1856077365a9SGeert Uytterhoeven static const char * const hscif2_groups[] = {
1857077365a9SGeert Uytterhoeven "hscif2_data",
1858077365a9SGeert Uytterhoeven "hscif2_clk",
1859077365a9SGeert Uytterhoeven "hscif2_ctrl",
1860077365a9SGeert Uytterhoeven };
1861077365a9SGeert Uytterhoeven
1862077365a9SGeert Uytterhoeven static const char * const hscif3_groups[] = {
1863077365a9SGeert Uytterhoeven "hscif3_data",
1864077365a9SGeert Uytterhoeven "hscif3_clk",
1865077365a9SGeert Uytterhoeven "hscif3_ctrl",
1866077365a9SGeert Uytterhoeven };
1867077365a9SGeert Uytterhoeven
1868077365a9SGeert Uytterhoeven static const char * const i2c0_groups[] = {
1869077365a9SGeert Uytterhoeven "i2c0",
1870077365a9SGeert Uytterhoeven };
1871077365a9SGeert Uytterhoeven
1872077365a9SGeert Uytterhoeven static const char * const i2c1_groups[] = {
1873077365a9SGeert Uytterhoeven "i2c1",
1874077365a9SGeert Uytterhoeven };
1875077365a9SGeert Uytterhoeven
1876077365a9SGeert Uytterhoeven static const char * const i2c2_groups[] = {
1877077365a9SGeert Uytterhoeven "i2c2",
1878077365a9SGeert Uytterhoeven };
1879077365a9SGeert Uytterhoeven
1880077365a9SGeert Uytterhoeven static const char * const i2c3_groups[] = {
1881077365a9SGeert Uytterhoeven "i2c3_a",
1882077365a9SGeert Uytterhoeven "i2c3_b",
1883077365a9SGeert Uytterhoeven };
1884077365a9SGeert Uytterhoeven
1885077365a9SGeert Uytterhoeven static const char * const i2c4_groups[] = {
1886077365a9SGeert Uytterhoeven "i2c4",
1887077365a9SGeert Uytterhoeven };
1888077365a9SGeert Uytterhoeven
1889077365a9SGeert Uytterhoeven static const char * const intc_ex_groups[] = {
1890077365a9SGeert Uytterhoeven "intc_ex_irq0",
1891077365a9SGeert Uytterhoeven "intc_ex_irq1",
1892077365a9SGeert Uytterhoeven "intc_ex_irq2",
1893077365a9SGeert Uytterhoeven "intc_ex_irq3",
1894077365a9SGeert Uytterhoeven "intc_ex_irq4",
1895077365a9SGeert Uytterhoeven "intc_ex_irq5",
1896077365a9SGeert Uytterhoeven };
1897077365a9SGeert Uytterhoeven
1898077365a9SGeert Uytterhoeven static const char * const mmc_groups[] = {
1899077365a9SGeert Uytterhoeven "mmc_data1",
1900077365a9SGeert Uytterhoeven "mmc_data4",
1901077365a9SGeert Uytterhoeven "mmc_data8",
1902077365a9SGeert Uytterhoeven "mmc_ctrl",
1903077365a9SGeert Uytterhoeven };
1904077365a9SGeert Uytterhoeven
1905077365a9SGeert Uytterhoeven static const char * const msiof0_groups[] = {
1906077365a9SGeert Uytterhoeven "msiof0_clk",
1907077365a9SGeert Uytterhoeven "msiof0_sync",
1908077365a9SGeert Uytterhoeven "msiof0_ss1",
1909077365a9SGeert Uytterhoeven "msiof0_ss2",
1910077365a9SGeert Uytterhoeven "msiof0_txd",
1911077365a9SGeert Uytterhoeven "msiof0_rxd",
1912077365a9SGeert Uytterhoeven };
1913077365a9SGeert Uytterhoeven
1914077365a9SGeert Uytterhoeven static const char * const msiof1_groups[] = {
1915077365a9SGeert Uytterhoeven "msiof1_clk",
1916077365a9SGeert Uytterhoeven "msiof1_sync",
1917077365a9SGeert Uytterhoeven "msiof1_ss1",
1918077365a9SGeert Uytterhoeven "msiof1_ss2",
1919077365a9SGeert Uytterhoeven "msiof1_txd",
1920077365a9SGeert Uytterhoeven "msiof1_rxd",
1921077365a9SGeert Uytterhoeven };
1922077365a9SGeert Uytterhoeven
1923077365a9SGeert Uytterhoeven static const char * const msiof2_groups[] = {
1924077365a9SGeert Uytterhoeven "msiof2_clk",
1925077365a9SGeert Uytterhoeven "msiof2_sync",
1926077365a9SGeert Uytterhoeven "msiof2_ss1",
1927077365a9SGeert Uytterhoeven "msiof2_ss2",
1928077365a9SGeert Uytterhoeven "msiof2_txd",
1929077365a9SGeert Uytterhoeven "msiof2_rxd",
1930077365a9SGeert Uytterhoeven };
1931077365a9SGeert Uytterhoeven
1932077365a9SGeert Uytterhoeven static const char * const msiof3_groups[] = {
1933077365a9SGeert Uytterhoeven "msiof3_clk",
1934077365a9SGeert Uytterhoeven "msiof3_sync",
1935077365a9SGeert Uytterhoeven "msiof3_ss1",
1936077365a9SGeert Uytterhoeven "msiof3_ss2",
1937077365a9SGeert Uytterhoeven "msiof3_txd",
1938077365a9SGeert Uytterhoeven "msiof3_rxd",
1939077365a9SGeert Uytterhoeven };
1940077365a9SGeert Uytterhoeven
1941077365a9SGeert Uytterhoeven static const char * const pwm0_groups[] = {
1942077365a9SGeert Uytterhoeven "pwm0_a",
1943077365a9SGeert Uytterhoeven "pwm0_b",
1944077365a9SGeert Uytterhoeven };
1945077365a9SGeert Uytterhoeven
1946077365a9SGeert Uytterhoeven static const char * const pwm1_groups[] = {
1947077365a9SGeert Uytterhoeven "pwm1_a",
1948077365a9SGeert Uytterhoeven "pwm1_b",
1949077365a9SGeert Uytterhoeven };
1950077365a9SGeert Uytterhoeven
1951077365a9SGeert Uytterhoeven static const char * const pwm2_groups[] = {
1952077365a9SGeert Uytterhoeven "pwm2_a",
1953077365a9SGeert Uytterhoeven "pwm2_b",
1954077365a9SGeert Uytterhoeven };
1955077365a9SGeert Uytterhoeven
1956077365a9SGeert Uytterhoeven static const char * const pwm3_groups[] = {
1957077365a9SGeert Uytterhoeven "pwm3_a",
1958077365a9SGeert Uytterhoeven "pwm3_b",
1959077365a9SGeert Uytterhoeven };
1960077365a9SGeert Uytterhoeven
1961077365a9SGeert Uytterhoeven static const char * const pwm4_groups[] = {
1962077365a9SGeert Uytterhoeven "pwm4_a",
1963077365a9SGeert Uytterhoeven "pwm4_b",
1964077365a9SGeert Uytterhoeven };
1965077365a9SGeert Uytterhoeven
1966077365a9SGeert Uytterhoeven static const char * const qspi0_groups[] = {
1967077365a9SGeert Uytterhoeven "qspi0_ctrl",
1968077365a9SGeert Uytterhoeven "qspi0_data2",
1969077365a9SGeert Uytterhoeven "qspi0_data4",
1970077365a9SGeert Uytterhoeven };
1971077365a9SGeert Uytterhoeven
1972077365a9SGeert Uytterhoeven static const char * const qspi1_groups[] = {
1973077365a9SGeert Uytterhoeven "qspi1_ctrl",
1974077365a9SGeert Uytterhoeven "qspi1_data2",
1975077365a9SGeert Uytterhoeven "qspi1_data4",
1976077365a9SGeert Uytterhoeven };
1977077365a9SGeert Uytterhoeven
1978077365a9SGeert Uytterhoeven static const char * const rpc_groups[] = {
1979077365a9SGeert Uytterhoeven "rpc_clk1",
1980077365a9SGeert Uytterhoeven "rpc_clk2",
1981077365a9SGeert Uytterhoeven "rpc_ctrl",
1982077365a9SGeert Uytterhoeven "rpc_data",
1983077365a9SGeert Uytterhoeven "rpc_reset",
1984077365a9SGeert Uytterhoeven "rpc_int",
1985077365a9SGeert Uytterhoeven "rpc_wp",
1986077365a9SGeert Uytterhoeven };
1987077365a9SGeert Uytterhoeven
1988077365a9SGeert Uytterhoeven static const char * const scif_clk_groups[] = {
1989077365a9SGeert Uytterhoeven "scif_clk_a",
1990077365a9SGeert Uytterhoeven "scif_clk_b",
1991077365a9SGeert Uytterhoeven };
1992077365a9SGeert Uytterhoeven
1993077365a9SGeert Uytterhoeven static const char * const scif0_groups[] = {
1994077365a9SGeert Uytterhoeven "scif0_data",
1995077365a9SGeert Uytterhoeven "scif0_clk",
1996077365a9SGeert Uytterhoeven "scif0_ctrl",
1997077365a9SGeert Uytterhoeven };
1998077365a9SGeert Uytterhoeven
1999077365a9SGeert Uytterhoeven static const char * const scif1_groups[] = {
2000077365a9SGeert Uytterhoeven "scif1_data_a",
2001077365a9SGeert Uytterhoeven "scif1_clk",
2002077365a9SGeert Uytterhoeven "scif1_ctrl",
2003077365a9SGeert Uytterhoeven "scif1_data_b",
2004077365a9SGeert Uytterhoeven };
2005077365a9SGeert Uytterhoeven
2006077365a9SGeert Uytterhoeven static const char * const scif3_groups[] = {
2007077365a9SGeert Uytterhoeven "scif3_data",
2008077365a9SGeert Uytterhoeven "scif3_clk",
2009077365a9SGeert Uytterhoeven "scif3_ctrl",
2010077365a9SGeert Uytterhoeven };
2011077365a9SGeert Uytterhoeven
2012077365a9SGeert Uytterhoeven static const char * const scif4_groups[] = {
2013077365a9SGeert Uytterhoeven "scif4_data",
2014077365a9SGeert Uytterhoeven "scif4_clk",
2015077365a9SGeert Uytterhoeven "scif4_ctrl",
2016077365a9SGeert Uytterhoeven };
2017077365a9SGeert Uytterhoeven
2018077365a9SGeert Uytterhoeven static const char * const tmu_groups[] = {
2019077365a9SGeert Uytterhoeven "tmu_tclk1_a",
2020077365a9SGeert Uytterhoeven "tmu_tclk1_b",
2021077365a9SGeert Uytterhoeven "tmu_tclk2_a",
2022077365a9SGeert Uytterhoeven "tmu_tclk2_b",
2023077365a9SGeert Uytterhoeven };
2024077365a9SGeert Uytterhoeven
2025077365a9SGeert Uytterhoeven static const char * const vin0_groups[] = {
2026077365a9SGeert Uytterhoeven "vin0_data8",
2027077365a9SGeert Uytterhoeven "vin0_data10",
2028077365a9SGeert Uytterhoeven "vin0_data12",
2029077365a9SGeert Uytterhoeven "vin0_sync",
2030077365a9SGeert Uytterhoeven "vin0_field",
2031077365a9SGeert Uytterhoeven "vin0_clkenb",
2032077365a9SGeert Uytterhoeven "vin0_clk",
2033077365a9SGeert Uytterhoeven };
2034077365a9SGeert Uytterhoeven
2035077365a9SGeert Uytterhoeven static const char * const vin1_groups[] = {
2036077365a9SGeert Uytterhoeven "vin1_data8",
2037077365a9SGeert Uytterhoeven "vin1_data10",
2038077365a9SGeert Uytterhoeven "vin1_data12",
2039077365a9SGeert Uytterhoeven "vin1_sync",
2040077365a9SGeert Uytterhoeven "vin1_field",
2041077365a9SGeert Uytterhoeven "vin1_clkenb",
2042077365a9SGeert Uytterhoeven "vin1_clk",
2043077365a9SGeert Uytterhoeven };
2044077365a9SGeert Uytterhoeven
2045077365a9SGeert Uytterhoeven static const struct sh_pfc_function pinmux_functions[] = {
2046077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(avb0),
2047077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(canfd_clk),
2048077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(canfd0),
2049077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(canfd1),
2050077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du),
2051077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif0),
2052077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif1),
2053077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif2),
2054077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif3),
2055077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c0),
2056077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c1),
2057077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c2),
2058077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c3),
2059077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c4),
2060077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(intc_ex),
2061077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(mmc),
2062077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof0),
2063077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof1),
2064077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof2),
2065077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof3),
2066077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm0),
2067077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm1),
2068077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm2),
2069077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm3),
2070077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm4),
2071077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(qspi0),
2072077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(qspi1),
2073077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(rpc),
2074077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif_clk),
2075077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif0),
2076077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif1),
2077077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif3),
2078077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif4),
2079077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(tmu),
2080077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin0),
2081077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin1),
2082077365a9SGeert Uytterhoeven };
2083077365a9SGeert Uytterhoeven
2084077365a9SGeert Uytterhoeven static const struct pinmux_cfg_reg pinmux_config_regs[] = {
2085077365a9SGeert Uytterhoeven #define F_(x, y) FN_##y
2086077365a9SGeert Uytterhoeven #define FM(x) FN_##x
208737362c77SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR0", 0xe6060100, 32,
208837362c77SGeert Uytterhoeven GROUP(-10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
208937362c77SGeert Uytterhoeven 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1),
209037362c77SGeert Uytterhoeven GROUP(
209137362c77SGeert Uytterhoeven /* GP0_31_22 RESERVED */
2092077365a9SGeert Uytterhoeven GP_0_21_FN, GPSR0_21,
2093077365a9SGeert Uytterhoeven GP_0_20_FN, GPSR0_20,
2094077365a9SGeert Uytterhoeven GP_0_19_FN, GPSR0_19,
2095077365a9SGeert Uytterhoeven GP_0_18_FN, GPSR0_18,
2096077365a9SGeert Uytterhoeven GP_0_17_FN, GPSR0_17,
2097077365a9SGeert Uytterhoeven GP_0_16_FN, GPSR0_16,
2098077365a9SGeert Uytterhoeven GP_0_15_FN, GPSR0_15,
2099077365a9SGeert Uytterhoeven GP_0_14_FN, GPSR0_14,
2100077365a9SGeert Uytterhoeven GP_0_13_FN, GPSR0_13,
2101077365a9SGeert Uytterhoeven GP_0_12_FN, GPSR0_12,
2102077365a9SGeert Uytterhoeven GP_0_11_FN, GPSR0_11,
2103077365a9SGeert Uytterhoeven GP_0_10_FN, GPSR0_10,
2104077365a9SGeert Uytterhoeven GP_0_9_FN, GPSR0_9,
2105077365a9SGeert Uytterhoeven GP_0_8_FN, GPSR0_8,
2106077365a9SGeert Uytterhoeven GP_0_7_FN, GPSR0_7,
2107077365a9SGeert Uytterhoeven GP_0_6_FN, GPSR0_6,
2108077365a9SGeert Uytterhoeven GP_0_5_FN, GPSR0_5,
2109077365a9SGeert Uytterhoeven GP_0_4_FN, GPSR0_4,
2110077365a9SGeert Uytterhoeven GP_0_3_FN, GPSR0_3,
2111077365a9SGeert Uytterhoeven GP_0_2_FN, GPSR0_2,
2112077365a9SGeert Uytterhoeven GP_0_1_FN, GPSR0_1,
2113077365a9SGeert Uytterhoeven GP_0_0_FN, GPSR0_0, ))
2114077365a9SGeert Uytterhoeven },
2115077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
2116077365a9SGeert Uytterhoeven 0, 0,
2117077365a9SGeert Uytterhoeven 0, 0,
2118077365a9SGeert Uytterhoeven 0, 0,
2119077365a9SGeert Uytterhoeven 0, 0,
2120077365a9SGeert Uytterhoeven GP_1_27_FN, GPSR1_27,
2121077365a9SGeert Uytterhoeven GP_1_26_FN, GPSR1_26,
2122077365a9SGeert Uytterhoeven GP_1_25_FN, GPSR1_25,
2123077365a9SGeert Uytterhoeven GP_1_24_FN, GPSR1_24,
2124077365a9SGeert Uytterhoeven GP_1_23_FN, GPSR1_23,
2125077365a9SGeert Uytterhoeven GP_1_22_FN, GPSR1_22,
2126077365a9SGeert Uytterhoeven GP_1_21_FN, GPSR1_21,
2127077365a9SGeert Uytterhoeven GP_1_20_FN, GPSR1_20,
2128077365a9SGeert Uytterhoeven GP_1_19_FN, GPSR1_19,
2129077365a9SGeert Uytterhoeven GP_1_18_FN, GPSR1_18,
2130077365a9SGeert Uytterhoeven GP_1_17_FN, GPSR1_17,
2131077365a9SGeert Uytterhoeven GP_1_16_FN, GPSR1_16,
2132077365a9SGeert Uytterhoeven GP_1_15_FN, GPSR1_15,
2133077365a9SGeert Uytterhoeven GP_1_14_FN, GPSR1_14,
2134077365a9SGeert Uytterhoeven GP_1_13_FN, GPSR1_13,
2135077365a9SGeert Uytterhoeven GP_1_12_FN, GPSR1_12,
2136077365a9SGeert Uytterhoeven GP_1_11_FN, GPSR1_11,
2137077365a9SGeert Uytterhoeven GP_1_10_FN, GPSR1_10,
2138077365a9SGeert Uytterhoeven GP_1_9_FN, GPSR1_9,
2139077365a9SGeert Uytterhoeven GP_1_8_FN, GPSR1_8,
2140077365a9SGeert Uytterhoeven GP_1_7_FN, GPSR1_7,
2141077365a9SGeert Uytterhoeven GP_1_6_FN, GPSR1_6,
2142077365a9SGeert Uytterhoeven GP_1_5_FN, GPSR1_5,
2143077365a9SGeert Uytterhoeven GP_1_4_FN, GPSR1_4,
2144077365a9SGeert Uytterhoeven GP_1_3_FN, GPSR1_3,
2145077365a9SGeert Uytterhoeven GP_1_2_FN, GPSR1_2,
2146077365a9SGeert Uytterhoeven GP_1_1_FN, GPSR1_1,
2147077365a9SGeert Uytterhoeven GP_1_0_FN, GPSR1_0, ))
2148077365a9SGeert Uytterhoeven },
214937362c77SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR2", 0xe6060108, 32,
215037362c77SGeert Uytterhoeven GROUP(-15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
215137362c77SGeert Uytterhoeven 1, 1, 1, 1, 1, 1),
215237362c77SGeert Uytterhoeven GROUP(
215337362c77SGeert Uytterhoeven /* GP2_31_17 RESERVED */
2154077365a9SGeert Uytterhoeven GP_2_16_FN, GPSR2_16,
2155077365a9SGeert Uytterhoeven GP_2_15_FN, GPSR2_15,
2156077365a9SGeert Uytterhoeven GP_2_14_FN, GPSR2_14,
2157077365a9SGeert Uytterhoeven GP_2_13_FN, GPSR2_13,
2158077365a9SGeert Uytterhoeven GP_2_12_FN, GPSR2_12,
2159077365a9SGeert Uytterhoeven GP_2_11_FN, GPSR2_11,
2160077365a9SGeert Uytterhoeven GP_2_10_FN, GPSR2_10,
2161077365a9SGeert Uytterhoeven GP_2_9_FN, GPSR2_9,
2162077365a9SGeert Uytterhoeven GP_2_8_FN, GPSR2_8,
2163077365a9SGeert Uytterhoeven GP_2_7_FN, GPSR2_7,
2164077365a9SGeert Uytterhoeven GP_2_6_FN, GPSR2_6,
2165077365a9SGeert Uytterhoeven GP_2_5_FN, GPSR2_5,
2166077365a9SGeert Uytterhoeven GP_2_4_FN, GPSR2_4,
2167077365a9SGeert Uytterhoeven GP_2_3_FN, GPSR2_3,
2168077365a9SGeert Uytterhoeven GP_2_2_FN, GPSR2_2,
2169077365a9SGeert Uytterhoeven GP_2_1_FN, GPSR2_1,
2170077365a9SGeert Uytterhoeven GP_2_0_FN, GPSR2_0, ))
2171077365a9SGeert Uytterhoeven },
217237362c77SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR3", 0xe606010c, 32,
217337362c77SGeert Uytterhoeven GROUP(-15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
217437362c77SGeert Uytterhoeven 1, 1, 1, 1, 1, 1),
217537362c77SGeert Uytterhoeven GROUP(
217637362c77SGeert Uytterhoeven /* GP3_31_17 RESERVED */
2177077365a9SGeert Uytterhoeven GP_3_16_FN, GPSR3_16,
2178077365a9SGeert Uytterhoeven GP_3_15_FN, GPSR3_15,
2179077365a9SGeert Uytterhoeven GP_3_14_FN, GPSR3_14,
2180077365a9SGeert Uytterhoeven GP_3_13_FN, GPSR3_13,
2181077365a9SGeert Uytterhoeven GP_3_12_FN, GPSR3_12,
2182077365a9SGeert Uytterhoeven GP_3_11_FN, GPSR3_11,
2183077365a9SGeert Uytterhoeven GP_3_10_FN, GPSR3_10,
2184077365a9SGeert Uytterhoeven GP_3_9_FN, GPSR3_9,
2185077365a9SGeert Uytterhoeven GP_3_8_FN, GPSR3_8,
2186077365a9SGeert Uytterhoeven GP_3_7_FN, GPSR3_7,
2187077365a9SGeert Uytterhoeven GP_3_6_FN, GPSR3_6,
2188077365a9SGeert Uytterhoeven GP_3_5_FN, GPSR3_5,
2189077365a9SGeert Uytterhoeven GP_3_4_FN, GPSR3_4,
2190077365a9SGeert Uytterhoeven GP_3_3_FN, GPSR3_3,
2191077365a9SGeert Uytterhoeven GP_3_2_FN, GPSR3_2,
2192077365a9SGeert Uytterhoeven GP_3_1_FN, GPSR3_1,
2193077365a9SGeert Uytterhoeven GP_3_0_FN, GPSR3_0, ))
2194077365a9SGeert Uytterhoeven },
219537362c77SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR4", 0xe6060110, 32,
219637362c77SGeert Uytterhoeven GROUP(-26, 1, 1, 1, 1, 1, 1),
219737362c77SGeert Uytterhoeven GROUP(
219837362c77SGeert Uytterhoeven /* GP4_31_6 RESERVED */
2199077365a9SGeert Uytterhoeven GP_4_5_FN, GPSR4_5,
2200077365a9SGeert Uytterhoeven GP_4_4_FN, GPSR4_4,
2201077365a9SGeert Uytterhoeven GP_4_3_FN, GPSR4_3,
2202077365a9SGeert Uytterhoeven GP_4_2_FN, GPSR4_2,
2203077365a9SGeert Uytterhoeven GP_4_1_FN, GPSR4_1,
2204077365a9SGeert Uytterhoeven GP_4_0_FN, GPSR4_0, ))
2205077365a9SGeert Uytterhoeven },
220637362c77SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("GPSR5", 0xe6060114, 32,
220737362c77SGeert Uytterhoeven GROUP(-17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
220837362c77SGeert Uytterhoeven 1, 1, 1, 1),
220937362c77SGeert Uytterhoeven GROUP(
221037362c77SGeert Uytterhoeven /* GP5_31_15 RESERVED */
2211077365a9SGeert Uytterhoeven GP_5_14_FN, GPSR5_14,
2212077365a9SGeert Uytterhoeven GP_5_13_FN, GPSR5_13,
2213077365a9SGeert Uytterhoeven GP_5_12_FN, GPSR5_12,
2214077365a9SGeert Uytterhoeven GP_5_11_FN, GPSR5_11,
2215077365a9SGeert Uytterhoeven GP_5_10_FN, GPSR5_10,
2216077365a9SGeert Uytterhoeven GP_5_9_FN, GPSR5_9,
2217077365a9SGeert Uytterhoeven GP_5_8_FN, GPSR5_8,
2218077365a9SGeert Uytterhoeven GP_5_7_FN, GPSR5_7,
2219077365a9SGeert Uytterhoeven GP_5_6_FN, GPSR5_6,
2220077365a9SGeert Uytterhoeven GP_5_5_FN, GPSR5_5,
2221077365a9SGeert Uytterhoeven GP_5_4_FN, GPSR5_4,
2222077365a9SGeert Uytterhoeven GP_5_3_FN, GPSR5_3,
2223077365a9SGeert Uytterhoeven GP_5_2_FN, GPSR5_2,
2224077365a9SGeert Uytterhoeven GP_5_1_FN, GPSR5_1,
2225077365a9SGeert Uytterhoeven GP_5_0_FN, GPSR5_0, ))
2226077365a9SGeert Uytterhoeven },
2227077365a9SGeert Uytterhoeven #undef F_
2228077365a9SGeert Uytterhoeven #undef FM
2229077365a9SGeert Uytterhoeven
2230077365a9SGeert Uytterhoeven #define F_(x, y) x,
2231077365a9SGeert Uytterhoeven #define FM(x) FN_##x,
2232077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
2233077365a9SGeert Uytterhoeven IP0_31_28
2234077365a9SGeert Uytterhoeven IP0_27_24
2235077365a9SGeert Uytterhoeven IP0_23_20
2236077365a9SGeert Uytterhoeven IP0_19_16
2237077365a9SGeert Uytterhoeven IP0_15_12
2238077365a9SGeert Uytterhoeven IP0_11_8
2239077365a9SGeert Uytterhoeven IP0_7_4
2240077365a9SGeert Uytterhoeven IP0_3_0 ))
2241077365a9SGeert Uytterhoeven },
2242077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
2243077365a9SGeert Uytterhoeven IP1_31_28
2244077365a9SGeert Uytterhoeven IP1_27_24
2245077365a9SGeert Uytterhoeven IP1_23_20
2246077365a9SGeert Uytterhoeven IP1_19_16
2247077365a9SGeert Uytterhoeven IP1_15_12
2248077365a9SGeert Uytterhoeven IP1_11_8
2249077365a9SGeert Uytterhoeven IP1_7_4
2250077365a9SGeert Uytterhoeven IP1_3_0 ))
2251077365a9SGeert Uytterhoeven },
2252077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
2253077365a9SGeert Uytterhoeven IP2_31_28
2254077365a9SGeert Uytterhoeven IP2_27_24
2255077365a9SGeert Uytterhoeven IP2_23_20
2256077365a9SGeert Uytterhoeven IP2_19_16
2257077365a9SGeert Uytterhoeven IP2_15_12
2258077365a9SGeert Uytterhoeven IP2_11_8
2259077365a9SGeert Uytterhoeven IP2_7_4
2260077365a9SGeert Uytterhoeven IP2_3_0 ))
2261077365a9SGeert Uytterhoeven },
2262077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP(
2263077365a9SGeert Uytterhoeven IP3_31_28
2264077365a9SGeert Uytterhoeven IP3_27_24
2265077365a9SGeert Uytterhoeven IP3_23_20
2266077365a9SGeert Uytterhoeven IP3_19_16
2267077365a9SGeert Uytterhoeven IP3_15_12
2268077365a9SGeert Uytterhoeven IP3_11_8
2269077365a9SGeert Uytterhoeven IP3_7_4
2270077365a9SGeert Uytterhoeven IP3_3_0 ))
2271077365a9SGeert Uytterhoeven },
2272077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4, GROUP(
2273077365a9SGeert Uytterhoeven IP4_31_28
2274077365a9SGeert Uytterhoeven IP4_27_24
2275077365a9SGeert Uytterhoeven IP4_23_20
2276077365a9SGeert Uytterhoeven IP4_19_16
2277077365a9SGeert Uytterhoeven IP4_15_12
2278077365a9SGeert Uytterhoeven IP4_11_8
2279077365a9SGeert Uytterhoeven IP4_7_4
2280077365a9SGeert Uytterhoeven IP4_3_0 ))
2281077365a9SGeert Uytterhoeven },
2282077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4, GROUP(
2283077365a9SGeert Uytterhoeven IP5_31_28
2284077365a9SGeert Uytterhoeven IP5_27_24
2285077365a9SGeert Uytterhoeven IP5_23_20
2286077365a9SGeert Uytterhoeven IP5_19_16
2287077365a9SGeert Uytterhoeven IP5_15_12
2288077365a9SGeert Uytterhoeven IP5_11_8
2289077365a9SGeert Uytterhoeven IP5_7_4
2290077365a9SGeert Uytterhoeven IP5_3_0 ))
2291077365a9SGeert Uytterhoeven },
2292077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4, GROUP(
2293077365a9SGeert Uytterhoeven IP6_31_28
2294077365a9SGeert Uytterhoeven IP6_27_24
2295077365a9SGeert Uytterhoeven IP6_23_20
2296077365a9SGeert Uytterhoeven IP6_19_16
2297077365a9SGeert Uytterhoeven IP6_15_12
2298077365a9SGeert Uytterhoeven IP6_11_8
2299077365a9SGeert Uytterhoeven IP6_7_4
2300077365a9SGeert Uytterhoeven IP6_3_0 ))
2301077365a9SGeert Uytterhoeven },
2302077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4, GROUP(
2303077365a9SGeert Uytterhoeven IP7_31_28
2304077365a9SGeert Uytterhoeven IP7_27_24
2305077365a9SGeert Uytterhoeven IP7_23_20
2306077365a9SGeert Uytterhoeven IP7_19_16
2307077365a9SGeert Uytterhoeven IP7_15_12
2308077365a9SGeert Uytterhoeven IP7_11_8
2309077365a9SGeert Uytterhoeven IP7_7_4
2310077365a9SGeert Uytterhoeven IP7_3_0 ))
2311077365a9SGeert Uytterhoeven },
231237362c77SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR8", 0xe6060220, 32,
231337362c77SGeert Uytterhoeven GROUP(-4, 4, 4, 4, 4, 4, 4, 4),
231437362c77SGeert Uytterhoeven GROUP(
231537362c77SGeert Uytterhoeven /* IP8_31_28 RESERVED */
2316077365a9SGeert Uytterhoeven IP8_27_24
2317077365a9SGeert Uytterhoeven IP8_23_20
2318077365a9SGeert Uytterhoeven IP8_19_16
2319077365a9SGeert Uytterhoeven IP8_15_12
2320077365a9SGeert Uytterhoeven IP8_11_8
2321077365a9SGeert Uytterhoeven IP8_7_4
2322077365a9SGeert Uytterhoeven IP8_3_0 ))
2323077365a9SGeert Uytterhoeven },
2324077365a9SGeert Uytterhoeven #undef F_
2325077365a9SGeert Uytterhoeven #undef FM
2326077365a9SGeert Uytterhoeven
2327077365a9SGeert Uytterhoeven #define F_(x, y) x,
2328077365a9SGeert Uytterhoeven #define FM(x) FN_##x,
2329077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
2330289acf3aSGeert Uytterhoeven GROUP(-20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1),
2331077365a9SGeert Uytterhoeven GROUP(
2332289acf3aSGeert Uytterhoeven /* RESERVED 31-12 */
2333077365a9SGeert Uytterhoeven MOD_SEL0_11
2334077365a9SGeert Uytterhoeven MOD_SEL0_10
2335077365a9SGeert Uytterhoeven MOD_SEL0_9
2336077365a9SGeert Uytterhoeven MOD_SEL0_8
2337077365a9SGeert Uytterhoeven MOD_SEL0_7
2338077365a9SGeert Uytterhoeven MOD_SEL0_6
2339077365a9SGeert Uytterhoeven MOD_SEL0_5
2340077365a9SGeert Uytterhoeven MOD_SEL0_4
2341077365a9SGeert Uytterhoeven MOD_SEL0_3
2342077365a9SGeert Uytterhoeven MOD_SEL0_2
2343077365a9SGeert Uytterhoeven MOD_SEL0_1
2344077365a9SGeert Uytterhoeven MOD_SEL0_0 ))
2345077365a9SGeert Uytterhoeven },
2346*0256b6aeSGeert Uytterhoeven { /* sentinel */ }
2347077365a9SGeert Uytterhoeven };
2348077365a9SGeert Uytterhoeven
2349077365a9SGeert Uytterhoeven enum ioctrl_regs {
2350077365a9SGeert Uytterhoeven POCCTRL0,
2351077365a9SGeert Uytterhoeven POCCTRL1,
2352077365a9SGeert Uytterhoeven POCCTRL2,
2353077365a9SGeert Uytterhoeven TDSELCTRL,
2354077365a9SGeert Uytterhoeven };
2355077365a9SGeert Uytterhoeven
2356077365a9SGeert Uytterhoeven static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
2357077365a9SGeert Uytterhoeven [POCCTRL0] = { 0xe6060380 },
2358077365a9SGeert Uytterhoeven [POCCTRL1] = { 0xe6060384 },
2359077365a9SGeert Uytterhoeven [POCCTRL2] = { 0xe6060388 },
2360077365a9SGeert Uytterhoeven [TDSELCTRL] = { 0xe60603c0, },
2361*0256b6aeSGeert Uytterhoeven { /* sentinel */ }
2362077365a9SGeert Uytterhoeven };
2363077365a9SGeert Uytterhoeven
r8a77970_pin_to_pocctrl(unsigned int pin,u32 * pocctrl)2364b67fc1c6SGeert Uytterhoeven static int r8a77970_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
2365077365a9SGeert Uytterhoeven {
2366077365a9SGeert Uytterhoeven int bit = pin & 0x1f;
2367077365a9SGeert Uytterhoeven
2368a7bebdc5SGeert Uytterhoeven switch (pin) {
2369a7bebdc5SGeert Uytterhoeven case RCAR_GP_PIN(0, 0) ... RCAR_GP_PIN(0, 21):
2370077365a9SGeert Uytterhoeven *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
2371077365a9SGeert Uytterhoeven return bit;
2372a7bebdc5SGeert Uytterhoeven
2373a7bebdc5SGeert Uytterhoeven case RCAR_GP_PIN(2, 0) ... RCAR_GP_PIN(2, 9):
2374a7bebdc5SGeert Uytterhoeven *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
2375077365a9SGeert Uytterhoeven return bit + 22;
2376077365a9SGeert Uytterhoeven
2377a7bebdc5SGeert Uytterhoeven case RCAR_GP_PIN(2, 10) ... RCAR_GP_PIN(2, 16):
2378077365a9SGeert Uytterhoeven *pocctrl = pinmux_ioctrl_regs[POCCTRL1].reg;
2379077365a9SGeert Uytterhoeven return bit - 10;
2380a7bebdc5SGeert Uytterhoeven
2381a7bebdc5SGeert Uytterhoeven case RCAR_GP_PIN(3, 0) ... RCAR_GP_PIN(3, 16):
2382a7bebdc5SGeert Uytterhoeven *pocctrl = pinmux_ioctrl_regs[POCCTRL1].reg;
2383077365a9SGeert Uytterhoeven return bit + 7;
2384077365a9SGeert Uytterhoeven
2385a7bebdc5SGeert Uytterhoeven case PIN_VDDQ_AVB0:
2386a7bebdc5SGeert Uytterhoeven *pocctrl = pinmux_ioctrl_regs[POCCTRL2].reg;
2387a7bebdc5SGeert Uytterhoeven return 0;
2388a7bebdc5SGeert Uytterhoeven
2389a7bebdc5SGeert Uytterhoeven default:
2390077365a9SGeert Uytterhoeven return -EINVAL;
2391077365a9SGeert Uytterhoeven }
2392a7bebdc5SGeert Uytterhoeven }
2393077365a9SGeert Uytterhoeven
2394b764833eSGeert Uytterhoeven static const struct pinmux_bias_reg pinmux_bias_regs[] = {
2395b764833eSGeert Uytterhoeven { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) {
2396b764833eSGeert Uytterhoeven [ 0] = RCAR_GP_PIN(0, 0), /* DU_DR2 */
2397b764833eSGeert Uytterhoeven [ 1] = RCAR_GP_PIN(0, 1), /* DU_DR3 */
2398b764833eSGeert Uytterhoeven [ 2] = RCAR_GP_PIN(0, 2), /* DU_DR4 */
2399b764833eSGeert Uytterhoeven [ 3] = RCAR_GP_PIN(0, 3), /* DU_DR5 */
2400b764833eSGeert Uytterhoeven [ 4] = RCAR_GP_PIN(0, 4), /* DU_DR6 */
2401b764833eSGeert Uytterhoeven [ 5] = RCAR_GP_PIN(0, 5), /* DU_DR7 */
2402b764833eSGeert Uytterhoeven [ 6] = RCAR_GP_PIN(0, 6), /* DU_DG2 */
2403b764833eSGeert Uytterhoeven [ 7] = RCAR_GP_PIN(0, 7), /* DU_DG3 */
2404b764833eSGeert Uytterhoeven [ 8] = RCAR_GP_PIN(0, 8), /* DU_DG4 */
2405b764833eSGeert Uytterhoeven [ 9] = RCAR_GP_PIN(0, 9), /* DU_DG5 */
2406b764833eSGeert Uytterhoeven [10] = RCAR_GP_PIN(0, 10), /* DU_DG6 */
2407b764833eSGeert Uytterhoeven [11] = RCAR_GP_PIN(0, 11), /* DU_DG7 */
2408b764833eSGeert Uytterhoeven [12] = RCAR_GP_PIN(0, 12), /* DU_DB2 */
2409b764833eSGeert Uytterhoeven [13] = RCAR_GP_PIN(0, 13), /* DU_DB3 */
2410b764833eSGeert Uytterhoeven [14] = RCAR_GP_PIN(0, 14), /* DU_DB4 */
2411b764833eSGeert Uytterhoeven [15] = RCAR_GP_PIN(0, 15), /* DU_DB5 */
2412b764833eSGeert Uytterhoeven [16] = RCAR_GP_PIN(0, 16), /* DU_DB6 */
2413b764833eSGeert Uytterhoeven [17] = RCAR_GP_PIN(0, 17), /* DU_DB7 */
2414b764833eSGeert Uytterhoeven [18] = RCAR_GP_PIN(0, 18), /* DU_DOTCLKOUT */
2415b764833eSGeert Uytterhoeven [19] = RCAR_GP_PIN(0, 19), /* DU_EXHSYNC/DU_HSYNC */
2416b764833eSGeert Uytterhoeven [20] = RCAR_GP_PIN(0, 20), /* DU_EXVSYNC/DU_VSYNC */
2417b764833eSGeert Uytterhoeven [21] = RCAR_GP_PIN(0, 21), /* DU_EXODDF/DU_ODDF/DISP/CDE */
2418b764833eSGeert Uytterhoeven [22] = PIN_DU_DOTCLKIN, /* DU_DOTCLKIN */
2419b764833eSGeert Uytterhoeven [23] = PIN_PRESETOUT_N, /* PRESETOUT# */
2420b764833eSGeert Uytterhoeven [24] = PIN_EXTALR, /* EXTALR */
2421b764833eSGeert Uytterhoeven [25] = PIN_FSCLKST_N, /* FSCLKST# */
2422b764833eSGeert Uytterhoeven [26] = RCAR_GP_PIN(1, 0), /* IRQ0 */
2423b764833eSGeert Uytterhoeven [27] = PIN_TRST_N, /* TRST# */
2424b764833eSGeert Uytterhoeven [28] = PIN_TCK, /* TCK */
2425b764833eSGeert Uytterhoeven [29] = PIN_TMS, /* TMS */
2426b764833eSGeert Uytterhoeven [30] = PIN_TDI, /* TDI */
2427b764833eSGeert Uytterhoeven [31] = RCAR_GP_PIN(2, 0), /* VI0_CLK */
2428b764833eSGeert Uytterhoeven } },
2429b764833eSGeert Uytterhoeven { PINMUX_BIAS_REG("PUEN1", 0xe6060404, "PUD1", 0xe6060444) {
2430b764833eSGeert Uytterhoeven [ 0] = RCAR_GP_PIN(2, 1), /* VI0_CLKENB */
2431b764833eSGeert Uytterhoeven [ 1] = RCAR_GP_PIN(2, 2), /* VI0_HSYNC# */
2432b764833eSGeert Uytterhoeven [ 2] = RCAR_GP_PIN(2, 3), /* VI0_VSYNC# */
2433b764833eSGeert Uytterhoeven [ 3] = RCAR_GP_PIN(2, 4), /* VI0_DATA0 */
2434b764833eSGeert Uytterhoeven [ 4] = RCAR_GP_PIN(2, 5), /* VI0_DATA1 */
2435b764833eSGeert Uytterhoeven [ 5] = RCAR_GP_PIN(2, 6), /* VI0_DATA2 */
2436b764833eSGeert Uytterhoeven [ 6] = RCAR_GP_PIN(2, 7), /* VI0_DATA3 */
2437b764833eSGeert Uytterhoeven [ 7] = RCAR_GP_PIN(2, 8), /* VI0_DATA4 */
2438b764833eSGeert Uytterhoeven [ 8] = RCAR_GP_PIN(2, 9), /* VI0_DATA5 */
2439b764833eSGeert Uytterhoeven [ 9] = RCAR_GP_PIN(2, 10), /* VI0_DATA6 */
2440b764833eSGeert Uytterhoeven [10] = RCAR_GP_PIN(2, 11), /* VI0_DATA7 */
2441b764833eSGeert Uytterhoeven [11] = RCAR_GP_PIN(2, 12), /* VI0_DATA8 */
2442b764833eSGeert Uytterhoeven [12] = RCAR_GP_PIN(2, 13), /* VI0_DATA9 */
2443b764833eSGeert Uytterhoeven [13] = RCAR_GP_PIN(2, 14), /* VI0_DATA10 */
2444b764833eSGeert Uytterhoeven [14] = RCAR_GP_PIN(2, 15), /* VI0_DATA11 */
2445b764833eSGeert Uytterhoeven [15] = RCAR_GP_PIN(2, 16), /* VI0_FIELD */
2446b764833eSGeert Uytterhoeven [16] = RCAR_GP_PIN(3, 0), /* VI1_CLK */
2447b764833eSGeert Uytterhoeven [17] = RCAR_GP_PIN(3, 1), /* VI1_CLKENB */
2448b764833eSGeert Uytterhoeven [18] = RCAR_GP_PIN(3, 2), /* VI1_HSYNC# */
2449b764833eSGeert Uytterhoeven [19] = RCAR_GP_PIN(3, 3), /* VI1_VSYNC# */
2450b764833eSGeert Uytterhoeven [20] = RCAR_GP_PIN(3, 4), /* VI1_DATA0 */
2451b764833eSGeert Uytterhoeven [21] = RCAR_GP_PIN(3, 5), /* VI1_DATA1 */
2452b764833eSGeert Uytterhoeven [22] = RCAR_GP_PIN(3, 6), /* VI1_DATA2 */
2453b764833eSGeert Uytterhoeven [23] = RCAR_GP_PIN(3, 7), /* VI1_DATA3 */
2454b764833eSGeert Uytterhoeven [24] = RCAR_GP_PIN(3, 8), /* VI1_DATA4 */
2455b764833eSGeert Uytterhoeven [25] = RCAR_GP_PIN(3, 9), /* VI1_DATA5 */
2456b764833eSGeert Uytterhoeven [26] = RCAR_GP_PIN(3, 10), /* VI1_DATA6 */
2457b764833eSGeert Uytterhoeven [27] = RCAR_GP_PIN(3, 11), /* VI1_DATA7 */
2458b764833eSGeert Uytterhoeven [28] = RCAR_GP_PIN(3, 12), /* VI1_DATA8 */
2459b764833eSGeert Uytterhoeven [29] = RCAR_GP_PIN(3, 13), /* VI1_DATA9 */
2460b764833eSGeert Uytterhoeven [30] = RCAR_GP_PIN(3, 14), /* VI1_DATA10 */
2461b764833eSGeert Uytterhoeven [31] = RCAR_GP_PIN(3, 15), /* VI1_DATA11 */
2462b764833eSGeert Uytterhoeven } },
2463b764833eSGeert Uytterhoeven { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) {
2464b764833eSGeert Uytterhoeven [ 0] = RCAR_GP_PIN(3, 16), /* VI1_FIELD */
2465b764833eSGeert Uytterhoeven [ 1] = RCAR_GP_PIN(4, 0), /* SCL0 */
2466b764833eSGeert Uytterhoeven [ 2] = RCAR_GP_PIN(4, 1), /* SDA0 */
2467b764833eSGeert Uytterhoeven [ 3] = RCAR_GP_PIN(4, 2), /* SCL1 */
2468b764833eSGeert Uytterhoeven [ 4] = RCAR_GP_PIN(4, 3), /* SDA1 */
2469b764833eSGeert Uytterhoeven [ 5] = RCAR_GP_PIN(4, 4), /* SCL2 */
2470b764833eSGeert Uytterhoeven [ 6] = RCAR_GP_PIN(4, 5), /* SDA2 */
2471b764833eSGeert Uytterhoeven [ 7] = RCAR_GP_PIN(1, 1), /* AVB0_RX_CTL */
2472b764833eSGeert Uytterhoeven [ 8] = RCAR_GP_PIN(1, 2), /* AVB0_RXC */
2473b764833eSGeert Uytterhoeven [ 9] = RCAR_GP_PIN(1, 3), /* AVB0_RD0 */
2474b764833eSGeert Uytterhoeven [10] = RCAR_GP_PIN(1, 4), /* AVB0_RD1 */
2475b764833eSGeert Uytterhoeven [11] = RCAR_GP_PIN(1, 5), /* AVB0_RD2 */
2476b764833eSGeert Uytterhoeven [12] = RCAR_GP_PIN(1, 6), /* AVB0_RD3 */
2477b764833eSGeert Uytterhoeven [13] = RCAR_GP_PIN(1, 7), /* AVB0_TX_CTL */
2478b764833eSGeert Uytterhoeven [14] = RCAR_GP_PIN(1, 8), /* AVB0_TXC */
2479b764833eSGeert Uytterhoeven [15] = RCAR_GP_PIN(1, 9), /* AVB0_TD0 */
2480b764833eSGeert Uytterhoeven [16] = RCAR_GP_PIN(1, 10), /* AVB0_TD1 */
2481b764833eSGeert Uytterhoeven [17] = RCAR_GP_PIN(1, 11), /* AVB0_TD2 */
2482b764833eSGeert Uytterhoeven [18] = RCAR_GP_PIN(1, 12), /* AVB0_TD3 */
2483b764833eSGeert Uytterhoeven [19] = RCAR_GP_PIN(1, 13), /* AVB0_TXCREFCLK */
2484b764833eSGeert Uytterhoeven [20] = RCAR_GP_PIN(1, 14), /* AVB0_MDIO */
2485b764833eSGeert Uytterhoeven [21] = RCAR_GP_PIN(1, 15), /* AVB0_MDC */
2486b764833eSGeert Uytterhoeven [22] = RCAR_GP_PIN(1, 16), /* AVB0_MAGIC */
2487b764833eSGeert Uytterhoeven [23] = RCAR_GP_PIN(1, 17), /* AVB0_PHY_INT */
2488b764833eSGeert Uytterhoeven [24] = RCAR_GP_PIN(1, 18), /* AVB0_LINK */
2489b764833eSGeert Uytterhoeven [25] = RCAR_GP_PIN(1, 19), /* AVB0_AVTP_MATCH */
2490b764833eSGeert Uytterhoeven [26] = RCAR_GP_PIN(1, 20), /* AVB0_AVTP_CAPTURE */
2491b764833eSGeert Uytterhoeven [27] = RCAR_GP_PIN(1, 21), /* CANFD0_TX_A */
2492b764833eSGeert Uytterhoeven [28] = RCAR_GP_PIN(1, 22), /* CANFD0_RX_A */
2493b764833eSGeert Uytterhoeven [29] = RCAR_GP_PIN(1, 23), /* CANFD1_TX */
2494b764833eSGeert Uytterhoeven [30] = RCAR_GP_PIN(1, 24), /* CANFD1_RX */
2495b764833eSGeert Uytterhoeven [31] = RCAR_GP_PIN(1, 25), /* CANFD_CLK */
2496b764833eSGeert Uytterhoeven } },
2497b764833eSGeert Uytterhoeven { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) {
2498b764833eSGeert Uytterhoeven [ 0] = RCAR_GP_PIN(5, 0), /* QSPI0_SPCLK */
2499b764833eSGeert Uytterhoeven [ 1] = RCAR_GP_PIN(5, 1), /* QSPI0_MOSI_IO0 */
2500b764833eSGeert Uytterhoeven [ 2] = RCAR_GP_PIN(5, 2), /* QSPI0_MISO_IO1 */
2501b764833eSGeert Uytterhoeven [ 3] = RCAR_GP_PIN(5, 3), /* QSPI0_IO2 */
2502b764833eSGeert Uytterhoeven [ 4] = RCAR_GP_PIN(5, 4), /* QSPI0_IO3 */
2503b764833eSGeert Uytterhoeven [ 5] = RCAR_GP_PIN(5, 5), /* QSPI0_SSL */
2504b764833eSGeert Uytterhoeven [ 6] = RCAR_GP_PIN(5, 6), /* QSPI1_SPCLK */
2505b764833eSGeert Uytterhoeven [ 7] = RCAR_GP_PIN(5, 7), /* QSPI1_MOSI_IO0 */
2506b764833eSGeert Uytterhoeven [ 8] = RCAR_GP_PIN(5, 8), /* QSPI1_MISO_IO1 */
2507b764833eSGeert Uytterhoeven [ 9] = RCAR_GP_PIN(5, 9), /* QSPI1_IO2 */
2508b764833eSGeert Uytterhoeven [10] = RCAR_GP_PIN(5, 10), /* QSPI1_IO3 */
2509b764833eSGeert Uytterhoeven [11] = RCAR_GP_PIN(5, 11), /* QSPI1_SSL */
2510b764833eSGeert Uytterhoeven [12] = RCAR_GP_PIN(5, 12), /* RPC_RESET# */
2511b764833eSGeert Uytterhoeven [13] = RCAR_GP_PIN(5, 13), /* RPC_WP# */
2512b764833eSGeert Uytterhoeven [14] = RCAR_GP_PIN(5, 14), /* RPC_INT# */
2513b764833eSGeert Uytterhoeven [15] = RCAR_GP_PIN(1, 26), /* DIGRF_CLKIN */
2514b764833eSGeert Uytterhoeven [16] = RCAR_GP_PIN(1, 27), /* DIGRF_CLKOUT */
2515b764833eSGeert Uytterhoeven [17] = SH_PFC_PIN_NONE,
2516b764833eSGeert Uytterhoeven [18] = SH_PFC_PIN_NONE,
2517b764833eSGeert Uytterhoeven [19] = SH_PFC_PIN_NONE,
2518b764833eSGeert Uytterhoeven [20] = SH_PFC_PIN_NONE,
2519b764833eSGeert Uytterhoeven [21] = SH_PFC_PIN_NONE,
2520b764833eSGeert Uytterhoeven [22] = SH_PFC_PIN_NONE,
2521b764833eSGeert Uytterhoeven [23] = SH_PFC_PIN_NONE,
2522b764833eSGeert Uytterhoeven [24] = SH_PFC_PIN_NONE,
2523b764833eSGeert Uytterhoeven [25] = SH_PFC_PIN_NONE,
2524b764833eSGeert Uytterhoeven [26] = SH_PFC_PIN_NONE,
2525b764833eSGeert Uytterhoeven [27] = SH_PFC_PIN_NONE,
2526b764833eSGeert Uytterhoeven [28] = SH_PFC_PIN_NONE,
2527b764833eSGeert Uytterhoeven [29] = SH_PFC_PIN_NONE,
2528b764833eSGeert Uytterhoeven [30] = SH_PFC_PIN_NONE,
2529b764833eSGeert Uytterhoeven [31] = SH_PFC_PIN_NONE,
2530b764833eSGeert Uytterhoeven } },
2531b764833eSGeert Uytterhoeven { /* sentinel */ }
2532b764833eSGeert Uytterhoeven };
2533b764833eSGeert Uytterhoeven
2534c614d12cSGeert Uytterhoeven static const struct sh_pfc_soc_operations r8a77970_pfc_ops = {
2535077365a9SGeert Uytterhoeven .pin_to_pocctrl = r8a77970_pin_to_pocctrl,
2536b764833eSGeert Uytterhoeven .get_bias = rcar_pinmux_get_bias,
2537b764833eSGeert Uytterhoeven .set_bias = rcar_pinmux_set_bias,
2538077365a9SGeert Uytterhoeven };
2539077365a9SGeert Uytterhoeven
2540077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a77970_pinmux_info = {
2541077365a9SGeert Uytterhoeven .name = "r8a77970_pfc",
2542c614d12cSGeert Uytterhoeven .ops = &r8a77970_pfc_ops,
2543077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */
2544077365a9SGeert Uytterhoeven
2545077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2546077365a9SGeert Uytterhoeven
2547077365a9SGeert Uytterhoeven .pins = pinmux_pins,
2548077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins),
2549077365a9SGeert Uytterhoeven .groups = pinmux_groups,
2550077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups),
2551077365a9SGeert Uytterhoeven .functions = pinmux_functions,
2552077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions),
2553077365a9SGeert Uytterhoeven
2554077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs,
2555b764833eSGeert Uytterhoeven .bias_regs = pinmux_bias_regs,
2556077365a9SGeert Uytterhoeven .ioctrl_regs = pinmux_ioctrl_regs,
2557077365a9SGeert Uytterhoeven
2558077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data,
2559077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data),
2560077365a9SGeert Uytterhoeven };
2561