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Searched refs:IP5_15_12 (Results 1 – 13 of 13) sorted by relevance

/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c121 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12)
196 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
271 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
571 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),
572 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC),
573 PINMUX_IPSR_GPSR(IP5_15_12, D2),
2314 IP5_15_12
H A Dpfc-r8a77995.c107 #define GPSR2_6 F_(VI4_DATA5, IP5_15_12)
246 #define IP5_15_12 FM(VI4_DATA5) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
363 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
692 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA5),
693 PINMUX_IPSR_MSEL(IP5_15_12, SCK4_A, SEL_SCIF4_0),
2316 IP5_15_12
H A Dpfc-r8a77990.c64 #define GPSR1_21 F_(CS0_N, IP5_15_12)
234 #define IP5_15_12 FM(CS0_N) FM(SCL5) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR0) FM(VI4_DATA2_B) F_(… macro
373 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
790 PINMUX_IPSR_GPSR(IP5_15_12, CS0_N),
791 PINMUX_IPSR_GPSR(IP5_15_12, SCL5),
792 PINMUX_IPSR_GPSR(IP5_15_12, DU_DR0),
793 PINMUX_IPSR_MSEL(IP5_15_12, VI4_DATA2_B, SEL_VIN4_1),
794 PINMUX_IPSR_GPSR(IP5_15_12, LCDOUT16),
4986 IP5_15_12
H A Dpfc-r8a7795.c54 #define GPSR0_0 F_(D0, IP5_15_12)
257 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
415 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
879 PINMUX_IPSR_GPSR(IP5_15_12, D0),
880 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
881 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
882 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
883 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5412 IP5_15_12
H A Dpfc-r8a7796.c60 #define GPSR0_0 F_(D0, IP5_15_12)
263 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
421 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
881 PINMUX_IPSR_GPSR(IP5_15_12, D0),
882 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
883 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
884 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
885 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5369 IP5_15_12
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c132 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12)
207 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
281 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
579 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),
580 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC),
581 PINMUX_IPSR_GPSR(IP5_15_12, D2),
2287 IP5_15_12
H A Dpfc-r8a77980.c147 #define GPSR3_3 F_(VI1_VSYNC_N, IP5_15_12)
241 #define IP5_15_12 FM(VI1_VSYNC_N) FM(MSIOF1_SYNC) F_(0, 0) FM(D2) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
331 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
656 PINMUX_IPSR_GPSR(IP5_15_12, VI1_VSYNC_N),
657 PINMUX_IPSR_GPSR(IP5_15_12, MSIOF1_SYNC),
658 PINMUX_IPSR_GPSR(IP5_15_12, D2),
2741 IP5_15_12
H A Dpfc-r8a77995.c116 #define GPSR2_6 F_(VI4_DATA5, IP5_15_12)
255 #define IP5_15_12 FM(VI4_DATA5) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
372 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
702 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA5),
703 PINMUX_IPSR_MSEL(IP5_15_12, SCK4_A, SEL_SCIF4_0),
2728 IP5_15_12
H A Dpfc-r8a77990.c89 #define GPSR1_21 F_(CS0_N, IP5_15_12)
259 #define IP5_15_12 FM(CS0_N) FM(SCL5) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR0) FM(VI4_DATA2_B) F_(… macro
398 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
820 PINMUX_IPSR_GPSR(IP5_15_12, CS0_N),
821 PINMUX_IPSR_GPSR(IP5_15_12, SCL5),
822 PINMUX_IPSR_GPSR(IP5_15_12, DU_DR0),
823 PINMUX_IPSR_MSEL(IP5_15_12, VI4_DATA2_B, SEL_VIN4_1),
824 PINMUX_IPSR_GPSR(IP5_15_12, LCDOUT16),
4843 IP5_15_12
H A Dpfc-r8a77965.c101 #define GPSR0_0 F_(D0, IP5_15_12)
304 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
462 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
932 PINMUX_IPSR_GPSR(IP5_15_12, D0),
933 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
934 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
935 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
936 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5598 IP5_15_12
H A Dpfc-r8a77951.c96 #define GPSR0_0 F_(D0, IP5_15_12)
299 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
457 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
926 PINMUX_IPSR_GPSR(IP5_15_12, D0),
927 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
928 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
929 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
930 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5402 IP5_15_12
H A Dpfc-r8a7796.c101 #define GPSR0_0 F_(D0, IP5_15_12)
304 #define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0)… macro
462 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
930 PINMUX_IPSR_GPSR(IP5_15_12, D0),
931 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1),
932 PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0),
933 PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16),
934 PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0),
5357 IP5_15_12
H A Dpfc-r8a77470.c718 PINMUX_IPSR_GPSR(IP5_15_12, DU0_DG2),
719 PINMUX_IPSR_MSEL(IP5_15_12, RX4_D, SEL_SCIF4_3),
720 PINMUX_IPSR_GPSR(IP5_15_12, A10),