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Searched refs:IP1_7_4 (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c47 #define GPSR0_9 F_(DU_DG5, IP1_7_4)
162 #define IP1_7_4 FM(DU_DG5) F_(0, 0) F_(0, 0) FM(A9) FM(FSO_CFE_1_N_A) F_(0, 0) F_(0, 0) F_(0, … macro
260 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
422 PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
423 PINMUX_IPSR_GPSR(IP1_7_4, A9),
424 PINMUX_IPSR_MSEL(IP1_7_4, FSO_CFE_1_N_A, SEL_RFSO_0),
2276 IP1_7_4
H A Dpfc-r8a77995.c77 #define GPSR1_2 F_(DU_DB2, IP1_7_4)
210 #define IP1_7_4 FM(DU_DB2) FM(LCDOUT2) FM(IRQ0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
352 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
559 PINMUX_IPSR_GPSR(IP1_7_4, DU_DB2),
560 PINMUX_IPSR_GPSR(IP1_7_4, LCDOUT2),
561 PINMUX_IPSR_MSEL(IP1_7_4, IRQ0_B, SEL_IRQ_0_1),
2278 IP1_7_4
H A Dpfc-r8a7795.c99 #define GPSR2_3 F_(IRQ3, IP1_7_4)
221 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0… macro
404 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
652 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
653 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
654 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
655 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
656 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
657 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_E, SEL_MSIOF3_4),
5374 IP1_7_4
H A Dpfc-r8a7796.c105 #define GPSR2_3 F_(IRQ3, IP1_7_4)
227 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0… macro
410 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
655 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
656 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
657 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
658 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
659 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
660 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_E, SEL_MSIOF3_4),
5331 IP1_7_4
H A Dpfc-r8a77990.c103 #define GPSR2_10 F_(QSPI1_IO3, IP1_7_4)
198 #define IP1_7_4 FM(QSPI1_IO3) FM(RIF3_CLK_A) FM(HRX3_C) FM(VI4_DATA4_A) F_(0, 0) F_(0, 0) F_(… macro
362 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
561 PINMUX_IPSR_GPSR(IP1_7_4, QSPI1_IO3),
562 PINMUX_IPSR_MSEL(IP1_7_4, RIF3_CLK_A, SEL_DRIF3_0),
563 PINMUX_IPSR_MSEL(IP1_7_4, HRX3_C, SEL_HSCIF3_2),
564 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA4_A, SEL_VIN4_0),
4948 IP1_7_4
H A Dpfc-r8a7790.c857 PINMUX_IPSR_GPSR(IP1_7_4, D10),
858 PINMUX_IPSR_MSEL(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2),
859 PINMUX_IPSR_GPSR(IP1_7_4, AVB_TXD2),
860 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2, SEL_VI0_0),
861 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2_B, SEL_VI0_1),
862 PINMUX_IPSR_MSEL(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0),
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c58 #define GPSR0_9 F_(DU_DG5, IP1_7_4)
173 #define IP1_7_4 FM(DU_DG5) F_(0, 0) F_(0, 0) FM(A9) FM(FSO_CFE_1_N_A) F_(0, 0) F_(0, 0) F_(0, … macro
270 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
431 PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
432 PINMUX_IPSR_GPSR(IP1_7_4, A9),
433 PINMUX_IPSR_MSEL(IP1_7_4, FSO_CFE_1_N_A, SEL_RFSO_0),
2249 IP1_7_4
H A Dpfc-r8a77980.c60 #define GPSR0_9 F_(DU_DG5, IP1_7_4)
207 #define IP1_7_4 FM(DU_DG5) FM(SDA5) FM(GETHER_MDC_B) FM(A9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
320 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
505 PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
506 PINMUX_IPSR_GPSR(IP1_7_4, SDA5),
507 PINMUX_IPSR_MSEL(IP1_7_4, GETHER_MDC_B, SEL_GETHER_1),
508 PINMUX_IPSR_GPSR(IP1_7_4, A9),
2703 IP1_7_4
H A Dpfc-r8a77995.c86 #define GPSR1_2 F_(DU_DB2, IP1_7_4)
219 #define IP1_7_4 FM(DU_DB2) FM(LCDOUT2) FM(IRQ0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
361 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
569 PINMUX_IPSR_GPSR(IP1_7_4, DU_DB2),
570 PINMUX_IPSR_GPSR(IP1_7_4, LCDOUT2),
571 PINMUX_IPSR_MSEL(IP1_7_4, IRQ0_B, SEL_IRQ_0_1),
2690 IP1_7_4
H A Dpfc-r8a77965.c146 #define GPSR2_3 F_(IRQ3, IP1_7_4)
268 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0… macro
451 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
703 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
704 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
705 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
706 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
707 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
708 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_E, SEL_MSIOF3_4),
5560 IP1_7_4
H A Dpfc-r8a77951.c141 #define GPSR2_3 F_(IRQ3, IP1_7_4)
263 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0… macro
446 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
697 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
698 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
699 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
700 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
701 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
702 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_E, SEL_MSIOF3_4),
5364 IP1_7_4
H A Dpfc-r8a7796.c146 #define GPSR2_3 F_(IRQ3, IP1_7_4)
268 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0… macro
451 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
702 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
703 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
704 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
705 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
706 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
707 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_E, SEL_MSIOF3_4),
5319 IP1_7_4
H A Dpfc-r8a77990.c128 #define GPSR2_10 F_(QSPI1_IO3, IP1_7_4)
223 #define IP1_7_4 FM(QSPI1_IO3) FM(RIF3_CLK_A) FM(HRX3_C) FM(VI4_DATA4_A) F_(0, 0) F_(0, 0) F_(… macro
387 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
591 PINMUX_IPSR_GPSR(IP1_7_4, QSPI1_IO3),
592 PINMUX_IPSR_MSEL(IP1_7_4, RIF3_CLK_A, SEL_DRIF3_0),
593 PINMUX_IPSR_MSEL(IP1_7_4, HRX3_C, SEL_HSCIF3_2),
594 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA4_A, SEL_VIN4_0),
4805 IP1_7_4
H A Dpfc-r8a7790.c868 PINMUX_IPSR_GPSR(IP1_7_4, D10),
869 PINMUX_IPSR_MSEL(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2),
870 PINMUX_IPSR_GPSR(IP1_7_4, AVB_TXD2),
871 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2, SEL_VI0_0),
872 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2_B, SEL_VI0_1),
873 PINMUX_IPSR_MSEL(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0),
H A Dpfc-r8a77470.c580 PINMUX_IPSR_GPSR(IP1_7_4, MMC0_D5),
581 PINMUX_IPSR_GPSR(IP1_7_4, SD1_WP),