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Searched refs:IP0_19_16 (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c52 #define GPSR0_4 F_(DU_DR6, IP0_19_16)
157 #define IP0_19_16 FM(DU_DR6) FM(MSIOF3_RXD) F_(0, 0) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
263 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
400 PINMUX_IPSR_GPSR(IP0_19_16, DU_DR6),
401 PINMUX_IPSR_GPSR(IP0_19_16, MSIOF3_RXD),
402 PINMUX_IPSR_GPSR(IP0_19_16, A4),
2263 IP0_19_16
H A Dpfc-r8a77995.c39 #define GPSR0_6 F_(MLB_CLK, IP0_19_16)
205 #define IP0_19_16 FM(MLB_CLK) FM(MSIOF2_SYNC_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
355 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
536 PINMUX_IPSR_GPSR(IP0_19_16, MLB_CLK),
537 PINMUX_IPSR_MSEL(IP0_19_16, MSIOF2_SYNC_A, SEL_MSIOF2_0),
538 PINMUX_IPSR_MSEL(IP0_19_16, SCK5_A, SEL_SCIF5_0),
2265 IP0_19_16
H A Dpfc-r8a7795.c89 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
216 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST… macro
407 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
619 PINMUX_IPSR_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, SEL_ETHERAVB_0),
620 PINMUX_IPSR_MSEL(IP0_19_16, MSIOF2_RXD_C, SEL_MSIOF2_2),
621 PINMUX_IPSR_MSEL(IP0_19_16, CTS4_N_A, SEL_SCIF4_0),
622 PINMUX_IPSR_GPSR(IP0_19_16, FSCLKST2_N_A),
5361 IP0_19_16
H A Dpfc-r8a77990.c109 #define GPSR2_4 F_(QSPI0_IO3, IP0_19_16)
193 #define IP0_19_16 FM(QSPI0_IO3) FM(HRX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
365 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
537 PINMUX_IPSR_GPSR(IP0_19_16, QSPI0_IO3),
538 PINMUX_IPSR_MSEL(IP0_19_16, HRX4_A, SEL_HSCIF4_0),
4935 IP0_19_16
H A Dpfc-r8a7790.c823 PINMUX_IPSR_GPSR(IP0_19_16, D5),
824 PINMUX_IPSR_MSEL(IP0_19_16, SCIFB1_TXD_F, SEL_SCIFB1_5),
825 PINMUX_IPSR_MSEL(IP0_19_16, SCIFB0_TXD_C, SEL_SCIFB_2),
826 PINMUX_IPSR_MSEL(IP0_19_16, VI3_DATA5, SEL_VI3_0),
827 PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1, SEL_VI0_0),
828 PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1_B, SEL_VI0_1),
829 PINMUX_IPSR_MSEL(IP0_19_16, TX0_B, SEL_SCIF0_1),
H A Dpfc-r8a7796.c95 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
222 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F… macro
413 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
623 PINMUX_IPSR_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, SEL_ETHERAVB_0),
624 PINMUX_IPSR_MSEL(IP0_19_16, MSIOF2_RXD_C, SEL_MSIOF2_2),
625 PINMUX_IPSR_MSEL(IP0_19_16, CTS4_N_A, SEL_SCIF4_0),
5318 IP0_19_16
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c63 #define GPSR0_4 F_(DU_DR6, IP0_19_16)
168 #define IP0_19_16 FM(DU_DR6) FM(MSIOF3_RXD) F_(0, 0) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
273 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
409 PINMUX_IPSR_GPSR(IP0_19_16, DU_DR6),
410 PINMUX_IPSR_GPSR(IP0_19_16, MSIOF3_RXD),
411 PINMUX_IPSR_GPSR(IP0_19_16, A4),
2236 IP0_19_16
H A Dpfc-r8a77980.c65 #define GPSR0_4 F_(DU_DR6, IP0_19_16)
202 #define IP0_19_16 FM(DU_DR6) FM(RTS4_N) FM(GETHER_RMII_TXD_EN) FM(A4) F_(0, 0) F_(0, 0) F_(0, 0… macro
323 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
481 PINMUX_IPSR_GPSR(IP0_19_16, DU_DR6),
482 PINMUX_IPSR_GPSR(IP0_19_16, RTS4_N),
483 PINMUX_IPSR_GPSR(IP0_19_16, GETHER_RMII_TXD_EN),
484 PINMUX_IPSR_GPSR(IP0_19_16, A4),
2690 IP0_19_16
H A Dpfc-r8a77995.c48 #define GPSR0_6 F_(MLB_CLK, IP0_19_16)
214 #define IP0_19_16 FM(MLB_CLK) FM(MSIOF2_SYNC_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… macro
364 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
546 PINMUX_IPSR_GPSR(IP0_19_16, MLB_CLK),
547 PINMUX_IPSR_MSEL(IP0_19_16, MSIOF2_SYNC_A, SEL_MSIOF2_0),
548 PINMUX_IPSR_MSEL(IP0_19_16, SCK5_A, SEL_SCIF5_0),
2677 IP0_19_16
H A Dpfc-r8a77951.c131 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
258 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST… macro
449 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
662 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
663 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
664 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
665 PINMUX_IPSR_MSEL(IP0_19_16, FSCLKST2_N_A, I2C_SEL_5_0),
666 PINMUX_IPSR_PHYS(IP0_19_16, SCL5, I2C_SEL_5_1),
5351 IP0_19_16
H A Dpfc-r8a77965.c136 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
263 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST… macro
454 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
667 PINMUX_IPSR_GPSR(IP0_19_16, FSCLKST2_N_A),
669 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
670 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
671 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
672 PINMUX_IPSR_PHYS(IP0_19_16, SCL5, I2C_SEL_5_1),
5547 IP0_19_16
H A Dpfc-r8a7796.c136 #define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16)
263 #define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F… macro
454 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
668 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
669 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, MSIOF2_RXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
670 PINMUX_IPSR_PHYS_MSEL(IP0_19_16, CTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
671 PINMUX_IPSR_PHYS(IP0_19_16, SCL5, I2C_SEL_5_1),
5306 IP0_19_16
H A Dpfc-r8a7790.c834 PINMUX_IPSR_GPSR(IP0_19_16, D5),
835 PINMUX_IPSR_MSEL(IP0_19_16, SCIFB1_TXD_F, SEL_SCIFB1_5),
836 PINMUX_IPSR_MSEL(IP0_19_16, SCIFB0_TXD_C, SEL_SCIFB_2),
837 PINMUX_IPSR_MSEL(IP0_19_16, VI3_DATA5, SEL_VI3_0),
838 PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1, SEL_VI0_0),
839 PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1_B, SEL_VI0_1),
840 PINMUX_IPSR_MSEL(IP0_19_16, TX0_B, SEL_SCIF0_1),
H A Dpfc-r8a77990.c134 #define GPSR2_4 F_(QSPI0_IO3, IP0_19_16)
218 #define IP0_19_16 FM(QSPI0_IO3) FM(HRX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
390 FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \
567 PINMUX_IPSR_GPSR(IP0_19_16, QSPI0_IO3),
568 PINMUX_IPSR_MSEL(IP0_19_16, HRX4_A, SEL_HSCIF4_0),
4792 IP0_19_16
H A Dpfc-r8a77470.c565 PINMUX_IPSR_GPSR(IP0_19_16, SD0_DAT2),
566 PINMUX_IPSR_MSEL(IP0_19_16, SSI_WS0129_B, SEL_SSI0_1),
567 PINMUX_IPSR_MSEL(IP0_19_16, RX5_E, SEL_SCIF5_4),