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Searched refs:ICPU_RESET_CORE_RST_PROTECT (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/
H A Dreset.c34 writel(ICPU_RESET_CORE_RST_PROTECT, BASE_CFG + ICPU_RESET); in _machine_restart()
58 clrbits_le32(BASE_CFG + ICPU_RESET, ICPU_RESET_CORE_RST_PROTECT); in _machine_restart()
/openbmc/u-boot/board/mscc/ocelot/
H A Docelot.c29 writel(ICPU_RESET_CORE_RST_PROTECT, BASE_CFG + ICPU_RESET); in mscc_switch_reset()
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h15 #define ICPU_RESET_CORE_RST_PROTECT BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h15 #define ICPU_RESET_CORE_RST_PROTECT BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h15 #define ICPU_RESET_CORE_RST_PROTECT BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h15 #define ICPU_RESET_CORE_RST_PROTECT BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h15 #define ICPU_RESET_CORE_RST_PROTECT BIT(2) macro