| /openbmc/linux/Documentation/driver-api/media/drivers/ |
| H A D | saa7134-devel.rst | 46 - GP17 Strap "GP7"=High
47 - GP16 Strap "GP6"=High
56 - GP12 Strap "GP5" = High
57 - GP11 Strap "GP4" = High
58 - GP10 Strap "GP3" = High
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| /openbmc/linux/drivers/message/fusion/ |
| H A D | mptfc.c | 350 ppage0_alloc->WWNN.High = in mptfc_GetFcDevPage0()
351 le32_to_cpu(ppage0_alloc->WWNN.High); in mptfc_GetFcDevPage0()
356 ppage0_alloc->WWPN.High = in mptfc_GetFcDevPage0()
357 le32_to_cpu(ppage0_alloc->WWPN.High); in mptfc_GetFcDevPage0()
413 rid->node_name = ((u64)pg0->WWNN.High) << 32 | (u64)pg0->WWNN.Low; in mptfc_generate_rport_ids()
414 rid->port_name = ((u64)pg0->WWPN.High) << 32 | (u64)pg0->WWPN.Low; in mptfc_generate_rport_ids()
441 pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; in mptfc_register_dev()
483 pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; in mptfc_register_dev()
484 nn = (u64)ri->pg0.WWNN.High << 32 | (u64)ri->pg0.WWNN.Low; in mptfc_register_dev()
575 pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; in mptfc_dump_lun_info()
[all …]
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| /openbmc/linux/Documentation/hwmon/ |
| H A D | ltc2947.rst | 73 power1_max High power threshold
78 power1_max_alarm High power alarm
83 temp1_max High temperature threshold
88 temp1_max_alarm High temperature alarm
92 temp2_max High temperature threshold for fan control
94 temp2_max_alarm High temperature fan control alarm
|
| /openbmc/docs/architecture/code-update/ |
| H A D | code-update-diagrams.md | 3 1. [High-Level Overview](#High-Level Overview)
5 ## High-Level Overview
|
| /openbmc/linux/Documentation/userspace-api/media/dvb/ |
| H A D | ca_high_level.rst | 3 The High level CI API
14 With the High Level CI approach any new card with almost any random
65 With this High Level CI interface, the interface can be defined with the
68 All these ioctls are also valid for the High level CI interface
89 APP: CI High level interface
139 | | | High Level CI driver
156 The High Level CI interface uses the EN50221 DVB standard, following a
|
| /openbmc/openbmc-test-automation/gui/test/server_overview/ |
| H A D | test_obmc_gui_server_overview.robot | 14 ${string_high_priority_events} High priority events
66 Verify High Priority Events Should Display At OBMC Power Off State
74 Verify High Priority Events Can Be Operated At OBMC Power Off State
75 [Documentation] Will open the "High Priority Events".
120 Verify High Priority Events Can Be Operated At OBMC Power Running State
121 [Documentation] Will open the "High Priority Events"
|
| /openbmc/u-boot/board/Synology/ds109/ |
| H A D | openocd.cfg | 47 mww 0xD000140C 0x00000833 ;# DDR SDRAM Timing (High) Register
53 mww 0xD0001424 0x0000F1FF ;# Dunit Control High Register
54 mww 0xD0001428 0x00085520 ;# Dunit Control High Register
55 mww 0xD000147c 0x00008552 ;# Dunit Control High Register
64 mww 0xD0001498 0x00000000 ;# DDR2 SDRAM ODT Control (High) REgister
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| /openbmc/linux/drivers/message/fusion/lsi/ |
| H A D | mpi_type.h | 59 S32 High; member
65 U32 High; member
|
| /openbmc/bmcweb/redfish-core/include/generated/enums/ |
| H A D | power_distribution.hpp | 24 High, enumerator
43 {TransferSensitivityType::High, "High"},
|
| /openbmc/linux/Documentation/timers/ |
| H A D | hpet.rst | 2 High Precision Event Timer Driver for Linux
5 The High Precision Event Timer (HPET) hardware follows a specification
8 Each HPET has one fixed-rate counter (at 10+ MHz, hence "High Precision")
|
| /openbmc/linux/drivers/iio/filter/ |
| H A D | Kconfig | 9 tristate "Analog Devices ADMV8818 High-Pass and Low-Pass Filter"
14 2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter.
|
| /openbmc/linux/Documentation/admin-guide/media/ |
| H A D | dvb-usb-dib0700-cardlist.rst | 151 * - YUAN High-Tech DiBcom STK7700D
153 * - YUAN High-Tech MC770
155 * - YUAN High-Tech STK7700D
157 * - YUAN High-Tech STK7700PH
|
| /openbmc/linux/Documentation/userspace-api/media/drivers/ |
| H A D | aspeed-video.rst | 32 Enable/Disable ASPEED's High quality mode. This is a private control
47 Define the quality of ASPEED's High quality mode. This is a private control
48 that can be used to decide compression quality if High quality mode enabled
|
| /openbmc/linux/net/hsr/ |
| H A D | Kconfig | 3 # IEC 62439-3 High-availability Seamless Redundancy
7 tristate "High-availability Seamless Redundancy (HSR & PRP)"
9 This enables IEC 62439 defined High-availability Seamless
|
| /openbmc/linux/Documentation/userspace-api/media/v4l/ |
| H A D | biblio.rst | 132 :title: ITU-T Rec. H.265 | ISO/IEC 23008-2 "High Efficiency Video Coding"
193 :title: SMPTE 240M-1999 "Television - Signal Parameters - 1125-Line High-Definition Production"
213 :title: SMPTE ST 2084:2014 "High Dynamic Range Electro-Optical Transfer Function of Master Refe…
323 :title: A DTV Profile for Uncompressed High Speed Digital Interfaces
354 :title: High-bandwidth Digital Content Protection System
365 :title: High-Definition Multimedia Interface
375 :title: High-Definition Multimedia Interface
|
| /openbmc/u-boot/board/keymile/km_arm/ |
| H A D | kwbimage-memphis.cfg | 42 # If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
76 DATA 0xFFD0140C 0x00000A3E # DDR Timing (High)
119 DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
139 DATA 0xFFD0147c 0x00008451 # DDR2 SDRAM Timing High
161 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
|
| H A D | kwbimage.cfg | 39 # If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
73 DATA 0xFFD0140C 0x00000033 # DDR Timing (High)
116 DATA 0xFFD01424 0x0000F07F # DDR Controller Control High
146 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
|
| H A D | kwbimage_256M8_1.cfg | 86 # If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
129 DATA 0xFFD0140C 0x0000003E # DDR Timing (High)
182 DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
205 DATA 0xFFD0147c 0x00008452 # DDR2 SDRAM Timing High
238 DATA 0xFFD01498 0x00000004 # DDR ODT Control (High)
|
| /openbmc/linux/drivers/dma/mediatek/ |
| H A D | Kconfig | 4 tristate "MediaTek High-Speed DMA controller support"
9 Enable support for High-Speed DMA controller on MediaTek
|
| /openbmc/linux/arch/arm/boot/dts/intel/socfpga/ |
| H A D | socfpga_cyclone5_chameleon96.dts | 89 /* On High speed expansion */
101 /* On High speed expansion */
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | kirkwood-openrd.dtsi | 64 * High: RS-485
82 * High: SD
|
| /openbmc/linux/arch/arm/boot/dts/marvell/ |
| H A D | kirkwood-openrd.dtsi | 64 * High: RS-485
82 * High: SD
|
| /openbmc/u-boot/arch/arm/mach-omap2/omap5/ |
| H A D | Kconfig | 108 This config option enables High OPP for DSPEVE.
132 This config option enables High OPP for IVA.
156 This config option enables High OPP for GPU.
|
| /openbmc/u-boot/board/Seagate/nas220/ |
| H A D | kwbimage.cfg | 56 DATA 0xFFD0140C 0x00000819 # DDR Timing (High)
110 DATA 0xFFD01424 0x0000F07F # DDR Controller Control High
137 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
|
| /openbmc/linux/Documentation/devicetree/bindings/x86/ |
| H A D | timer.txt | 4 * High Precision Event Timer (HPET)
|