Searched refs:HHI_MPLL_CNTL8 (Results 1 – 12 of 12) sorted by relevance
/openbmc/linux/drivers/clk/meson/ |
H A D | meson8b.h | 76 #define HHI_MPLL_CNTL8 0x29C /* 0xa7 offset in data sheet */ macro
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H A D | axg.h | 87 #define HHI_MPLL_CNTL8 0x29C macro
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H A D | gxbb.h | 81 #define HHI_MPLL_CNTL8 0x29C /* MP1, 0xa7 offset in data sheet */ macro
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H A D | g12a.h | 102 #define HHI_MPLL_CNTL8 0x298 macro
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H A D | axg.c | 541 .reg_off = HHI_MPLL_CNTL8, 546 .reg_off = HHI_MPLL_CNTL8, 551 .reg_off = HHI_MPLL_CNTL8, 575 .offset = HHI_MPLL_CNTL8,
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H A D | gxbb.c | 801 .reg_off = HHI_MPLL_CNTL8, 806 .reg_off = HHI_MPLL_CNTL8, 811 .reg_off = HHI_MPLL_CNTL8, 829 .offset = HHI_MPLL_CNTL8,
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H A D | meson8b.c | 526 .reg_off = HHI_MPLL_CNTL8, 531 .reg_off = HHI_MPLL_CNTL8, 536 .reg_off = HHI_MPLL_CNTL8, 554 .offset = HHI_MPLL_CNTL8,
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H A D | g12a.c | 2364 { .reg = HHI_MPLL_CNTL8, .def = 0x40000033 },
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/openbmc/u-boot/arch/arm/include/asm/arch-meson/ |
H A D | clock-axg.h | 86 #define HHI_MPLL_CNTL8 0x29C macro
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H A D | clock-gx.h | 81 #define HHI_MPLL_CNTL8 0x29C /* 0xa7 offset in data sheet */ macro
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/openbmc/u-boot/drivers/clk/ |
H A D | clk_meson_axg.c | 135 {HHI_MPLL_CNTL8, 0, 14}, /* psdm */ 136 {HHI_MPLL_CNTL8, 16, 9}, /* pn2 */
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H A D | clk_meson.c | 179 MESON_GATE(CLKID_MPLL1, HHI_MPLL_CNTL8, 14), 623 {HHI_MPLL_CNTL8, 0, 14}, /* psdm */ 624 {HHI_MPLL_CNTL8, 16, 9}, /* pn2 */
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